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| author | Kevin O'Connor <kevin@koconnor.net> | 2018-12-25 11:19:30 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2019-01-07 19:30:17 -0500 |
| commit | 7707d5a74e5dc13c07fa637447e00be30cca582b (patch) | |
| tree | 5d047fc7a2e6df01ad42c28c6a5b96183d41fef5 /src/sam4e8e/spi.c | |
| parent | f0715de0049b238b4bbcb0389fe5848fd271118e (diff) | |
| download | kutter-7707d5a74e5dc13c07fa637447e00be30cca582b.tar.gz kutter-7707d5a74e5dc13c07fa637447e00be30cca582b.tar.xz kutter-7707d5a74e5dc13c07fa637447e00be30cca582b.zip | |
sam4e8e: Rename gpio_set_peripheral() to gpio_peripheral()
Use the same definition for gpio_peripheral() that the sam3x8e code
uses.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/sam4e8e/spi.c')
| -rw-r--r-- | src/sam4e8e/spi.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/sam4e8e/spi.c b/src/sam4e8e/spi.c index dc65118d..0fa9d3ca 100644 --- a/src/sam4e8e/spi.c +++ b/src/sam4e8e/spi.c @@ -7,7 +7,7 @@ #include "autoconf.h" // CONFIG_CLOCK_FREQ #include "command.h" // shutdown #include "gpio.h" // spi_setup -#include "internal.h" // gpio_set_peripheral +#include "internal.h" // gpio_peripheral #include "sam4e.h" // USART0 #include "sched.h" // sched_shutdown @@ -25,11 +25,11 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate) if (bus == SSPI_USART0) { // DUET_USART0_SCK as per dc42 CoreNG - gpio_set_peripheral('B', PIO_PB13C_SCK0, 'C', 0); + gpio_peripheral(GPIO('B', 13), 'C', 0); // DUET_USART0_MOSI as per dc42 CoreNG - gpio_set_peripheral('B', PIO_PB1C_TXD0, 'C', 0); + gpio_peripheral(GPIO('B', 1), 'C', 0); // DUET_USART0_MISO as per dc42 CoreNG - gpio_set_peripheral('B', PIO_PB0C_RXD0, 'C', 1); + gpio_peripheral(GPIO('B', 0), 'C', 1); if ((PMC->PMC_PCSR0 & (1u << ID_USART0)) == 0) { PMC->PMC_PCER0 = 1 << ID_USART0; @@ -37,11 +37,11 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate) p_usart = USART0; } else if (bus == SSPI_USART1) { // DUET_USART1_SCK as per dc42 CoreNG - gpio_set_peripheral('A', PIO_PA23A_SCK1, 'A', 0); + gpio_peripheral(GPIO('A', 23), 'A', 0); // DUET_USART1_MOSI as per dc42 CoreNG - gpio_set_peripheral('A', PIO_PA22A_TXD1, 'A', 0); + gpio_peripheral(GPIO('A', 22), 'A', 0); // DUET_USART1_MISO as per dc42 CoreNG - gpio_set_peripheral('A', PIO_PA21A_RXD1, 'A', 1); + gpio_peripheral(GPIO('A', 21), 'A', 1); if ((PMC->PMC_PCSR0 & (1u << ID_USART1)) == 0) { PMC->PMC_PCER0 = 1 << ID_USART1; |