diff options
author | Kevin O'Connor <kevin@koconnor.net> | 2018-12-28 19:00:29 -0500 |
---|---|---|
committer | Kevin O'Connor <kevin@koconnor.net> | 2019-01-07 19:33:26 -0500 |
commit | 4683036f98b319d1c36853c1a200d63c36b470ff (patch) | |
tree | 340620d721c54de9de57bbb3b514e3fcff8b1599 /src/sam3/sam4e_spi.c | |
parent | b4baabe4081a3c1473e970b776a5d760bf6689e3 (diff) | |
download | kutter-4683036f98b319d1c36853c1a200d63c36b470ff.tar.gz kutter-4683036f98b319d1c36853c1a200d63c36b470ff.tar.xz kutter-4683036f98b319d1c36853c1a200d63c36b470ff.zip |
sam3: Add enable_pclock() helper function
Add a helper function to enable peripheral clocks.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/sam3/sam4e_spi.c')
-rw-r--r-- | src/sam3/sam4e_spi.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/sam3/sam4e_spi.c b/src/sam3/sam4e_spi.c index 0fa9d3ca..2648eeff 100644 --- a/src/sam3/sam4e_spi.c +++ b/src/sam3/sam4e_spi.c @@ -31,9 +31,7 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate) // DUET_USART0_MISO as per dc42 CoreNG gpio_peripheral(GPIO('B', 0), 'C', 1); - if ((PMC->PMC_PCSR0 & (1u << ID_USART0)) == 0) { - PMC->PMC_PCER0 = 1 << ID_USART0; - } + enable_pclock(ID_USART0); p_usart = USART0; } else if (bus == SSPI_USART1) { // DUET_USART1_SCK as per dc42 CoreNG @@ -43,9 +41,7 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate) // DUET_USART1_MISO as per dc42 CoreNG gpio_peripheral(GPIO('A', 21), 'A', 1); - if ((PMC->PMC_PCSR0 & (1u << ID_USART1)) == 0) { - PMC->PMC_PCER0 = 1 << ID_USART1; - } + enable_pclock(ID_USART1); p_usart = USART1; } |