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authorKevin O'Connor <kevin@koconnor.net>2021-05-04 10:09:29 -0400
committerKevin O'Connor <kevin@koconnor.net>2021-05-04 20:29:48 -0400
commit45cd3543e3154e8dfa8488fe6948689a6c07c389 (patch)
tree3281358f5abc74a79d1f2f64666847b8b8ffc0ab /src/lpc176x/main.c
parent5fb5b3afe1fd568a0cb79706268b6a484c0aa850 (diff)
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lpc176x: Use full peripheral clock speed; fix UART interface
Commit ae89a659 caused a regression in the lpc176x UART handling. After that commit the UART clock divisor would need to be 6.25 on lpc1768 or 7.5 on lpc1769, but the code only supports whole numbers. Set the PCLKSELx registers at startup and return to using full speed peripheral clocks. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/lpc176x/main.c')
-rw-r--r--src/lpc176x/main.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/lpc176x/main.c b/src/lpc176x/main.c
index d12bcd57..f0fc6cde 100644
--- a/src/lpc176x/main.c
+++ b/src/lpc176x/main.c
@@ -55,7 +55,7 @@ enable_pclock(uint32_t pclk)
uint32_t
get_pclock_frequency(uint32_t pclk)
{
- return CONFIG_CLOCK_FREQ / 4;
+ return CONFIG_CLOCK_FREQ;
}
// Main entry point - called from armcm_boot.c:ResetHandler()