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| author | Boris-Chengbiao Zhou <bobo1239@web.de> | 2023-06-17 16:44:39 +0200 |
|---|---|---|
| committer | KevinOConnor <kevin@koconnor.net> | 2023-06-20 12:05:32 -0400 |
| commit | 1374c701ab8fee4f4fe746db78603e92d909305f (patch) | |
| tree | f3d59d96120a4d36927746f37e5533bc13176f31 /src/hc32f460/main.c | |
| parent | 623ebf2fb163e01f84a9b6c533a13c91b7c700a0 (diff) | |
| download | kutter-1374c701ab8fee4f4fe746db78603e92d909305f.tar.gz kutter-1374c701ab8fee4f4fe746db78603e92d909305f.tar.xz kutter-1374c701ab8fee4f4fe746db78603e92d909305f.zip | |
hc32f460: Disable JTAG/SWD on pins so they can be used for GPIO/serial
This change is required to sucessfully use PA13/PA14 for UART. Otherwise
they function as SWDIO/SWCLK.
Relevant excerpt from the reference manual (translated):
The initial state of PA13, PA14, PA15, PB3, and PB4 ports is that the
JTAG/SWD function is valid after reset. When configuring FSEL[5:0] to
select the function, you need to write 0 to the corresponding bit of the
register PSPCR to invalidate the JTAG/SWD function.
Signed-off-by: Boris-Chengbiao Zhou <bobo1239@web.de>
Diffstat (limited to 'src/hc32f460/main.c')
| -rw-r--r-- | src/hc32f460/main.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/hc32f460/main.c b/src/hc32f460/main.c index a641667f..0dc3ebc5 100644 --- a/src/hc32f460/main.c +++ b/src/hc32f460/main.c @@ -7,6 +7,7 @@ #include "autoconf.h" // CONFIG_MACH_AVR #include "sched.h" #include "system_hc32f460.h" +#include "hc32f460_gpio.h" /**************************************************************** @@ -20,6 +21,11 @@ armcm_main(void) // sets the system clock speed variable for library use SystemInit(); + // disable JTAG/SWD on pins PA13, PA14, PA15, PB3, PB4 + // SWD still works until the relevant pins are reconfigured. Proprietary + // flash program (XHSC ISP) must be used to reflash afterwards. + PORT_DebugPortSetting(ALL_DBG_PIN, Disable); + // manage the system sched_main(); |