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| author | Kevin O'Connor <kevin@koconnor.net> | 2018-11-19 21:42:14 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2018-11-20 12:58:33 -0500 |
| commit | 2cc0313b721597238d0774a40a4bcee7e838558a (patch) | |
| tree | bac7b141846436195a4f507c6d49452acbcd30c4 /src/avr/usbserial.c | |
| parent | 31687bc009d2adfa1599bf5053891c57ca3392fa (diff) | |
| download | kutter-2cc0313b721597238d0774a40a4bcee7e838558a.tar.gz kutter-2cc0313b721597238d0774a40a4bcee7e838558a.tar.xz kutter-2cc0313b721597238d0774a40a4bcee7e838558a.zip | |
avr: Add initial support for atmega32u4 chips
Signed-off-by: Trevor Jones <trevorjones141@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/avr/usbserial.c')
| -rw-r--r-- | src/avr/usbserial.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/src/avr/usbserial.c b/src/avr/usbserial.c index 7405e534..e95ab040 100644 --- a/src/avr/usbserial.c +++ b/src/avr/usbserial.c @@ -178,18 +178,26 @@ usb_set_configure(void) UEIENX = 1<<TXINE; } +#if CONFIG_MACH_at90usb1286 +#define UHWCON_Init ((1<<UIMOD) | (1<<UVREGE)) +#define PLLCSR_Init ((1<<PLLP2) | (1<<PLLP0) | (1<<PLLE)) +#elif CONFIG_MACH_at90usb646 +#define UHWCON_Init ((1<<UIMOD) | (1<<UVREGE)) +#define PLLCSR_Init ((1<<PLLP2) | (1<<PLLP1) | (1<<PLLE)) +#elif CONFIG_MACH_atmega32u4 +#define UHWCON_Init (1<<UVREGE) +#define PLLCSR_Init ((1<<PINDIV) | (1<<PLLE)) +#endif + void usbserial_init(void) { // Set USB controller to device mode - UHWCON = (1<<UIMOD) | (1<<UVREGE); + UHWCON = UHWCON_Init; // Enable USB clock USBCON = (1<<USBE) | (1<<FRZCLK); - if (CONFIG_MACH_at90usb1286) - PLLCSR = (1<<PLLP2) | (1<<PLLP0) | (1<<PLLE); - else - PLLCSR = (1<<PLLP2) | (1<<PLLP1) | (1<<PLLE); + PLLCSR = PLLCSR_Init; while (!(PLLCSR & (1<<PLOCK))) ; USBCON = (1<<USBE) | (1<<OTGPADE); |