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authorKevin O'Connor <kevin@koconnor.net>2019-10-24 22:02:29 -0400
committerKevin O'Connor <kevin@koconnor.net>2019-10-24 22:02:29 -0400
commitf723a3141e02d038c8f12aca477d3c38c8283f4a (patch)
treea05c85c3f5f2d854f471c21f4c8c306ff4042fa2 /src/atsam
parent6f5f2a3bc7c5147f848705864b9ecb6332a190a4 (diff)
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atsam: Allow PB4-PB7,PB10-PB12 to be used as gpio on sam4
A separate "sysio" register must be set in order to use some port B pins on the sam4 mcu. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/atsam')
-rw-r--r--src/atsam/gpio.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/atsam/gpio.c b/src/atsam/gpio.c
index 2af2bfc0..f3ad95ac 100644
--- a/src/atsam/gpio.c
+++ b/src/atsam/gpio.c
@@ -60,6 +60,9 @@ set_pull_up(Pio *regs, uint32_t bit, int32_t pull_up)
regs->PIO_PUDR = bit;
regs->PIO_PPDDR = bit;
}
+ // Check if this pin is a "system IO pin" and disable if so
+ if (regs == PIOB && (bit & 0x1cf0))
+ MATRIX->CCFG_SYSIO |= bit;
#endif
}