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authorElias Bakken <elias@iagent.no>2023-02-21 02:15:01 +0100
committerGitHub <noreply@github.com>2023-02-20 20:15:01 -0500
commitb7978d37b360fb270782a8db5d690342654e6977 (patch)
tree5383243d85dee85a521f466ac966460ee092efa2 /src/ar100/serial.c
parentd7bd7f1f4ba6cecd19daa566fdc1864561269ae1 (diff)
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ar100: Support for ar100 (#6054)
Add files to support AR100 Signed-off-by: Elias Bakken <elias@iagent.no>
Diffstat (limited to 'src/ar100/serial.c')
-rw-r--r--src/ar100/serial.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/src/ar100/serial.c b/src/ar100/serial.c
new file mode 100644
index 00000000..6fcafdbd
--- /dev/null
+++ b/src/ar100/serial.c
@@ -0,0 +1,53 @@
+// Uart and r_uart functions for ar100
+//
+// Copyright (C) 2020-2021 Elias Bakken <elias@iagent.no>
+//
+// This file may be distributed under the terms of the GNU GPLv3 license.
+
+
+#include "serial.h"
+#include "util.h"
+#include "internal.h"
+#include "gpio.h"
+
+void r_uart_init(void){
+ // Setup Pins PL2, PL3 as UART IO
+ gpio_mux_setup(2, PIO_ALT1);
+ gpio_mux_setup(3, PIO_ALT1);
+
+ // Enable clock and assert reset
+ clear_bit(APB0_CLK_GATING_REG, 4);
+ set_bit(APB0_SOFT_RST_REG, 4);
+ set_bit(APB0_CLK_GATING_REG, 4);
+
+ // Setup baud rate
+ set_bit(R_UART_LCR, 7); // Enable setting DLH, DLL
+ write_reg(R_UART_DLH, 0x0);
+ write_reg(R_UART_DLL, 0xD); // 1 500 000
+ write_reg(R_UART_LCR, 0x3); // 8 bit data length
+
+ write_reg(R_UART_FCR, 0<<0); // Disable fifo
+ r_uart_getc(); // flush input
+ write_reg(R_UART_FCR, 1<<0); // Enable fifo
+}
+
+char r_uart_getc(void){
+ char c = (char) read_reg(R_UART_RBR);
+ return c;
+}
+
+uint32_t r_uart_fifo_rcv(void){
+ return read_reg(R_UART_RFL);
+}
+
+void r_uart_putc(char c){
+ while(!(read_reg(R_UART_LSR) & 1<<5))
+ ;
+ write_reg(R_UART_THR, c);
+}
+
+void r_uart_puts(char *s){
+ while(*s){
+ r_uart_putc(*s++);
+ }
+}