pru: BeagleBone Firmware upgrade to Debian 11.7 Bullseye (#6577)

* Porting BeagleBone to Kernel 5.10

* Fixing issue with installation for BeagleBone.

This fix resolve 2 issue:
1. Conflict with AVR packages.
2. "klipper_pru" script is executed before PRU cores are ready

* Adding additional steps to BeagleBone install guide.

* Updating BeagleBone documentation, adding different use cases, adding buses configurations SPI, I2C, CAN, UART

Signed-off-by: Oleg Gavavka <work@datalink.net.ua>

14 files changed, 127 insertions, 2445 deletions

diff --git a/lib/README b/lib/README
index e981df59..106b2cfc 100644
--- a/lib/README
+++ b/lib/README
@@ -132,7 +132,7 @@ details. See changes.diff for the modifications.
 
 The pru_rpmsg directory contains code from:
   https://github.com/dinuxbg/pru-gcc-examples
-revision 425a42d82006cf0aa24be27b483d2f6a41607489. The code is taken
+revision e2bd170d4d61b3e642da65e0f0d487e10872fe22. The code is taken
 from the repo's hc-sr04-range-sensor directory. It has been modified
 so that the IEP definitions compile correctly. See pru_rpmsg.patch for
 the modifications.
diff --git a/lib/pru_rpmsg/include/am335x/pru_cfg.h b/lib/pru_rpmsg/include/am335x/pru_cfg.h
deleted file mode 100644
index 175867c6..00000000
--- a/lib/pru_rpmsg/include/am335x/pru_cfg.h
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *	* Redistributions of source code must retain the above copyright
- *	  notice, this list of conditions and the following disclaimer.
- *
- *	* Redistributions in binary form must reproduce the above copyright
- *	  notice, this list of conditions and the following disclaimer in the
- *	  documentation and/or other materials provided with the
- *	  distribution.
- *
- *	* Neither the name of Texas Instruments Incorporated nor the names of
- *	  its contributors may be used to endorse or promote products derived
- *	  from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _PRU_CFG_H_
-#define _PRU_CFG_H_
-
-/* PRU_CFG register set */
-typedef struct {
-
-	/* PRU_CFG_REVID register bit field */
-	union {
-		volatile uint32_t REVID;
-
-		volatile struct {
-			unsigned REVID : 32;
-		} REVID_bit;
-	};	// 0x0
-
-
-	/* PRU_CFG_SYSCFG register bit field */
-	union {
-		volatile uint32_t SYSCFG;
-
-		volatile struct {
-			unsigned IDLE_MODE : 2;
-			unsigned STANDBY_MODE : 2;
-			unsigned STANDBY_INIT : 1;
-			unsigned SUB_MWAIT : 1;
-			unsigned rsvd6 : 26;
-		} SYSCFG_bit;
-	};	// 0x4
-
-
-	/* PRU_CFG_GPCFG0 register bit field */
-	union {
-		volatile uint32_t GPCFG0;
-
-		volatile struct {
-			unsigned PRU0_GPI_MODE : 2;	// 1:0
-			unsigned PRU0_GPI_CLK_MODE : 1;	// 2
-			unsigned PRU0_GPI_DIV0 : 5;	// 7:3
-			unsigned PRU0_GPI_DIV1 : 5;	// 12:8
-			unsigned PRU0_GPI_SB : 1;	// 13
-			unsigned PRU0_GPO_MODE : 1;	// 14
-			unsigned PRU0_GPO_DIV0 : 5;	// 19:15
-			unsigned PRU0_GPO_DIV1 : 5;	// 24:20
-			unsigned PRU0_GPO_SH_SEL : 1;	// 25
-			unsigned rsvd26 : 6;		// 31:26
-		} GPCFG0_bit;
-	};	// 0x8
-
-
-	/* PRU_CFG_GPCFG1 register bit field */
-	union {
-		volatile uint32_t GPCFG1;
-
-		volatile struct {
-			unsigned PRU1_GPI_MODE : 2;	// 1:0
-			unsigned PRU1_GPI_CLK_MODE : 1;	// 2
-			unsigned PRU1_GPI_DIV0 : 5;	// 7:3
-			unsigned PRU1_GPI_DIV1 : 5;	// 12:8
-			unsigned PRU1_GPI_SB : 1;	// 13
-			unsigned PRU1_GPO_MODE : 1;	// 14
-			unsigned PRU1_GPO_DIV0 : 5;	// 19:15
-			unsigned PRU1_GPO_DIV1 : 5;	// 24:20
-			unsigned PRU1_GPO_SH_SEL : 1;	// 25
-			unsigned rsvd26 : 6;		// 31:26
-		} GPCFG1_bit;
-	};	// 0xC
-
-
-	/* PRU_CFG_CGR register bit field */
-	union {
-		volatile uint32_t CGR;
-
-		volatile struct {
-			unsigned PRU0_CLK_STOP_REQ : 1;	// 0
-			unsigned PRU0_CLK_STOP_ACK : 1;	// 1
-			unsigned PRU0_CLK_EN : 1;	// 2
-			unsigned PRU1_CLK_STOP_REQ : 1;	// 3
-			unsigned PRU1_CLK_STOP_ACK : 1;	// 4
-			unsigned PRU1_CLK_EN : 1;	// 5
-			unsigned INTC_CLK_STOP_REQ : 1;	// 6
-			unsigned INTC_CLK_STOP_ACK : 1;	// 7
-			unsigned INTC_CLK_EN : 1;	// 8
-			unsigned UART_CLK_STOP_REQ : 1;	// 9
-			unsigned UART_CLK_STOP_ACK : 1;	// 10
-			unsigned UART_CLK_EN : 1;	// 11
-			unsigned ECAP_CLK_STOP_REQ : 1;	// 12
-			unsigned ECAP_CLK_STOP_ACK : 1;	// 13
-			unsigned ECAP_CLK_EN : 1;	// 14
-			unsigned IEP_CLK_STOP_REQ : 1;	// 15
-			unsigned IEP_CLK_STOP_ACK : 1;	// 16
-			unsigned IEP_CLK_EN : 1;	// 17
-			unsigned rsvd18 : 14;		// 31:18
-		} CGR_bit;
-	};	// 0x10
-
-
-	/* PRU_CFG_ISRP register bit field */
-	union {
-		volatile uint32_t ISRP;
-
-		volatile  struct {
-			unsigned PRU0_IMEM_PE_RAW : 4;	// 3:0
-			unsigned PRU0_DMEM_PE_RAW : 4;	// 7:4
-			unsigned PRU1_IMEM_PE_RAW : 4;	// 11:8
-			unsigned PRU1_DMEM_PE_RAW : 4;	// 15:12
-			unsigned RAM_PE_RAW : 4;	// 19:16
-			unsigned rsvd20 : 12;		// 31:20
-		} ISRP_bit;
-	};	// 0x14
-
-
-	/* PRU_CFG_ISP register bit field */
-	union {
-		volatile uint32_t ISP;
-
-		volatile  struct {
-			unsigned PRU0_IMEM_PE : 4;	// 3:0
-			unsigned PRU0_DMEM_PE : 4;	// 7:4
-			unsigned PRU1_IMEM_PE : 4;	// 11:8
-			unsigned PRU1_DMEM_PE : 4;	// 15:12
-			unsigned RAM_PE : 4;		// 19:16
-			unsigned rsvd20 : 12;		// 31:20
-		} ISP_bit;
-	};	// 0x18
-
-	/* PRU_CFG_IESP register bit field */
-	union {
-		volatile uint32_t IESP;
-
-		volatile struct {
-			unsigned PRU0_IMEM_PE_SET : 4;	// 3:0
-			unsigned PRU0_DMEM_PE_SET : 4;	// 7:4
-			unsigned PRU1_IMEM_PE_SET : 4;	// 11:8
-			unsigned PRU1_DMEM_PE_SET : 4;	// 15:12
-			unsigned RAM_PE_SET : 4;	// 19:16
-			unsigned rsvd20 : 12;		// 31:20
-		} IESP_bit;
-	};	// 0x1C
-
-
-	/* PRU_CFG_IECP register bit field */
-	union {
-		volatile uint32_t IECP;
-
-		volatile struct {
-			unsigned PRU0_IMEM_PE_CLR : 4;	// 3:0
-			unsigned PRU0_DMEM_PE_CLR : 4;	// 7:4
-			unsigned PRU1_IMEM_PE_CLR : 4;	// 11:8
-			unsigned PRU1_DMEM_PE_CLR : 4;	// 15:12
-			unsigned rsvd16 : 16;		// 31:16
-		} IECP_bit;
-	};	// 0x20
-
-
-	uint32_t rsvd24;	// 0x24
-
-
-	/* PRU_CFG_PMAO register bit field */
-	union {
-		volatile uint32_t PMAO;
-
-		volatile struct {
-			unsigned PMAO_PRU0 : 1;		// 0
-			unsigned PMAO_PRU1 : 1;		// 1
-			unsigned rsvd2 : 30;		// 31:2
-		} PMAO_bit;
-	};	// 0x28
-
-
-	uint32_t rsvd2c[1];     // 0x2C
-
-
-	/* PRU_CFG_IEPCLK register bit field */
-	union {
-		volatile uint32_t IEPCLK;
-
-		volatile struct {
-			unsigned OCP_EN : 1;		// 0
-			unsigned rsvd1 : 31;		// 31:1
-		} IEPCLK_bit;
-	};	// 0x30
-
-
-	/* PRU_CFG_SPP register bit field */
-	union {
-		volatile uint32_t SPP;
-
-		volatile struct {
-			unsigned PRU1_PAD_HP_EN : 1;	// 0
-			unsigned XFR_SHIFT_EN : 1;	// 1
-			unsigned rsvd2 : 30;		// 31:2
-		} SPP_bit;
-	};	// 0x34
-
-
-	uint32_t rsvd38[2];	// 0x38 - 0x3C
-
-
-	union {
-		volatile uint32_t PIN_MX;
-
-		volatile struct {
-			unsigned PIN_MUX_SEL : 8;	// 7:0
-			unsigned rsvd2 : 24;		// 31:8
-		} PIN_MX_bit;
-	};	//0x40
-} pruCfg;
-
-#ifdef __GNUC__
-static volatile pruCfg *__CT_CFG = (void *)0x00026000;
-#define CT_CFG	(*__CT_CFG)
-#else
-volatile __far pruCfg CT_CFG __attribute__((cregister("PRU_CFG", near), peripheral));
-#endif
-
-#endif /* _PRU_CFG_H_ */
diff --git a/lib/pru_rpmsg/include/am335x/pru_ctrl.h b/lib/pru_rpmsg/include/am335x/pru_ctrl.h
deleted file mode 100644
index 3bade9f2..00000000
--- a/lib/pru_rpmsg/include/am335x/pru_ctrl.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *	* Redistributions of source code must retain the above copyright
- *	  notice, this list of conditions and the following disclaimer.
- *
- *	* Redistributions in binary form must reproduce the above copyright
- *	  notice, this list of conditions and the following disclaimer in the
- *	  documentation and/or other materials provided with the
- *	  distribution.
- *
- *	* Neither the name of Texas Instruments Incorporated nor the names of
- *	  its contributors may be used to endorse or promote products derived
- *	  from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _PRU_CTRL_H_
-#define _PRU_CTRL_H_
-
-/* PRU_CTRL register set */
-typedef struct {
-
-	/* PRU_CTRL_CTRL register bit field */
-	union {
-		volatile uint32_t CTRL;
-
-		volatile struct {
-			unsigned SOFT_RST_N : 1;
-			unsigned EN : 1;
-			unsigned SLEEPING : 1;
-			unsigned CTR_EN : 1;
-			unsigned rsvd4 : 4;
-			unsigned SINGLE_STEP : 1;
-			unsigned rsvd9 : 6;
-			unsigned RUNSTATE : 1;
-			unsigned PCTR_RST_VAL : 16;
-		} CTRL_bit;
-	};	// 0x0
-
-
-	/* PRU_CTRL_STS register bit field */
-	union {
-		volatile uint32_t STS;
-
-		volatile struct {
-			unsigned PCTR : 16;
-			unsigned rsvd16 : 16;
-		} STS_bit;
-	};	// 0x4
-
-
-	/* PRU_CTRL_WAKEUP_EN register bit field */
-	union {
-		volatile uint32_t WAKEUP_EN;
-
-		volatile struct {
-			unsigned BITWISE_ENS : 32;
-		} WAKEUP_EN_bit;
-	};	// 0x8
-
-
-	/* PRU_CTRL_CYCLE register bit field */
-	union {
-		volatile uint32_t CYCLE;
-
-		volatile struct {
-			unsigned CYCLECOUNT : 32;
-		} CYCLE_bit;
-	};	// 0xC
-
-
-	/* PRU_CTRL_STALL register bit field */
-	union {
-		volatile uint32_t STALL;
-
-		volatile  struct {
-			unsigned STALLCOUNT : 32;
-		} STALL_bit;
-	};	// 0x10
-
-
-	uint32_t rsvd14[3];	// 0x14 - 0x1C
-
-
-	/* PRU_CTRL_CTBIR0 register bit field */
-	union {
-		volatile uint32_t CTBIR0;
-
-		volatile struct {
-			unsigned C24_BLK_IDX : 8;
-			unsigned rsvd8 : 8;
-			unsigned C25_BLK_IDX : 8;
-			unsigned rsvd24 : 8;
-		} CTBIR0_bit;
-	};	// 0x20
-
-
-	/* PRU_CTRL_CTBIR1 register bit field */
-	union {
-		volatile uint32_t CTBIR1;
-
-		volatile struct {
-			unsigned C26_BLK_IDX : 8;
-			unsigned rsvd8 : 8;
-			unsigned C27_BLK_IDX : 8;
-			unsigned rsvd24 : 8;
-		} CTBIR1_bit;
-	};	// 0x24
-
-
-	/* PRU_CTRL_CTPPR0 register bit field */
-	union {
-		volatile uint32_t CTPPR0;
-
-		volatile struct {
-			unsigned C28_BLK_POINTER : 16;
-			unsigned C29_BLK_POINTER : 16;
-		} CTPPR0_bit;
-	};	// 0x28
-
-
-	/* PRU_CTRL_CTPPR1 register bit field */
-	union {
-		volatile uint32_t CTPPR1;
-
-		volatile struct {
-			unsigned C30_BLK_POINTER : 16;
-			unsigned C31_BLK_POINTER : 16;
-		} CTPPR1_bit;
-	};	// 0x2C
-
-} pruCtrl;
-
-/* Definition of control register structures. */
-#define PRU0_CTRL (*((volatile pruCtrl*)0x22000))
-#define PRU1_CTRL (*((volatile pruCtrl*)0x24000))
-
-#endif /* _PRU_CTRL_H_ */
diff --git a/lib/pru_rpmsg/include/am335x/pru_ecap.h b/lib/pru_rpmsg/include/am335x/pru_ecap.h
deleted file mode 100644
index 8385fc9b..00000000
--- a/lib/pru_rpmsg/include/am335x/pru_ecap.h
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *	* Redistributions of source code must retain the above copyright
- *	  notice, this list of conditions and the following disclaimer.
- *
- *	* Redistributions in binary form must reproduce the above copyright
- *	  notice, this list of conditions and the following disclaimer in the
- *	  documentation and/or other materials provided with the
- *	  distribution.
- *
- *	* Neither the name of Texas Instruments Incorporated nor the names of
- *	  its contributors may be used to endorse or promote products derived
- *	  from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _PRU_ECAP_H_
-#define _PRU_ECAP_H_
-
-/* PRU_ECAP register set */
-typedef struct {
-
-	/* PRU_ECAP_TSCTR register bit field */
-	union {
-		volatile uint32_t TSCTR;
-
-		volatile struct {
-			unsigned TSCTR	: 32;		//31:0
-		} TSCTR_bit;
-	};	// 0x0
-
-	/* PRU_ECAP_CTRPHS register bit field */
-	union {
-		volatile uint32_t CTRPHS;
-
-		volatile struct {
-			unsigned CTRPHS	: 32;		//31:0
-		} CTRPHS_bit;
-	};	// 0x4
-
-	/* PRU_ECAP_CAP1 register bit field */
-	union {
-		volatile uint32_t CAP1;
-
-		volatile struct {
-			unsigned CAP1	: 32;		//31:0
-		} CAP1_bit;
-	};	// 0x8
-
-	/* PRU_ECAP_CAP2 register bit field */
-	union {
-		volatile uint32_t CAP2;
-
-		volatile struct {
-			unsigned CAP2	: 32;		//31:0
-		} CAP2_bit;
-	};	// 0xC
-
-	/* PRU_ECAP_CAP3 register bit field */
-	union {
-		volatile uint32_t CAP3;
-
-		volatile struct {
-			unsigned CAP3	: 32;		//31:0
-		} CAP3_bit;
-	};	// 0x10
-
-	/* PRU_ECAP_CAP4 register bit field */
-	union {
-		volatile uint32_t CAP4;
-
-		volatile struct {
-			unsigned CAP4	: 32;		//31:0
-		} CAP4_bit;
-	};	// 0x14
-
-	uint32_t rsvd118[4];		// 0x118 - 0x124
-
-	/* PRU_ECAP_ECCTL1 register bit field */
-	volatile uint16_t ECCTL1; // 0x28
-
-	/* PRU_ECAP_ECCTL2 register bit field */
-	volatile uint16_t ECCTL2;	// 0x2A
-
-	/* PRU_ECAP_ECEINT register bit field */
-	volatile uint16_t ECEINT;	// 0x2C
-
-	/* PRU_ECAP_ECFLG register bit field */
-	volatile uint16_t ECFLG;	// 0x2E
-
-	/* PRU_ECAP_ECCLR register bit field */
-	volatile uint16_t ECCLR;	// 0x30
-
-	/* PRU_ECAP_ECFRC register bit field */
-	volatile uint16_t ECFRC;	// 0x32
-
-	uint32_t rsvd34[10];		// 0x34 - 0x58
-
-	/* PRU_ECAP_REVID register bit field */
-	union {
-		volatile uint32_t REVID;
-
-		volatile struct {
-			unsigned REV		: 32;		//31:0
-		} REVID_bit;
-	};	// 0x5C
-} pruEcap;
-
-volatile __far pruEcap CT_ECAP __attribute__((cregister("PRU_ECAP", near), peripheral));
-
-#endif /* _PRU_ECAP_H_ */
diff --git a/lib/pru_rpmsg/include/am335x/pru_intc.h b/lib/pru_rpmsg/include/am335x/pru_intc.h
deleted file mode 100644
index 1291940d..00000000
--- a/lib/pru_rpmsg/include/am335x/pru_intc.h
+++ /dev/null
@@ -1,912 +0,0 @@
-/*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *	* Redistributions of source code must retain the above copyright
- *	  notice, this list of conditions and the following disclaimer.
- *
- *	* Redistributions in binary form must reproduce the above copyright
- *	  notice, this list of conditions and the following disclaimer in the
- *	  documentation and/or other materials provided with the
- *	  distribution.
- *
- *	* Neither the name of Texas Instruments Incorporated nor the names of
- *	  its contributors may be used to endorse or promote products derived
- *	  from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _PRU_INTC_H_
-#define _PRU_INTC_H_
-
-/* PRU INTC register set */
-typedef struct {
-
-	/* PRU_INTC_REVID register bit field */
-	union {
-		volatile uint32_t REVID;
-
-		volatile struct {
-			unsigned REV_MINOR : 6;		// 5:0
-			unsigned REV_CUSTOM : 2;	// 7:6
-			unsigned REV_MAJOR : 3;		// 10:8
-			unsigned REV_RTL : 5;		// 15:11
-			unsigned REV_MODULE : 12;	// 27:16
-			unsigned rsvd28 : 2;		// 29:28
-			unsigned REV_SCHEME : 2;	// 31:30
-		} REVID_bit;
-	};	// 0x0
-
-
-	/* PRU_INTC_CR register bit field */
-	union {
-		volatile uint32_t CR;
-
-		volatile struct {
-			unsigned rsvd0 : 2;		// 1:0
-			unsigned NEST_MODE : 2;		// 3:2
-			unsigned rsvd4 : 28;		// 31:4
-		} CR_bit;
-	};	// 0x4
-
-
-	uint32_t rsvd8[2];		// 0x8 - 0xC
-
-
-	/* PRU_INTC_GER register bit field */
-	union {
-		volatile uint32_t GER;
-
-		volatile struct {
-			unsigned EN_HINT_ANY : 1;	// 0
-			unsigned rsvd1 : 31;		// 31:1
-		} GER_bit;
-	};	// 0x10
-
-
-	uint32_t rsvd14[2];	// 0x14 - 0x18
-
-
-	/* PRU_INTC_GNLR register bit field */
-	union {
-		volatile uint32_t GNLR;
-
-		volatile struct {
-			unsigned GLB_NEST_LEVEL : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} GNLR_bit;
-	};	// 0x1C
-
-
-	/* PRU_INTC_SISR register bit field */
-	union {
-		volatile uint32_t SISR;
-
-		volatile struct {
-			unsigned STS_SET_IDX : 10;	// 9:0
-			unsigned rsvd10 : 22;		// 31:10
-		} SISR_bit;
-	};	// 0x20
-
-
-	/* PRU_INTC_SICR register bit field */
-	union {
-		volatile uint32_t SICR;
-
-		volatile struct {
-			unsigned STS_CLR_IDX : 10;	// 9:0
-			unsigned rsvd10 : 22;		// 31:10
-		} SICR_bit;
-	};	// 0x24
-
-
-	/* PRU_INTC_EISR register bit field */
-	union {
-		volatile uint32_t EISR;
-
-		volatile struct {
-			unsigned EN_SET_IDX : 10;	// 9:0
-			unsigned rsvd10 : 22;		// 31:10
-		} EISR_bit;
-	};	// 0x28
-
-
-	/* PRU_INTC_EICR register bit field */
-	union {
-		volatile uint32_t EICR;
-
-		volatile struct {
-			unsigned EN_CLR_IDX : 10;	// 9:0
-			unsigned rsvd10 : 22;		// 31:10
-		} EICR_bit;
-	};	// 0x2C
-
-
-	uint32_t rsvd30;	// 0x30
-
-
-	/* PRU_INTC_HIEISR register bit field */
-	union {
-		volatile uint32_t HIEISR;
-
-		volatile struct {
-			unsigned HINT_EN_SET_IDX : 4;	// 3:0
-			unsigned rsvd4 : 28;		// 31:4
-		} HIEISR_bit;
-	};	// 0x34
-
-
-	/* PRU_INTC_HIDISR register bit field */
-	union {
-		volatile uint32_t HIDISR;
-
-		volatile struct {
-			unsigned HINT_EN_CLR_IDX : 4;	// 3:0
-			unsigned rsvd4 : 28;		// 31:4
-		} HIDISR_bit;
-	};	// 0x38
-
-
-	uint32_t rsvd3C[17];	// 0x3C - 0x7C
-
-
-	/* PRU_INTC_GPIR register bit field */
-	union {
-		volatile uint32_t GPIR;
-
-		volatile struct {
-			unsigned GLB_PRI_INTR : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned GLB_NONE : 1;		// 31
-		} GPIR_bit;
-	};	// 0x80
-
-
-	uint32_t rsvd84[95];	// 0x84 - 0x1FC
-
-
-	/* PRU_INTC_SRSR0 register bit field */
-	union {
-		volatile uint32_t SRSR0;
-
-		volatile struct {
-			unsigned RAW_STS_31_0 : 32;	// 31:0
-		} SRSR0_bit;
-	};	// 0x200
-
-
-	/* PRU_INTC_SRSR1 register bit field */
-	union {
-		volatile uint32_t SRSR1;
-
-		volatile struct {
-			unsigned RAW_STS_63_32 : 32;	// 31:0
-		} SRSR1_bit;
-	};	// 0x204
-
-
-	uint32_t rsvd208[30];	// 0x208 - 0x27C
-
-
-	/* PRU_INTC_SECR0 register bit field */
-	union {
-		volatile uint32_t SECR0;
-
-		volatile struct {
-			unsigned ENA_STS_31_0 : 32;	// 31:0
-		} SECR0_bit;
-	};	// 0x280
-
-
-	/* PRU_INTC_SECR1 register bit field */
-	union {
-		volatile uint32_t SECR1;
-
-		volatile struct {
-			unsigned ENA_STS_63_32 : 32;	// 31:0
-		} SECR1_bit;
-	};	// 0x284
-
-
-	uint32_t rsvd288[30];	// 0x288 - 0x2FC
-
-
-	/* PRU_INTC_ESR0 register bit field */
-	union {
-		volatile uint32_t ESR0;
-
-		volatile struct {
-			unsigned EN_SET_31_0 : 32;	// 31:0
-		} ESR0_bit;
-	};	// 0x300
-
-
-	/* PRU_INTC_ESR1 register bit field */
-	union {
-		volatile uint32_t ESR1;
-
-		volatile struct {
-			unsigned EN_SET_63_32 : 32;	// 31:0
-		} ESR1_bit;
-	};	// 0x304
-
-
-	uint32_t rsvd308[30];	// 0x308 - 0x37C
-
-
-	/* PRU_INTC_ECR0 register bit field */
-	union {
-		volatile uint32_t ECR0;
-
-		volatile struct {
-			unsigned EN_CLR_31_0 : 32;	// 31:0
-		} ECR0_bit;
-	};	// 0x380
-
-
-	/* PRU_INTC_ECR1 register bit field */
-	union {
-		volatile uint32_t ECR1;
-
-		volatile struct {
-			unsigned EN_CLR_63_32 : 32;	// 31:0
-		} ECR1_bit;
-	};	// 0x384
-
-
-	uint32_t rsvd388[30];	// 0x388 - 0x3FC
-
-
-	/* PRU_INTC_CMR0 register bit field */
-	union {
-		volatile uint32_t CMR0;
-
-		volatile struct {
-			unsigned CH_MAP_0 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_1 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_2 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_3 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR0_bit;
-	};	// 0x400
-
-
-	/* PRU_INTC_CMR1 register bit field */
-	union {
-		volatile uint32_t CMR1;
-
-		volatile struct {
-			unsigned CH_MAP_4 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_5 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_6 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_7 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR1_bit;
-	};	// 0x404
-
-
-	/* PRU_INTC_CMR2 register bit field */
-	union {
-		volatile uint32_t CMR2;
-
-		volatile struct {
-			unsigned CH_MAP_8 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_9 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_10 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_11 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR2_bit;
-	};	// 0x408
-
-
-	/* PRU_INTC_CMR3 register bit field */
-	union {
-		volatile uint32_t CMR3;
-
-		volatile struct {
-			unsigned CH_MAP_12 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_13 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_14 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_15 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR3_bit;
-	};	// 0x40C
-
-
-	/* PRU_INTC_CMR4 register bit field */
-	union {
-		volatile uint32_t CMR4;
-
-		volatile struct {
-			unsigned CH_MAP_16 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_17 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_18 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_19 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR4_bit;
-	};	// 0x410
-
-
-	/* PRU_INTC_CMR5 register bit field */
-	union {
-		volatile uint32_t CMR5;
-
-		volatile struct {
-			unsigned CH_MAP_20 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_21 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_22 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_23 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR5_bit;
-	};	// 0x414
-
-
-	/* PRU_INTC_CMR6 register bit field */
-	union {
-		volatile uint32_t CMR6;
-
-		volatile struct {
-			unsigned CH_MAP_24 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_25 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_26 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_27 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR6_bit;
-	};	// 0x418
-
-
-	/* PRU_INTC_CMR7 register bit field */
-	union {
-		volatile uint32_t CMR7;
-
-		volatile struct {
-			unsigned CH_MAP_28 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_29 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_30 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_31 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR7_bit;
-	};	// 0x41C
-
-
-	/* PRU_INTC_CMR8 register bit field */
-	union {
-		volatile uint32_t CMR8;
-
-		volatile struct {
-			unsigned CH_MAP_32 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_33 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_34 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_35 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR8_bit;
-	};	// 0x420
-
-
-	/* PRU_INTC_CMR9 register bit field */
-	union {
-		volatile uint32_t CMR9;
-
-		volatile struct {
-			unsigned CH_MAP_36 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_37 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_38 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_39 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR9_bit;
-	};	// 0x424
-
-
-	/* PRU_INTC_CMR10 register bit field */
-	union {
-		volatile uint32_t CMR10;
-
-		volatile struct {
-			unsigned CH_MAP_40 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_41 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_42 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_43 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR10_bit;
-	};	// 0x428
-
-
-	/* PRU_INTC_CMR11 register bit field */
-	union {
-		volatile uint32_t CMR11;
-
-		volatile struct {
-			unsigned CH_MAP_44 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_45 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_46 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_47 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR11_bit;
-	};	// 0x42C
-
-
-	/* PRU_INTC_CMR12 register bit field */
-	union {
-		volatile uint32_t CMR12;
-
-		volatile struct {
-			unsigned CH_MAP_48 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_49 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_50 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_51 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR12_bit;
-	};	// 0x430
-
-
-	/* PRU_INTC_CMR13 register bit field */
-	union {
-		volatile uint32_t CMR13;
-
-		volatile struct {
-			unsigned CH_MAP_52 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_53 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_54 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_55 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR13_bit;
-	};	// 0x434
-
-
-	/* PRU_INTC_CMR14 register bit field */
-	union {
-		volatile uint32_t CMR14;
-
-		volatile struct {
-			unsigned CH_MAP_56 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_57 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_58 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_59 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR14_bit;
-	};	// 0x438
-
-
-	/* PRU_INTC_CMR15 register bit field */
-	union {
-		volatile uint32_t CMR15;
-
-		volatile struct {
-			unsigned CH_MAP_60 : 4;		// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned CH_MAP_61 : 4;		// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned CH_MAP_62 : 4;		// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned CH_MAP_63 : 4;		// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} CMR15_bit;
-	};	// 0x43C
-
-
-	uint32_t rsvd440[240];	// 0x440 - 0x7FC
-
-
-	/* PRU_INTC_HMR0 register bit field */
-	union {
-		volatile uint32_t HMR0;
-
-		volatile struct {
-			unsigned HINT_MAP_0 : 4;	// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned HINT_MAP_1 : 4;	// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned HINT_MAP_2 : 4;	// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned HINT_MAP_3 : 4;	// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} HMR0_bit;
-	};	// 0x800
-
-
-	/* PRU_INTC_HMR1 register bit field */
-	union {
-		volatile uint32_t HMR1;
-
-		volatile struct {
-			unsigned HINT_MAP_4 : 4;	// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned HINT_MAP_5 : 4;	// 11:8
-			unsigned rsvd12 : 4;		// 15:12
-			unsigned HINT_MAP_6 : 4;	// 19:16
-			unsigned rsvd20 : 4;		// 23:20
-			unsigned HINT_MAP_7 : 4;	// 27:24
-			unsigned rsvd28 : 4;		// 31:28
-		} HMR1_bit;
-	};	// 0x804
-
-
-	/* PRU_INTC_HMR2 register bit field */
-	union {
-		volatile uint32_t HMR2;
-
-		volatile struct {
-			unsigned HINT_MAP_8 : 4;	// 3:0
-			unsigned rsvd4 : 4;		// 7:4
-			unsigned HINT_MAP_9 : 4;	// 11:8
-			unsigned rsvd12 : 20;		// 31:12
-		} HMR2_bit;
-	};	// 0x808
-
-
-	uint32_t rsvd80C[61];	// 0x80C - 0x8FC
-
-
-	/* PRU_INTC_HIPIR0 register bit field */
-	union {
-		volatile uint32_t HIPIR0;
-
-		volatile struct {
-			unsigned PRI_HINT_0 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_0 : 1;	// 31
-		} HIPIR0_bit;
-	};	// 0x900
-
-
-	/* PRU_INTC_HIPIR1 register bit field */
-	union {
-		volatile uint32_t HIPIR1;
-
-		volatile struct {
-			unsigned PRI_HINT_1 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_1 : 1;	// 31
-		} HIPIR1_bit;
-	};	// 0x904
-
-
-	/* PRU_INTC_HIPIR2 register bit field */
-	union {
-		volatile uint32_t HIPIR2;
-
-		volatile struct {
-			unsigned PRI_HINT_2 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_2 : 1;	// 31
-		} HIPIR2_bit;
-	};	// 0x908
-
-
-	/* PRU_INTC_HIPIR3 register bit field */
-	union {
-		volatile uint32_t HIPIR3;
-
-		volatile struct {
-			unsigned PRI_HINT_3 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_3 : 1;	// 31
-		} HIPIR3_bit;
-	};	// 0x90C
-
-
-	/* PRU_INTC_HIPIR4 register bit field */
-	union {
-		volatile uint32_t HIPIR4;
-
-		volatile struct {
-			unsigned PRI_HINT_4 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_4 : 1;	// 31
-		} HIPIR4_bit;
-	};	// 0x910
-
-
-	/* PRU_INTC_HIPIR5 register bit field */
-	union {
-		volatile uint32_t HIPIR5;
-
-		volatile struct {
-			unsigned PRI_HINT_5 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_5 : 1;	// 31
-		} HIPIR5_bit;
-	};	// 0x914
-
-
-	/* PRU_INTC_HIPIR6 register bit field */
-	union {
-		volatile uint32_t HIPIR6;
-
-		volatile struct {
-			unsigned PRI_HINT_6 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_6 : 1;	// 31
-		} HIPIR6_bit;
-	};	// 0x918
-
-
-	/* PRU_INTC_HIPIR7 register bit field */
-	union {
-		volatile uint32_t HIPIR7;
-
-		volatile struct {
-			unsigned PRI_HINT_7 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_7 : 1;	// 31
-		} HIPIR7_bit;
-	};	// 0x91C
-
-
-	/* PRU_INTC_HIPIR8 register bit field */
-	union {
-		volatile uint32_t HIPIR8;
-
-		volatile struct {
-			unsigned PRI_HINT_8 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_8 : 1;	// 31
-		} HIPIR8_bit;
-	};	// 0x920
-
-
-	/* PRU_INTC_HIPIR9 register bit field */
-	union {
-		volatile uint32_t HIPIR9;
-
-		volatile struct {
-			unsigned PRI_HINT_9 : 10;	// 9:0
-			unsigned rsvd10 : 21;		// 30:10
-			unsigned NONE_HINT_9 : 1;	// 31
-		} HIPIR9_bit;
-	};	// 0x924
-
-
-	uint32_t rsvd928[246];	// 0x928 - 0xCFC
-
-
-	/* PRU_INTC_SIPR0 register bit field */
-	union {
-		volatile uint32_t SIPR0;
-
-		volatile struct {
-			unsigned POLARITY_31_0 : 32;	// 31:0
-		} SIPR0_bit;
-	};	// 0xD00
-
-
-	/* PRU_INTC_SIPR1 register bit field */
-	union {
-		volatile uint32_t SIPR1;
-
-		volatile struct {
-			unsigned POLARITY_63_32 : 32;	// 31:0
-		} SIPR1_bit;
-	};	// 0xD04
-
-
-	uint32_t rsvdD08[30];	// 0xD08 - 0xD7C
-
-
-	/* PRU_INTC_SITR0 register bit field */
-	union {
-		volatile uint32_t SITR0;
-
-		volatile struct {
-			unsigned TYPE_31_0 : 32;	// 31:0
-		} SITR0_bit;
-	};	// 0xD80
-
-
-	/* PRU_INTC_SITR1 register bit field */
-	union {
-		volatile uint32_t SITR1;
-
-		volatile struct {
-			unsigned TYPE_63_32 : 32;	// 31:0
-		} SITR1_bit;
-	};	// 0xD84
-
-
-	uint32_t rsvdD84[222];	// 0xD88 - 0x10FC
-
-
-	/* PRU_INTC_HINLR0 register bit field */
-	union {
-		volatile uint32_t HINLR0;
-
-		volatile struct {
-			unsigned NEST_HINT_0 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR0_bit;
-	};	// 0x1100
-
-
-	/* PRU_INTC_HINLR1 register bit field */
-	union {
-		volatile uint32_t HINLR1;
-
-		volatile struct {
-			unsigned NEST_HINT_1 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR1_bit;
-	};	// 0x1104
-
-
-	/* PRU_INTC_HINLR2 register bit field */
-	union {
-		volatile uint32_t HINLR2;
-
-		volatile struct {
-			unsigned NEST_HINT_2 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR2_bit;
-	};	// 0x1108
-
-
-	/* PRU_INTC_HINLR3 register bit field */
-	union {
-		volatile uint32_t HINLR3;
-
-		volatile struct {
-			unsigned NEST_HINT_3 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR3_bit;
-	};	// 0x110C
-
-
-	/* PRU_INTC_HINLR4 register bit field */
-	union {
-		volatile uint32_t HINLR4;
-
-		volatile struct {
-			unsigned NEST_HINT_4 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR4_bit;
-	};	// 0x1110
-
-
-	/* PRU_INTC_HINLR5 register bit field */
-	union {
-		volatile uint32_t HINLR5;
-
-		volatile struct {
-			unsigned NEST_HINT_5 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR5_bit;
-	};	// 0x1114
-
-
-	/* PRU_INTC_HINLR6 register bit field */
-	union {
-		volatile uint32_t HINLR6;
-
-		volatile struct {
-			unsigned NEST_HINT_6 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR6_bit;
-	};	// 0x1118
-
-
-	/* PRU_INTC_HINLR7 register bit field */
-	union {
-		volatile uint32_t HINLR7;
-
-		volatile struct {
-			unsigned NEST_HINT_7 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR7_bit;
-	};	// 0x111C
-
-
-	/* PRU_INTC_HINLR8 register bit field */
-	union {
-		volatile uint32_t HINLR8;
-
-		volatile struct {
-			unsigned NEST_HINT_8 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR8_bit;
-	};	// 0x1120
-
-
-	/* PRU_INTC_HINLR9 register bit field */
-	union {
-		volatile uint32_t HINLR9;
-
-		volatile struct {
-			unsigned NEST_HINT_9 : 9;	// 8:0
-			unsigned rsvd9 : 22;		// 30:9
-			unsigned AUTO_OVERRIDE : 1;	// 31
-		} HINLR9_bit;
-	};	// 0x1124
-
-
-	uint32_t rsvd1128[246];	// 0x1128 - 0x14FC
-
-
-	/* PRU_INTC_HIER register bit field */
-	union {
-		volatile uint32_t HIER;
-
-		volatile struct {
-			unsigned EN_HINT : 10;	// 9:0
-			unsigned rsvd9 : 22;		// 31:10
-		} HIER_bit;
-	};	// 0x1500
-
-} pruIntc;
-
-#ifdef __GNUC__
-static volatile pruIntc *__CT_INTC = (void *)0x00020000;
-#define CT_INTC	(*__CT_INTC)
-#else
-volatile __far pruIntc CT_INTC __attribute__((cregister("PRU_INTC", far), peripheral));
-#endif
-
-#endif /* _PRU_INTC_H_ */
diff --git a/lib/pru_rpmsg/include/am335x/pru_uart.h b/lib/pru_rpmsg/include/am335x/pru_uart.h
deleted file mode 100644
index 999f81ab..00000000
--- a/lib/pru_rpmsg/include/am335x/pru_uart.h
+++ /dev/null
@@ -1,285 +0,0 @@
-/*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *	* Redistributions of source code must retain the above copyright
- *	  notice, this list of conditions and the following disclaimer.
- *
- *	* Redistributions in binary form must reproduce the above copyright
- *	  notice, this list of conditions and the following disclaimer in the
- *	  documentation and/or other materials provided with the
- *	  distribution.
- *
- *	* Neither the name of Texas Instruments Incorporated nor the names of
- *	  its contributors may be used to endorse or promote products derived
- *	  from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _PRU_UART_H_
-#define _PRU_UART_H_
-
-/* UART Register set */
-typedef struct {
-
-	/*
-	 * RBR and THR register pair
-	 * This is a unique register pair in that RBR and THR
-	 * share the same address. RBR is read-only while THR is
-	 * write-only.
-	 *
-	 * Additionally, RBR and THR share an address with DLL. To
-	 * read/write RBR/THR write 0 to the DLAB bit in the LCR
-	 * register. To modify DLL write a 1.
-	 *
-	 * DLL also has a dedicated
-	 * address which does not require toggling the DLAB bit.
-	 */
-	union {
-		/* PRU_UART_RBR register bit field */
-		union {
-			volatile uint32_t RBR;
-
-			volatile struct {
-				unsigned DATA : 8;		// 7:0
-				unsigned rsvd8 : 24;		// 31:8
-			} RBR_bit;
-		};
-
-		/* PRU_UART_THR register bit field */
-		union {
-			volatile uint32_t THR;
-
-			volatile struct {
-				unsigned DATA : 8;		// 7:0
-				unsigned rsvd8 : 24;		// 31:8
-			} THR_bit;
-		};
-	};	// 0x0
-
-
-	/* PRU_UART_IER register bit field */
-	/*
-	 * IER shares an address with DLH. To modify IER write 0
-	 * to the DLAB bit in the LCR register. To modify DLH write a 1.
-	 *
-	 * DLH also has a dedicated address which does not require
-	 * toggling the DLAB bit.
-	 */
-	union {
-		volatile uint32_t IER;
-
-		volatile struct {
-			unsigned ERBI : 1;		// 0
-			unsigned ETBEI : 1;		// 1
-			unsigned ELSI : 1;		// 2
-			unsigned EDSSI : 1;		// 3
-			unsigned rsvd4 : 28;		// 31:4
-		} IER_bit;
-	};	// 0x4
-
-
-	/*
-	 * IIR and FCR register pair
-	 * This is a unique register pair in that IIR and FCR
-	 * share the same address. IIR is read-only while FCR is
-	 * write-only.
-	 */
-	union {
-		/* PRU_UART_IIR register bit field */
-		union {
-			volatile uint32_t IIR;
-
-			volatile struct {
-				unsigned IPEND : 1;		// 0
-				unsigned INTID : 3;		// 3:1
-				unsigned rsvd4 : 2;		// 5:4
-				unsigned FIFOEN : 2;		// 7:6
-				unsigned rsvd8 : 24;		// 31:8
-			} IIR_bit;
-		};
-
-		/* PRU_UART_FCR register bit field */
-		union {
-			volatile uint32_t FCR;
-
-			volatile struct {
-				unsigned FIFOEN : 1;		// 0
-				unsigned RXCLR : 1;		// 1
-				unsigned TXCLR : 1;		// 2
-				unsigned DMAMODE1 : 1;		// 3
-				unsigned rsvd4 : 2;		// 5:4
-				unsigned RXFIFTL : 2;		// 7:6
-				unsigned rsvd8 : 24;		// 31:8
-			} FCR_bit;
-		};
-	};	// 0x8
-
-
-	/* PRU_UART_LCR register bit field */
-	union {
-		volatile uint32_t LCR;
-
-		volatile struct {
-			unsigned WLS : 2;		// 1:0
-			unsigned STB : 1;		// 2
-			unsigned PEN : 1;		// 3
-			unsigned EPS : 1;		// 4
-			unsigned SP : 1;		// 5
-			unsigned BC : 1;		// 6
-			unsigned DLAB : 1;		// 7
-			unsigned rsvd8 : 24;		// 31:8
-		} LCR_bit;
-	};	// 0xC
-
-
-	/* PRU_UART_MCR register bit field */
-	union {
-		volatile uint32_t MCR;
-
-		volatile struct {
-			unsigned rsvd0 : 1;		// 0
-			unsigned RTS : 1;		// 1
-			unsigned OUT1 : 1;		// 2
-			unsigned OUT2 : 1;		// 3
-			unsigned LOOP : 1;		// 4
-			unsigned AFE : 1;		// 5
-			unsigned rsvd8 : 26;		// 31:6
-		} MCR_bit;
-	};	// 0x10
-
-
-	/* PRU_UART_LSR register bit field */
-	union {
-		volatile uint32_t LSR;
-
-		volatile struct {
-			unsigned DR : 1;		// 0
-			unsigned OE : 1;		// 1
-			unsigned PE : 1;		// 2
-			unsigned FE : 1;		// 3
-			unsigned BI : 1;		// 4
-			unsigned THRE : 1;		// 5
-			unsigned TEMT : 1;		// 6
-			unsigned RXFIFOE : 1;		// 7
-			unsigned rsvd8 : 24;		// 31:8
-		} LSR_bit;
-	};	// 0x14
-
-
-	/* PRU_UART_MSR register bit field */
-	union {
-		volatile uint32_t MSR;
-
-		volatile struct {
-			unsigned DCTS : 1;		// 0
-			unsigned DDSR : 1;		// 1
-			unsigned TERI : 1;		// 2
-			unsigned DCD : 1;		// 3
-			unsigned CTS : 1;		// 4
-			unsigned DSR : 1;		// 5
-			unsigned RI : 1;		// 6
-			unsigned CD : 1;		// 7
-			unsigned rsvd8 : 24;		// 31:8
-		} MSR_bit;
-	};	// 0x18
-
-
-	/* PRU_UART_SCR register bit field */
-	union {
-		volatile uint32_t SCR;
-
-		volatile struct {
-			unsigned SCR : 8;		// 7:0
-			unsigned rsvd8 : 24;		// 31:8
-		} SCR_bit;
-	};	// 0x1C
-
-
-	/* PRU_UART_DLL register bit field */
-	union {
-		volatile uint32_t DLL;
-
-		volatile struct {
-			unsigned DLL : 8;		// 7:0
-			unsigned rsvd8 : 24;		// 31:8
-		} DLL_bit;
-	};	// 0x20
-
-
-	/* PRU_UART_DLH register bit field */
-	union {
-		volatile uint32_t DLH;
-
-		volatile  struct {
-			unsigned DLH : 8;		// 7:0
-			unsigned rsvd8 : 24;		// 31:8
-		} DLH_bit;
-	};	// 0x24
-
-
-	/* PRU_UART_REVID1 register bit field */
-	union {
-		volatile uint32_t REVID1;
-
-		volatile struct {
-			unsigned REVID1 : 32;		// 31:0
-		} REVID1_bit;
-	};	// 0x28
-
-
-	/* PRU_UART_REVID2 register bit field */
-	union {
-		volatile uint32_t REVID2;
-
-		volatile struct {
-			unsigned REVID2 : 8;		// 7:0
-			unsigned rsvd8	: 24;		// 31:8
-		} REVID2_bit;
-	};	// 0x2C
-
-
-	/* PRU_UART_PWREMU_MGMT register bit field */
-	union {
-		volatile uint32_t PWREMU_MGMT;
-
-		volatile struct {
-			unsigned FREE : 1;		// 0
-			unsigned rsvd1 : 12;		// 12:1
-			unsigned URRST : 1;		// 13
-			unsigned UTRST : 1;		// 14
-			unsigned rsvd15 : 17;		// 31:15
-		} PWREMU_MGMT_bit;
-	};	// 0x30
-
-
-	/* PRU_UART_MDR register bit field */
-	union {
-		volatile uint32_t MDR;
-
-		volatile struct {
-			unsigned OSM_SEL : 1;		// 0
-			unsigned rsvd1 : 31;		// 31:1
-		} MDR_bit;
-	};	// 0x34
-
-} pruUart;
-
-volatile __far pruUart CT_UART __attribute__((cregister("PRU_UART", near), peripheral));
-
-#endif /* _PRU_UART_H_ */
diff --git a/lib/pru_rpmsg/include/am335x/sys_mailbox.h b/lib/pru_rpmsg/include/am335x/sys_mailbox.h
deleted file mode 100644
index f2750f75..00000000
--- a/lib/pru_rpmsg/include/am335x/sys_mailbox.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *	* Redistributions of source code must retain the above copyright
- *	  notice, this list of conditions and the following disclaimer.
- *
- *	* Redistributions in binary form must reproduce the above copyright
- *	  notice, this list of conditions and the following disclaimer in the
- *	  documentation and/or other materials provided with the
- *	  distribution.
- *
- *	* Neither the name of Texas Instruments Incorporated nor the names of
- *	  its contributors may be used to endorse or promote products derived
- *	  from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _SYS_MAILBOX_H_
-#define _SYS_MAILBOX_H_
-
-/* SYS_MAILBOX register set */
-typedef struct {
-
-	/* SYS_MAILBOX_REVISION register bit field */
-	union {
-		volatile uint32_t REVISION;
-
-		volatile struct {
-			unsigned MINOR	: 6;		//5:0
-			unsigned CUSTOM : 2;		//7:6
-			unsigned MAJOR	: 3;		//10:8
-			unsigned RTL	: 5;		//15:11
-			unsigned FUNC	: 12;		//27:16
-			unsigned rsvd28 : 2;		//29:28
-			unsigned SCHEME : 2;		//31:30
-		} REVISION_bit;
-	};	// 0x0
-
-	uint32_t rsvd4[3];		// 0x4 - 0xC
-
-	/* SYS_MAILBOX_SYSCONFIG register bit field */
-	union {
-		volatile uint32_t SYSCONFIG;
-
-		volatile struct {
-			unsigned SOFTRESET	: 1;	//0
-			unsigned rsvd		: 1;	//1
-			unsigned SLIDLEMODE : 2;	//3:2
-			unsigned rsvd1		: 28;	//31:4
-		} SYSCONFIG_bit;
-	};	// 0x10
-
-	uint32_t rsvd14[11];		// 0x14 - 0x3C
-
-	/* SYS_MAILBOX_MESSAGE register bit fields */
-	union {
-		volatile uint32_t MESSAGE[8];
-
-		volatile struct {
-			unsigned MESSAGE : 32;		//31:0
-		} MESSAGE_bit[8];
-	};	// 0x40-0x5C
-
-	uint32_t rsvd60[8];		// 0x60 - 0x7C
-
-	/* SYS_MAILBOX_FIFOSTATUS register bit fields */
-	union {
-		volatile uint32_t FIFOSTATUS[8];
-
-		volatile struct {
-			unsigned FIFOFULL	: 1;		//0
-			unsigned rsvd		: 31;		//31:1
-		} FIFOSTATUS_bit[8];
-	};	// 0x80-0x9C
-
-	uint32_t rsvdA0[8];		// 0xA0 - 0xBC
-
-	/* SYS_MAILBOX_MSGSTATUS register bit fields */
-	union {
-		volatile uint32_t MSGSTATUS[8];
-
-		volatile struct {
-			unsigned NBOFMSG : 3;		//2:0
-			unsigned rsvd	 : 29;		//31:3
-		} MSGSTATUS_bit[8];
-	};	// 0xC0-DC
-
-	uint32_t rsvdE0[8];		// 0xE0 - 0xFC
-
-	volatile struct {
-		union {
-			volatile uint32_t STATUS_RAW;
-
-			volatile struct {
-				unsigned NEWMSGSTATUSMB0	: 1;		//0
-				unsigned NOTFULLSTATUSMB0	: 1;		//1
-				unsigned NEWMSGSTATUSMB1	: 1;		//2
-				unsigned NOTFULLSTATUSMB1	: 1;		//3
-				unsigned NEWMSGSTATUSMB2	: 1;		//4
-				unsigned NOTFULLSTATUSMB2	: 1;		//5
-				unsigned NEWMSGSTATUSMB3	: 1;		//6
-				unsigned NOTFULLSTATUSMB3	: 1;		//7
-				unsigned NEWMSGSTATUSMB4	: 1;		//8
-				unsigned NOTFULLSTATUSMB4	: 1;		//9
-				unsigned NEWMSGSTATUSMB5	: 1;		//10
-				unsigned NOTFULLSTATUSMB5	: 1;		//11
-				unsigned NEWMSGSTATUSMB6	: 1;		//12
-				unsigned NOTFULLSTATUSMB6	: 1;		//13
-				unsigned NEWMSGSTATUSMB7	: 1;		//14
-				unsigned NOTFULLSTATUSMB7	: 1;		//15
-				unsigned rsvd				: 16;		//31:16
-			} STATUS_RAW_bit;
-		};
-		union {
-			volatile uint32_t STATUS_CLR;
-
-			volatile struct {
-				unsigned NEWMSGSTATUSMB0	: 1;		//0
-				unsigned NOTFULLSTATUSMB0	: 1;		//1
-				unsigned NEWMSGSTATUSMB1	: 1;		//2
-				unsigned NOTFULLSTATUSMB1	: 1;		//3
-				unsigned NEWMSGSTATUSMB2	: 1;		//4
-				unsigned NOTFULLSTATUSMB2	: 1;		//5
-				unsigned NEWMSGSTATUSMB3	: 1;		//6
-				unsigned NOTFULLSTATUSMB3	: 1;		//7
-				unsigned NEWMSGSTATUSMB4	: 1;		//8
-				unsigned NOTFULLSTATUSMB4	: 1;		//9
-				unsigned NEWMSGSTATUSMB5	: 1;		//10
-				unsigned NOTFULLSTATUSMB5	: 1;		//11
-				unsigned NEWMSGSTATUSMB6	: 1;		//12
-				unsigned NOTFULLSTATUSMB6	: 1;		//13
-				unsigned NEWMSGSTATUSMB7	: 1;		//14
-				unsigned NOTFULLSTATUSMB7	: 1;		//15
-				unsigned rsvd				: 16;		//31:16
-			} STATUS_CLR_bit;
-		};
-		union {
-			volatile uint32_t ENABLE_SET;
-
-			volatile struct {
-				unsigned NEWMSGSTATUSMB0	: 1;		//0
-				unsigned NOTFULLSTATUSMB0	: 1;		//1
-				unsigned NEWMSGSTATUSMB1	: 1;		//2
-				unsigned NOTFULLSTATUSMB1	: 1;		//3
-				unsigned NEWMSGSTATUSMB2	: 1;		//4
-				unsigned NOTFULLSTATUSMB2	: 1;		//5
-				unsigned NEWMSGSTATUSMB3	: 1;		//6
-				unsigned NOTFULLSTATUSMB3	: 1;		//7
-				unsigned NEWMSGSTATUSMB4	: 1;		//8
-				unsigned NOTFULLSTATUSMB4	: 1;		//9
-				unsigned NEWMSGSTATUSMB5	: 1;		//10
-				unsigned NOTFULLSTATUSMB5	: 1;		//11
-				unsigned NEWMSGSTATUSMB6	: 1;		//12
-				unsigned NOTFULLSTATUSMB6	: 1;		//13
-				unsigned NEWMSGSTATUSMB7	: 1;		//14
-				unsigned NOTFULLSTATUSMB7	: 1;		//15
-				unsigned rsvd				: 16;		//31:16
-			} ENABLE_SET_bit;
-		};
-		union {
-			volatile uint32_t ENABLE_CLR;
-
-			volatile struct {
-				unsigned NEWMSGSTATUSMB0	: 1;		//0
-				unsigned NOTFULLSTATUSMB0	: 1;		//1
-				unsigned NEWMSGSTATUSMB1	: 1;		//2
-				unsigned NOTFULLSTATUSMB1	: 1;		//3
-				unsigned NEWMSGSTATUSMB2	: 1;		//4
-				unsigned NOTFULLSTATUSMB2	: 1;		//5
-				unsigned NEWMSGSTATUSMB3	: 1;		//6
-				unsigned NOTFULLSTATUSMB3	: 1;		//7
-				unsigned NEWMSGSTATUSMB4	: 1;		//8
-				unsigned NOTFULLSTATUSMB4	: 1;		//9
-				unsigned NEWMSGSTATUSMB5	: 1;		//10
-				unsigned NOTFULLSTATUSMB5	: 1;		//11
-				unsigned NEWMSGSTATUSMB6	: 1;		//12
-				unsigned NOTFULLSTATUSMB6	: 1;		//13
-				unsigned NEWMSGSTATUSMB7	: 1;		//14
-				unsigned NOTFULLSTATUSMB7	: 1;		//15
-				unsigned rsvd				: 16;		//31:16
-			} ENABLE_CLR_bit;
-		};
-	} IRQ[4];
-
-} sysMailbox;
-
-#ifdef __GNUC__
-static volatile sysMailbox *__CT_MBX = (void *)0x480C8000;
-#define CT_MBX	(*__CT_MBX)
-#else
-volatile __far sysMailbox CT_MBX __attribute__((cregister("MBX0", far), peripheral));
-#endif
-
-#endif /* _SYS_MAILBOX_H_ */
diff --git a/lib/pru_rpmsg/include/am335x/sys_pwmss.h b/lib/pru_rpmsg/include/am335x/sys_pwmss.h
deleted file mode 100644
index ee9036c0..00000000
--- a/lib/pru_rpmsg/include/am335x/sys_pwmss.h
+++ /dev/null
@@ -1,446 +0,0 @@
-/*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *	* Redistributions of source code must retain the above copyright
- *	  notice, this list of conditions and the following disclaimer.
- *
- *	* Redistributions in binary form must reproduce the above copyright
- *	  notice, this list of conditions and the following disclaimer in the
- *	  documentation and/or other materials provided with the
- *	  distribution.
- *
- *	* Neither the name of Texas Instruments Incorporated nor the names of
- *	  its contributors may be used to endorse or promote products derived
- *	  from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _SYS_PWMSS_H_
-#define _SYS_PWMSS_H_
-
-/* SYS_PWMSS register set */
-typedef struct {
-
-	/***************************/
-	/* PWM Subsystem Registers */
-	/***************************/
-	/* SYS_PWMSS_IDVER register bit field */
-	union {
-		volatile uint32_t IDVER;
-
-		volatile struct {
-			unsigned Y_MINOR	: 6;		//5:0
-			unsigned CUSTOM		: 2;		//7:6
-			unsigned X_MAJOR	: 3;		//10:8
-			unsigned R_RTL		: 5;		//15:11
-			unsigned FUNC		: 12;		//27:16
-			unsigned rsvd28		: 2;		//29:28
-			unsigned SCHEME		: 2;		//31:30
-		} IDVER_bit;
-	};	// 0x0
-
-	/* SYS_PWMSS_SYSCONFIG register bit field */
-	union {
-		volatile uint32_t SYSCONFIG;
-
-		volatile struct {
-			unsigned SOFTRESET		: 1;		//0
-			unsigned FREEEMU		: 1;		//1
-			unsigned IDLEMODE		: 2;		//3:2
-			unsigned STANDBYMODE	: 2;		//5:4
-			unsigned rsvd6			: 26;		//31:6
-		} SYSCONFIG_bit;
-	};	// 0x4
-
-	/* SYS_PWMSS_CLKCONFIG register bit field */
-	union {
-		volatile uint32_t CLKCONFIG;
-
-		volatile struct {
-			unsigned ECAPCLK_EN			: 1;		//0
-			unsigned ECAPCLKSTOP_REQ	: 1;		//1
-			unsigned rsvd2				: 2;		//3:2
-			unsigned EQEPCLK_EN			: 1;		//4
-			unsigned EQEPCLKSTOP_REQ	: 1;		//5
-			unsigned rsvd6				: 2;		//7:6
-			unsigned EPWMCLK_EN			: 1;		//8
-			unsigned EPWMCLKSTOP_REQ	: 1;		//9
-			unsigned rsvd10				: 22;		//31:10
-		} CLKCONFIG_bit;
-	};	// 0x8
-
-	/* SYS_PWMSS_CLKSTATUS register bit field */
-	union {
-		volatile uint32_t CLKSTATUS;
-
-		volatile struct {
-			unsigned ECAPCLK_EN_ACK		: 1;		//0
-			unsigned ECAPCLKSTOP_ACK	: 1;		//1
-			unsigned rsvd2				: 2;		//3:2
-			unsigned EQEPCLK_EN_ACK		: 1;		//4
-			unsigned EQEPCLKSTOP_ACK	: 1;		//5
-			unsigned rsvd6				: 2;		//7:6
-			unsigned EPWMCLK_EN_ACK		: 1;		//8
-			unsigned EPWMCLKSTOP_ACK	: 1;		//9
-			unsigned rsvd10				: 22;		//31:10
-		} CLKSTATUS_bit;
-	};	// 0xC
-
-	uint32_t rsvd10[60];		// 0x10 - 0xFC
-
-	/*************************/
-	/* eCAP Module Registers */
-	/*************************/
-	/* SYS_PWMSS_ECAP_TSCTR register bit field */
-	union {
-		volatile uint32_t ECAP_TSCTR;
-
-		volatile struct {
-			unsigned TSCTR	: 32;		//31:0
-		} ECAP_TSCTR_bit;
-	};	// 0x100
-
-	/* SYS_PWMSS_ECAP_CTRPHS register bit field */
-	union {
-		volatile uint32_t ECAP_CTRPHS;
-
-		volatile struct {
-			unsigned CTRPHS	: 32;		//31:0
-		} ECAP_CTRPHS_bit;
-	};	// 0x104
-
-	/* SYS_PWMSS_ECAP_CAP1 register bit field */
-	union {
-		volatile uint32_t ECAP_CAP1;
-
-		volatile struct {
-			unsigned CAP1	: 32;		//31:0
-		} ECAP_CAP1_bit;
-	};	// 0x108
-
-	/* SYS_PWMSS_ECAP_CAP2 register bit field */
-	union {
-		volatile uint32_t ECAP_CAP2;
-
-		volatile struct {
-			unsigned CAP2	: 32;		//31:0
-		} ECAP_CAP2_bit;
-	};	// 0x10C
-
-	/* SYS_PWMSS_ECAP_CAP3 register bit field */
-	union {
-		volatile uint32_t ECAP_CAP3;
-
-		volatile struct {
-			unsigned CAP3	: 32;		//31:0
-		} ECAP_CAP3_bit;
-	};	// 0x110
-
-	/* SYS_PWMSS_ECAP_CAP4 register bit field */
-	union {
-		volatile uint32_t ECAP_CAP4;
-
-		volatile struct {
-			unsigned CAP4	: 32;		//31:0
-		} ECAP_CAP4_bit;
-	};	// 0x114
-
-	uint32_t rsvd118[4];		// 0x118 - 0x124
-
-	/* SYS_PWMSS_ECAP_ECCTL1 register bit field */
-	volatile uint16_t ECAP_ECCTL1;	// 0x128
-
-	/* SYS_PWMSS_ECAP_ECCTL2 register bit field */
-	volatile uint16_t ECAP_ECCTL2;	// 0x12A
-
-	/* SYS_PWMSS_ECAP_ECEINT register bit field */
-	volatile uint16_t ECAP_ECEINT;	// 0x12C
-
-	/* SYS_PWMSS_ECAP_ECFLG register bit field */
-	volatile uint16_t ECAP_ECFLG;	// 0x12E
-
-	/* SYS_PWMSS_ECAP_ECCLR register bit field */
-	volatile uint16_t ECAP_ECCLR;	// 0x130
-
-	/* SYS_PWMSS_ECAP_ECFRC register bit field */
-	volatile uint16_t ECAP_ECFRC;	// 0x132
-
-	uint32_t rsvd134[10];		// 0x134 - 0x158
-
-	/* SYS_PWMSS_ECAP_REVID register bit field */
-	union {
-		volatile uint32_t ECAP_REVID;
-
-		volatile struct {
-			unsigned REV		: 32;		//31:0
-		} ECAP_REVID_bit;
-	};	// 0x15C
-
-	uint32_t rsvd160[8];		// 0x160 - 0x17C
-
-	/*************************/
-	/* eQEP Module Registers */
-	/*************************/
-	/* SYS_PWMSS_EQEP_QPOSCNT register bit field */
-	union {
-		volatile uint32_t EQEP_QPOSCNT;
-
-		volatile struct {
-			unsigned QPOSCNT	: 32;		//31:0
-		} EQEP_QPOSCNT_bit;
-	};	// 0x180
-
-	/* SYS_PWMSS_EQEP_QPOSINIT register bit field */
-	union {
-		volatile uint32_t EQEP_QPOSINIT;
-
-		volatile struct {
-			unsigned QPOSINIT	: 32;		//31:0
-		} EQEP_QPOSINIT_bit;
-	};	// 0x184
-
-	/* SYS_PWMSS_EQEP_QPOSMAX register bit field */
-	union {
-		volatile uint32_t EQEP_QPOSMAX;
-
-		volatile struct {
-			unsigned QPOSMAX	: 32;		//31:0
-		} EQEP_QPOSMAX_bit;
-	};	// 0x188
-
-	/* SYS_PWMSS_EQEP_QPOSCMP register bit field */
-	union {
-		volatile uint32_t EQEP_QPOSCMP;
-
-		volatile struct {
-			unsigned QPOSCMP	: 32;		//31:0
-		} EQEP_QPOSCMP_bit;
-	};	// 0x18C
-
-	/* SYS_PWMSS_EQEP_QPOSILAT register bit field */
-	union {
-		volatile uint32_t EQEP_QPOSILAT;
-
-		volatile struct {
-			unsigned QPOSILAT	: 32;		//31:0
-		} EQEP_QPOSILAT_bit;
-	};	// 0x190
-
-	/* SYS_PWMSS_EQEP_QPOSSLAT register bit field */
-	union {
-		volatile uint32_t EQEP_QPOSSLAT;
-
-		volatile struct {
-			unsigned QPOSSLAT	: 32;		//31:0
-		} EQEP_QPOSSLAT_bit;
-	};	// 0x194
-
-	/* SYS_PWMSS_EQEP_QPOSLAT register bit field */
-	union {
-		volatile uint32_t EQEP_QPOSLAT;
-
-		volatile struct {
-			unsigned QPOSLAT	: 32;		//31:0
-		} EQEP_QPOSLAT_bit;
-	};	// 0x198
-
-	/* SYS_PWMSS_EQEP_QUTMR register bit field */
-	union {
-		volatile uint32_t EQEP_QUTMR;
-
-		volatile struct {
-			unsigned QUTMR	: 32;		//31:0
-		} EQEP_QUTMR_bit;
-	};	// 0x19C
-
-	/* SYS_PWMSS_EQEP_QUPRD register bit field */
-	union {
-		volatile uint32_t EQEP_QUPRD;
-
-		volatile struct {
-			unsigned QUPRD	: 32;		//31:0
-		} EQEP_QUPRD_bit;
-	};	// 0x1A0
-
-	/* SYS_PWMSS_EQEP_QWDTMR register bit field */
-	volatile uint16_t EQEP_QWDTMR;	// 0x1A4
-
-	/* SYS_PWMSS_EQEP_QWDPRD register bit field */
-	volatile uint16_t EQEP_QWDPRD;	// 0x1A6
-
-	/* SYS_PWMSS_EQEP_QDECCTL register bit field */
-	volatile uint16_t EQEP_QDECCTL;	// 0x1A8
-
-	/* SYS_PWMSS_EQEP_QEPCTL register bit field */
-	volatile uint16_t EQEP_QEPCTL;	// 0x1AA
-
-	/* SYS_PWMSS_EQEP_QCAPCTL register bit field */
-	volatile uint16_t EQEP_QCAPCTL;	// 0x1AC
-
-	/* SYS_PWMSS_EQEP_QPOSCTL register bit field */
-	volatile uint16_t EQEP_QPOSCTL;	// 0x1AE
-
-	/* SYS_PWMSS_EQEP_QEINT register bit field */
-	volatile uint16_t EQEP_QEINT;	// 0x1B0
-
-	/* SYS_PWMSS_EQEP_QFLG register bit field */
-	volatile uint16_t EQEP_QFLG;	// 0x1B2
-
-	/* SYS_PWMSS_EQEP_QCLR register bit field */
-	volatile uint16_t EQEP_QCLR;	// 0x1B4
-
-	/* SYS_PWMSS_EQEP_QFRC register bit field */
-	volatile uint16_t EQEP_QFRC;	// 0x1B6
-
-	/* SYS_PWMSS_EQEP_QEPSTS register bit field */
-	volatile uint16_t EQEP_QEPSTS;	// 0x1B8
-
-	/* SYS_PWMSS_EQEP_QCTMR register bit field */
-	volatile uint16_t EQEP_QCTMR;	// 0x1BA
-
-	/* SYS_PWMSS_EQEP_QCPRD register bit field */
-	volatile uint16_t EQEP_QCPRD;	// 0x1BC
-
-	/* SYS_PWMSS_EQEP_QCTMRLAT register bit field */
-	volatile uint16_t EQEP_QCTMRLAT;	// 0x1BE
-
-	/* SYS_PWMSS_EQEP_QCPRDLAT register bit field */
-	volatile uint16_t EQEP_QCPRDLAT;	// 0x1C0
-
-	uint16_t rsvd1C2[1];		// 0x1C2 - 0x1C3
-	uint32_t rsvd1C4[6];		// 0x1C4 - 0x1D8
-
-	/* SYS_PWMSS_EQEP_REVID register bit field */
-	union {
-		volatile uint32_t EQEP_REVID;
-
-		volatile struct {
-			unsigned REVID	: 32;		//31:0
-		} EQEP_REVID_bit;
-	};	// 0x1DC
-
-	uint32_t rsvd1E0[8];		// 0x1E0 - 0x1FC
-
-	/*************************/
-	/* ePWM Module Registers */
-	/*************************/
-	/* SYS_PWMSS_EPWM_TBCTL register bit field */
-	volatile uint16_t EPWM_TBCTL;	// 0x200
-
-	/* SYS_PWMSS_EPWM_TBSTS register bit field */
-	volatile uint16_t EPWM_TBSTS;	// 0x202
-
-	/* SYS_PWMSS_EPWM_TBPHSHR register bit field */
-	volatile uint16_t EPWM_TBPHSHR;	// 0x204
-
-	/* SYS_PWMSS_EPWM_TBPHS register bit field */
-	volatile uint16_t EPWM_TBPHS;	// 0x206
-
-	/* SYS_PWMSS_EPWM_TBCNT register bit field */
-	volatile uint16_t EPWM_TBCNT;	// 0x208
-
-	/* SYS_PWMSS_EPWM_TBPRD register bit field */
-	volatile uint16_t EPWM_TBPRD;	// 0x20A
-
-	uint16_t rsvd20C[1];		// 0x20C - 0x20D
-
-	/* SYS_PWMSS_EPWM_CMPCTL register bit field */
-	volatile uint16_t EPWM_CMPCTL;	// 0x20E
-
-	/* SYS_PWMSS_EPWM_CMPAHR register bit field */
-	volatile uint16_t EPWM_CMPAHR;	// 0x210
-
-	/* SYS_PWMSS_EPWM_CMPA register bit field */
-	volatile uint16_t EPWM_CMPA;	// 0x212
-
-	/* SYS_PWMSS_EPWM_CMPB register bit field */
-	volatile uint16_t EPWM_CMPB;	// 0x214
-
-	/* SYS_PWMSS_EPWM_AQCTLA register bit field */
-	volatile uint16_t EPWM_AQCTLA;	// 0x216
-
-	/* SYS_PWMSS_EPWM_AQCTLB register bit field */
-	volatile uint16_t EPWM_AQCTLB;	// 0x218
-
-	/* SYS_PWMSS_EPWM_AQSFRC register bit field */
-	volatile uint16_t EPWM_AQSFRC;	// 0x21A
-
-	/* SYS_PWMSS_EPWM_AQCSFRC register bit field */
-	volatile uint16_t EPWM_AQCSFRC;	// 0x21C
-
-	/* SYS_PWMSS_EPWM_DBCTL register bit field */
-	volatile uint16_t EPWM_DBCTL;	// 0x21E
-
-	/* SYS_PWMSS_EPWM_DBRED register bit field */
-	volatile uint16_t EPWM_DBRED;	// 0x220
-
-	/* SYS_PWMSS_EPWM_DBFED register bit field */
-	volatile uint16_t EPWM_DBFED;	// 0x222
-
-	/* SYS_PWMSS_EPWM_TZSEL register bit field */
-	volatile uint16_t EPWM_TZSEL;	// 0x224
-
-	uint16_t rsvd226[1];		// 0x226 - 0x227
-
-	/* SYS_PWMSS_EPWM_TZCTL register bit field */
-	volatile uint16_t EPWM_TZCTL;	// 0x228
-
-	/* SYS_PWMSS_EPWM_TZEINT register bit field */
-	volatile uint16_t EPWM_TZEINT;	// 0x22A
-
-	/* SYS_PWMSS_EPWM_TZFLG register bit field */
-	volatile uint16_t EPWM_TZFLG;	// 0x22C
-
-	/* SYS_PWMSS_EPWM_TZCLR register bit field */
-	volatile uint16_t EPWM_TZCLR;	// 0x22E
-
-	/* SYS_PWMSS_EPWM_TZFRC register bit field */
-	volatile uint16_t EPWM_TZFRC;	// 0x230
-
-	/* SYS_PWMSS_EPWM_ETSEL register bit field */
-	volatile uint16_t EPWM_ETSEL;	// 0x232
-
-	/* SYS_PWMSS_EPWM_ETPS register bit field */
-	volatile uint16_t EPWM_ETPS;	// 0x234
-
-	/* SYS_PWMSS_EPWM_ETFLG register bit field */
-	volatile uint16_t EPWM_ETFLG;	// 0x236
-
-	/* SYS_PWMSS_EPWM_ETCLR register bit field */
-	volatile uint16_t EPWM_ETCLR;	// 0x238
-
-	/* SYS_PWMSS_EPWM_ETFRC register bit field */
-	volatile uint16_t EPWM_ETFRC;	// 0x23A
-
-	/* SYS_PWMSS_EPWM_PCCTL register bit field */
-	volatile uint16_t EPWM_PCCTL;	// 0x23C
-
-	uint16_t rsvd23E[1];		// 0x23E - 0x23F
-	uint32_t rsvd240[32];		// 0x240 - 0x2BC
-
-	/* SYS_PWMSS_EPWM_HRCNGF register bit field */
-	volatile uint16_t EPWM_HRCNGF;	// 0x2C0
-
-} sysPwmss;
-
-volatile __far sysPwmss PWMSS0 __attribute__((cregister("PWMSS0", far), peripheral));
-volatile __far sysPwmss PWMSS1 __attribute__((cregister("PWMSS1", far), peripheral));
-volatile __far sysPwmss PWMSS2 __attribute__((cregister("PWMSS2", far), peripheral));
-
-#endif /* _SYS_PWMSS_H_ */
diff --git a/lib/pru_rpmsg/include/pru_rpmsg.h b/lib/pru_rpmsg/include/pru_rpmsg.h
index 6f087207..5d6d65e2 100644
--- a/lib/pru_rpmsg/include/pru_rpmsg.h
+++ b/lib/pru_rpmsg/include/pru_rpmsg.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
  *
  *
  * Redistribution and use in source and binary forms, with or without
@@ -84,6 +84,10 @@
 #define RPMSG_NAME_SIZE 			32
 /* The maximum size of the buffer (including the header) */
 #define RPMSG_BUF_SIZE				512
+/* The size of the buffer header */
+#define RPMSG_HEADER_SIZE			16
+/* The maximum size of the buffer message */
+#define RPMSG_MESSAGE_SIZE			496
 
 enum pru_rpmsg_ns_flags {
     RPMSG_NS_CREATE = 0,
diff --git a/lib/pru_rpmsg/include/pru_types.h b/lib/pru_rpmsg/include/pru_types.h
index c8ab8b1b..191ae898 100644
--- a/lib/pru_rpmsg/include/pru_types.h
+++ b/lib/pru_rpmsg/include/pru_types.h
@@ -1,6 +1,5 @@
 /*
- * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
- *
+ * Copyright (C) 2015-2021 Texas Instruments Incorporated - http://www.ti.com/
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -37,29 +36,53 @@
 /* Custom Resource info: Must match drivers/remoteproc/pru_rproc.h */
 #define TYPE_PRU_INTS		1
 
+#define PRU_INTS_VER0		(0 << 16)
+#define PRU_INTS_VER1		(1 << 16)
+
 /**
- * struct ch_map - sysevts-to-channel mapping
+ * struct pruss_int_map - sysevt to channel to host interrupt mapping
  *
- * @evt: the number of the sysevt
- * @ch: channel number assigned to a given @sysevt
+ * @event: the number of the sysevt
+ * @chnl: channel number assigned to a given @event
+ * @host: the host interrupt assigned to a given @chnl
  *
  * PRU system events are mapped to channels, and these channels are mapped to
  * hosts. Events can be mapped to channels in a one-to-one or many-to-one ratio
  * (multiple events per channel), and channels can be mapped to hosts in a
  * one-to-one or many-to-one ratio (multiple events per channel).
  *
- * @evt is the number of the sysevt, and @ch is the number of the channel to be
- * mapped.
+ * @event is the number of the sysevt, @chnl is the number of the channel to be
+ * mapped, and @host is the number of the host interrupt to be mapped.
+ *
+ * pruss_int_map is defined in Linux at drivers/remoteproc/pru_rproc.h
  */
+struct pruss_int_map {
+	uint8_t event;
+	uint8_t chnl;
+	uint8_t host;
+};
 
-struct ch_map {
-	uint8_t evt;
-	uint8_t ch;
+/**
+ * struct pru_irq_rsc - PRU firmware section header for IRQ data
+ * @type: resource type
+ * @num_evts: number of described events
+ * @pru_intc_map: PRU interrupt routing description
+ *
+ * The PRU firmware blob can contain optional .pru_irq_map ELF section, which
+ * provides the PRUSS interrupt mapping description. The pru_irq_rsc struct
+ * describes resource entry format.
+ *
+ * pru_irq_rsc is defined in Linux at drivers/remoteproc/pru_rproc.h
+ */
+struct pru_irq_rsc {
+	uint8_t type;
+	uint8_t num_evts;
+	struct pruss_int_map pru_intc_map[];
 };
 
 /**
  * struct fw_rsc_custom_ints - custom resource to define PRU interrupts
- * @version: revision number of the custom ints type
+ * @reserved: reserved field, value should be 0 for backward compatibility
  * @channel_host: assignment of PRU channels to hosts
  * @num_evts: device address of INTC
  * @event_channel: mapping of sysevts to channels
@@ -74,10 +97,36 @@ struct ch_map {
  * specifies to which host, if any, a channel is mapped.
  */
 struct fw_rsc_custom_ints {
-	uint16_t version;
+	uint16_t reserved;
 	uint8_t channel_host[10];
 	uint32_t num_evts;
 	struct ch_map *event_channel;
 };
 
+/**
+ * struct fw_rsc_custom_ints_k3 - custom resource to define PRU/RTU interrupts
+ * @channel_host: assignment of PRU interrupt channels to host interrupts
+ * @num_evts: number of mappings defined in the @event_channel map
+ * @event_channel: PRU device address of pointer to array of events to channel
+ *                 mappings
+ *
+ * PRU system events are mapped to channels, and these channels are mapped
+ * to host interrupts. Events can be mapped to channels in a one-to-one or
+ * many-to-one ratio (multiple events per channel), and channels can be
+ * mapped to host interrupts in a one-to-one or many-to-one ratio (multiple
+ * channels per interrupt).
+ *
+ * This structure needs to be used using custom interrupt resource version
+ * number 1. This structure is to be used with firmwares dealing with the
+ * additional host interrupts on ICSSG IP instances. The firmwares for PRU
+ * cores on ICSSG can get away with the standard version (if not dealing with
+ * Task Manager), but the firmwares for RTU cores would definitely need this
+ * for mapping to the corresponding higher host interrupts.
+ */
+struct fw_rsc_custom_ints_k3 {
+	uint8_t channel_host[20];
+	uint32_t num_evts;
+	struct ch_map *event_channel;
+};
+
 #endif /* _PRU_TYPES_H_ */
diff --git a/lib/pru_rpmsg/include/pru_virtio_ring.h b/lib/pru_rpmsg/include/pru_virtio_ring.h
index 54817352..d17b68bf 100644
--- a/lib/pru_rpmsg/include/pru_virtio_ring.h
+++ b/lib/pru_rpmsg/include/pru_virtio_ring.h
@@ -109,25 +109,25 @@ struct vring {
  *	struct vring_desc desc[num];
  *
  *	// A ring of available descriptor heads with free-running index.
- *	__u16 avail_flags;
- *	__u16 avail_idx;
- *	__u16 available[num];
- *	__u16 used_event_idx;
+ *	uint16_t avail_flags;
+ *	uint16_t avail_idx;
+ *	uint16_t available[num];
+ *	uint16_t used_event_idx;
  *
  *	// Padding to the next align boundary.
  *	char pad[];
  *
  *	// A ring of used descriptor heads with free-running index.
- *	__u16 used_flags;
- *	__u16 used_idx;
+ *	uint16_t used_flags;
+ *	uint16_t used_idx;
  *	struct vring_used_elem used[num];
- *	__u16 avail_event_idx;
+ *	uint16_t avail_event_idx;
  * };
  */
 /* We publish the used event index at the end of the available ring, and vice
  * versa. They are at the end for backwards compatibility. */
 #define vring_used_event(vr) ((vr)->avail->ring[(vr)->num])
-#define vring_avail_event(vr) (*(__u16 *)&(vr)->used->ring[(vr)->num])
+#define vring_avail_event(vr) (*(uint16_t *)&(vr)->used->ring[(vr)->num])
 
 static inline void vring_init(struct vring *vr, uint32_t num, void *p,
                               uint64_t align)
diff --git a/lib/pru_rpmsg/include/rsc_types.h b/lib/pru_rpmsg/include/rsc_types.h
index 755ab601..a52f86c5 100644
--- a/lib/pru_rpmsg/include/rsc_types.h
+++ b/lib/pru_rpmsg/include/rsc_types.h
@@ -1,5 +1,5 @@
 /*
- * Copyright(c) 2011 Texas Instruments, Inc.
+ * Copyright(c) 2011-2018 Texas Instruments, Inc.
  * Copyright(c) 2011 Google, Inc.
  * All rights reserved.
  *
@@ -45,9 +45,14 @@
 #define TYPE_DEVMEM		1
 #define TYPE_TRACE		2
 #define TYPE_VDEV		3
-#define TYPE_INTMEM		4
+#define TYPE_PRELOAD_VENDOR	4
+#define TYPE_POSTLOAD_VENDOR	5
+/* deprecated, define only for backward compatibility */
 #define TYPE_CUSTOM		5
 
+/* Linux kernel defines this as (-1), below define avoids compile warnings */
+#define FW_RSC_ADDR_ANY		(~0)
+
 union fw_custom {
 	/* add custom resources here */
 	struct fw_rsc_custom_ints pru_ints;
@@ -322,24 +327,58 @@ struct fw_rsc_intmem {
 };
 
 /**
+ * struct fw_rsc_custom_hdr - header to be used with custom resource types
+ * @type: type of custom resource, value should be one of vendor resource types
+ * @u: union identifying the vendor/custom resource sub-type
+ * @sub_type: type to identify the custom resource
+ * @rsc_size: size of the specific custom resource structure (in bytes)
+ *
+ * This is a header structure to be used before any specific custom resource
+ * type. @type is one of the generic VENDOR types, the @u is an union of the
+ * overall @sub_type field which is made up of the custom resource version
+ * number in the upper 16-bits and the custom resource sub-type itself in the
+ * lower 16-bits. @rsc_size is the length of the actual custom resource sub-type
+ * (in bytes). These will be interpreted by the host-side device-specific
+ * driver.
+ */
+struct fw_rsc_custom_hdr {
+	uint32_t type;
+	union {
+		uint32_t sub_type;
+		struct {
+			uint16_t type;
+			uint16_t ver;
+		} st;
+	} u;
+	uint32_t rsc_size;
+};
+
+/**
  * struct fw_rsc_custom - used for custom resource types
- * @type: type of resource
- * @sub_type: type of custom resource
+ * @type: type of resource, value should be one of vendor resource types
+ * @u: union identifying the type of vendor/custom resource
  * @rsc_size: size of @rsc (in bytes)
  * @rsc: the custom resource
  *
  * This resource allows for custom resources specific to an architecture or
  * device.
  *
- * @type is the generic CUSTOM type, @sub_type is the specific custom resource,
- * @rsc_size is the length of @rsc (in bytes), and @rsc is the actual
- * parameters. These will be interpreted by the host-side device-specific
+ * @type is one of the generic VENDOR types, the @u is an union of the
+ * overall @sub_type field which is made up of the custom resource version
+ * number in the upper 16-bits and the custom resource type itself in the
+ * lower 16-bits. @rsc_size is the length of @rsc (in bytes), and @rsc is the
+ * actual parameters. These will be interpreted by the host-side device-specific
  * driver.
  */
-
 struct fw_rsc_custom {
 	uint32_t type;
-	uint32_t sub_type;
+	union {
+		uint32_t sub_type;
+		struct {
+			uint16_t type;
+			uint16_t ver;
+		} st;
+	} u;
 	uint32_t rsc_size;
 	union fw_custom rsc;
 };
diff --git a/lib/pru_rpmsg/include/types.h b/lib/pru_rpmsg/include/types.h
deleted file mode 100644
index 35acdcf6..00000000
--- a/lib/pru_rpmsg/include/types.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * types.h - standard redefined types
- */
-
-#ifndef _TYPES_H_
-#define _TYPES_H_
-
-typedef uint8_t __u8;
-typedef uint16_t __u16;
-typedef uint32_t __u32;
-typedef uint64_t __u64;
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
-
-#endif /* _TYPES_H_ */
diff --git a/lib/pru_rpmsg/pru_virtqueue.c b/lib/pru_rpmsg/pru_virtqueue.c
index 5b14c6e4..cce93d01 100644
--- a/lib/pru_rpmsg/pru_virtqueue.c
+++ b/lib/pru_rpmsg/pru_virtqueue.c
@@ -41,10 +41,10 @@
  */
 #include <pru_virtqueue.h>
 
-#ifndef __GNUC__
-volatile register uint32_t __R31;
-#else
+#ifdef __GNUC__
 #include <pru/io.h>
+#else
+volatile register uint32_t __R31;
 #endif
 
 /* bit 5 is the valid strobe to generate system events with __R31 */
@@ -131,19 +131,12 @@ int16_t pru_virtqueue_kick(
     struct pru_virtqueue	*vq
 )
 {
-	unsigned int r31;
-
 	/* If requested, do not kick the ARM host */
 	if (vq->vring.avail->flags & VRING_AVAIL_F_NO_INTERRUPT)
 		return PRU_VIRTQUEUE_NO_KICK;
 
 	/* Generate a system event to kick the ARM */
-	r31 = (INT_ENABLE | (vq->to_arm_event - INT_OFFSET)); 
-#ifdef __GNUC__
-	write_r31(r31);
-#else
-	__R31 = r31;
-#endif
+	__R31 = (INT_ENABLE | (vq->to_arm_event - INT_OFFSET)); 
 
 	return PRU_VIRTQUEUE_SUCCESS;
 }