stm32f0: Remove hal based stm32f0 implementation

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

56 files changed, 0 insertions, 59385 deletions

diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal.c b/lib/hal-stm32f0/source/stm32f0xx_hal.c
deleted file mode 100644
index bb588b4a..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal.c
+++ /dev/null
@@ -1,467 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal.c
-  * @author  MCD Application Team
-  * @brief   HAL module driver.
-  *          This is the common part of the HAL initialization
-  *
-  @verbatim
-  ==============================================================================
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The common HAL driver contains a set of generic and common APIs that can be
-    used by the PPP peripheral drivers and the user to start using the HAL. 
-    [..]
-    The HAL contains two APIs categories:
-         (+) HAL Initialization and de-initialization functions
-         (+) HAL Control functions
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup HAL HAL
-  * @brief HAL module driver.
-  * @{
-  */
-
-#ifdef HAL_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup HAL_Private_Constants HAL Private Constants
-  * @{
-  */
-/** 
-  * @brief STM32F0xx HAL Driver version number V1.7.0
-  */
-#define __STM32F0xx_HAL_VERSION_MAIN   (0x01) /*!< [31:24] main version */
-#define __STM32F0xx_HAL_VERSION_SUB1   (0x07) /*!< [23:16] sub1 version */
-#define __STM32F0xx_HAL_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
-#define __STM32F0xx_HAL_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
-#define __STM32F0xx_HAL_VERSION         ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\
-                                        |(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\
-                                        |(__STM32F0xx_HAL_VERSION_SUB2 << 8U )\
-                                        |(__STM32F0xx_HAL_VERSION_RC))
-
-#define IDCODE_DEVID_MASK    (0x00000FFFU)
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup HAL_Private_Macros HAL Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup HAL_Private_Variables HAL Private Variables
-  * @{
-  */
-__IO uint32_t uwTick;
-/**
-  * @}
-  */
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup HAL_Exported_Functions HAL Exported Functions
-  * @{
-  */
-
-/** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions 
-  * @brief    Initialization and de-initialization functions
-  *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-   [..]  This section provides functions allowing to:
-      (+) Initializes the Flash interface, the NVIC allocation and initial clock 
-          configuration. It initializes the source of time base also when timeout 
-          is needed and the backup domain when enabled.
-      (+) de-Initializes common part of the HAL.
-      (+) Configure The time base source to have 1ms time base with a dedicated 
-          Tick interrupt priority. 
-        (++) Systick timer is used by default as source of time base, but user 
-             can eventually implement his proper time base source (a general purpose 
-             timer for example or other time source), keeping in mind that Time base 
-             duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and 
-             handled in milliseconds basis.
-        (++) Time base configuration function (HAL_InitTick ()) is called automatically 
-             at the beginning of the program after reset by HAL_Init() or at any time 
-             when clock is configured, by HAL_RCC_ClockConfig(). 
-        (++) Source of time base is configured  to generate interrupts at regular 
-             time intervals. Care must be taken if HAL_Delay() is called from a 
-             peripheral ISR process, the Tick interrupt line must have higher priority 
-            (numerically lower) than the peripheral interrupt. Otherwise the caller 
-            ISR process will be blocked. 
-       (++) functions affecting time base configurations are declared as __Weak  
-             to make  override possible  in case of other  implementations in user file.
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  This function configures the Flash prefetch,
-  *        Configures time base source, NVIC and Low level hardware
-  * @note This function is called at the beginning of program after reset and before 
-  *       the clock configuration
-  * @note The time base configuration is based on HSI clock when exiting from Reset.
-  *       Once done, time base tick start incrementing.
-  *       In the default implementation,Systick is used as source of time base.
-  *       The tick variable is incremented each 1ms in its ISR.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_Init(void)
-{
-  /* Configure Flash prefetch */ 
-#if (PREFETCH_ENABLE != 0)
-  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-#endif /* PREFETCH_ENABLE */
-
-  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
-
-  HAL_InitTick(TICK_INT_PRIORITY);
-
-  /* Init the low level hardware */
-  HAL_MspInit();
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief This function de-Initializes common part of the HAL and stops the source
-  *        of time base.
-  * @note This function is optional.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DeInit(void)
-{
-  /* Reset of all peripherals */
-  __HAL_RCC_APB1_FORCE_RESET();
-  __HAL_RCC_APB1_RELEASE_RESET();
-
-  __HAL_RCC_APB2_FORCE_RESET();
-  __HAL_RCC_APB2_RELEASE_RESET();
-
-  __HAL_RCC_AHB_FORCE_RESET();
-  __HAL_RCC_AHB_RELEASE_RESET();
-
-  /* De-Init the low level hardware */
-  HAL_MspDeInit();
-    
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the MSP.
-  * @retval None
-  */
-__weak void HAL_MspInit(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes the MSP.
-  * @retval None
-  */
-__weak void HAL_MspDeInit(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief This function configures the source of the time base. 
-  *        The time source is configured  to have 1ms time base with a dedicated 
-  *        Tick interrupt priority.
-  * @note This function is called  automatically at the beginning of program after
-  *       reset by HAL_Init() or at any time when clock is reconfigured  by HAL_RCC_ClockConfig(). 
-  * @note In the default implementation, SysTick timer is the source of time base. 
-  *       It is used to generate interrupts at regular time intervals. 
-  *       Care must be taken if HAL_Delay() is called from a peripheral ISR process, 
-  *       The the SysTick interrupt must have higher priority (numerically lower) 
-  *       than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
-  *       The function is declared as __Weak  to be overwritten  in case of other
-  *       implementation  in user file.
-  * @param TickPriority Tick interrupt priority.
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
-{
-  /*Configure the SysTick to have interrupt in 1ms time basis*/
-  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000U);
-
-  /*Configure the SysTick IRQ priority */
-  HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0U);
-
-   /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup HAL_Exported_Functions_Group2 HAL Control functions 
-  * @brief    HAL Control functions
-  *
-@verbatim
- ===============================================================================
-                      ##### HAL Control functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Provide a tick value in millisecond
-      (+) Provide a blocking delay in millisecond
-      (+) Suspend the time base source interrupt
-      (+) Resume the time base source interrupt
-      (+) Get the HAL API driver version
-      (+) Get the device identifier
-      (+) Get the device revision identifier
-      (+) Enable/Disable Debug module during Sleep mode
-      (+) Enable/Disable Debug module during STOP mode
-      (+) Enable/Disable Debug module during STANDBY mode
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief This function is called to increment  a global variable "uwTick"
-  *        used as application time base.
-  * @note In the default implementation, this variable is incremented each 1ms
-  *       in Systick ISR.
-  * @note This function is declared as __weak to be overwritten in case of other 
-  *       implementations in user file.
-  * @retval None
-  */
-__weak void HAL_IncTick(void)
-{
-  uwTick++;
-}
-
-/**
-  * @brief  Provides a tick value in millisecond.
-  * @note   This function is declared as __weak  to be overwritten  in case of other 
-  *       implementations in user file.
-  * @retval tick value
-  */
-__weak uint32_t HAL_GetTick(void)
-{
-  return uwTick;
-}
-
-/**
-  * @brief This function provides accurate delay (in milliseconds) based 
-  *        on variable incremented.
-  * @note In the default implementation , SysTick timer is the source of time base.
-  *       It is used to generate interrupts at regular time intervals where uwTick
-  *       is incremented.
-  * @note ThiS function is declared as __weak to be overwritten in case of other
-  *       implementations in user file.
-  * @param Delay specifies the delay time length, in milliseconds.
-  * @retval None
-  */
-__weak void HAL_Delay(__IO uint32_t Delay)
-{
-  uint32_t tickstart = HAL_GetTick();
-  uint32_t wait = Delay;
-  
-  /* Add a period to guarantee minimum wait */
-  if (wait < HAL_MAX_DELAY)
-  {
-     wait++;
-  }
-  
-  while((HAL_GetTick() - tickstart) < wait)
-  {
-  }
-}
-
-/**
-  * @brief Suspend Tick increment.
-  * @note In the default implementation , SysTick timer is the source of time base. It is
-  *       used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
-  *       is called, the the SysTick interrupt will be disabled and so Tick increment 
-  *       is suspended.
-  * @note This function is declared as __weak to be overwritten in case of other
-  *       implementations in user file.
-  * @retval None
-  */
-__weak void HAL_SuspendTick(void)
-
-{
-  /* Disable SysTick Interrupt */
-  CLEAR_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk);
-}
-
-/**
-  * @brief Resume Tick increment.
-  * @note In the default implementation , SysTick timer is the source of time base. It is
-  *       used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
-  *       is called, the the SysTick interrupt will be enabled and so Tick increment 
-  *       is resumed.
-  * @note This function is declared as __weak  to be overwritten  in case of other
-  *       implementations in user file.
-  * @retval None
-  */
-__weak void HAL_ResumeTick(void)
-{
-  /* Enable SysTick Interrupt */
-  SET_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk);
-}
-
-/**
-  * @brief  This method returns the HAL revision
-  * @retval version : 0xXYZR (8bits for each decimal, R for RC)
-  */
-uint32_t HAL_GetHalVersion(void)
-{
- return __STM32F0xx_HAL_VERSION;
-}
-
-/**
-  * @brief  Returns the device revision identifier.
-  * @retval Device revision identifier
-  */
-uint32_t HAL_GetREVID(void)
-{
-   return((DBGMCU->IDCODE) >> 16U);
-}
-
-/**
-  * @brief  Returns the device identifier.
-  * @retval Device identifier
-  */
-uint32_t HAL_GetDEVID(void)
-{
-   return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
-}
-
-/**
-  * @brief  Returns first word of the unique device identifier (UID based on 96 bits)
-  * @retval Device identifier
-  */
-uint32_t HAL_GetUIDw0(void)
-{
-   return(READ_REG(*((uint32_t *)UID_BASE)));
-}
-
-/**
-  * @brief  Returns second word of the unique device identifier (UID based on 96 bits)
-  * @retval Device identifier
-  */
-uint32_t HAL_GetUIDw1(void)
-{
-   return(READ_REG(*((uint32_t *)(UID_BASE + 4U))));
-}
-
-/**
-  * @brief  Returns third word of the unique device identifier (UID based on 96 bits)
-  * @retval Device identifier
-  */
-uint32_t HAL_GetUIDw2(void)
-{
-   return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
-}
-
-/**
-  * @brief  Enable the Debug Module during STOP mode       
-  * @retval None
-  */
-void HAL_DBGMCU_EnableDBGStopMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
-  * @brief  Disable the Debug Module during STOP mode       
-  * @retval None
-  */
-void HAL_DBGMCU_DisableDBGStopMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
-}
-
-/**
-  * @brief  Enable the Debug Module during STANDBY mode       
-  * @retval None
-  */
-void HAL_DBGMCU_EnableDBGStandbyMode(void)
-{
-  SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
-  * @brief  Disable the Debug Module during STANDBY mode       
-  * @retval None
-  */
-void HAL_DBGMCU_DisableDBGStandbyMode(void)
-{
-  CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_adc.c b/lib/hal-stm32f0/source/stm32f0xx_hal_adc.c
deleted file mode 100644
index a94fe6d8..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_adc.c
+++ /dev/null
@@ -1,2186 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_adc.c
-  * @author  MCD Application Team
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Analog to Digital Convertor (ADC)
-  *          peripheral:
-  *           + Initialization and de-initialization functions
-  *             ++ Initialization and Configuration of ADC
-  *           + Operation functions
-  *             ++ Start, stop, get result of conversions of regular
-  *                group, using 3 possible modes: polling, interruption or DMA.
-  *           + Control functions
-  *             ++ Channels configuration on regular group
-  *             ++ Analog Watchdog configuration
-  *           + State functions
-  *             ++ ADC state machine management
-  *             ++ Interrupts and flags management
-  *          Other functions (extended functions) are available in file 
-  *          "stm32f0xx_hal_adc_ex.c".
-  *
-  @verbatim
-  ==============================================================================
-                     ##### ADC peripheral features #####
-  ==============================================================================
-  [..]
-  (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
-
-  (+) Interrupt generation at the end of regular conversion and in case of 
-      analog watchdog or overrun events.
-  
-  (+) Single and continuous conversion modes.
-  
-  (+) Scan mode for conversion of several channels sequentially.
-  
-  (+) Data alignment with in-built data coherency.
-  
-  (+) Programmable sampling time (common for all channels)
-  
-  (+) ADC conversion of regular group.
-
-  (+) External trigger (timer or EXTI) with configurable polarity
-
-  (+) DMA request generation for transfer of conversions data of regular group.
-
-  (+) ADC calibration
-  
-  (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at 
-      slower speed.
-  
-  (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to 
-      Vdda or to an external voltage reference).
-
-
-                     ##### How to use this driver #####
-  ==============================================================================
-    [..]
-
-     *** Configuration of top level parameters related to ADC ***
-     ============================================================
-     [..]
-
-    (#) Enable the ADC interface
-      (++) As prerequisite, ADC clock must be configured at RCC top level.
-           Caution: On STM32F0, ADC clock frequency max is 14MHz (refer
-                    to device datasheet).
-                    Therefore, ADC clock prescaler must be configured in 
-                    function of ADC clock source frequency to remain below
-                    this maximum frequency.
-
-        (++) Two clock settings are mandatory: 
-             (+++) ADC clock (core clock, also possibly conversion clock).
-
-             (+++) ADC clock (conversions clock).
-                   Two possible clock sources: synchronous clock derived from APB clock
-                   or asynchronous clock derived from ADC dedicated HSI RC oscillator
-                   14MHz.
-                   If asynchronous clock is selected, parameter "HSI14State" must be set either:
-                   - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control 
-                     the HSI14 oscillator enable/disable (if not used to supply the main 
-                     system clock): feature used if ADC mode LowPowerAutoPowerOff is 
-                     enabled.
-                   - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator
-                     always enabled: can be used to supply the main system clock.
-
-             (+++) Example:
-                   Into HAL_ADC_MspInit() (recommended code location) or with
-                   other device clock parameters configuration:
-               (+++) __HAL_RCC_ADC1_CLK_ENABLE();                         (mandatory)
-
-               HI14 enable or let under control of ADC:           (optional: if asynchronous clock selected)
-               (+++) RCC_OscInitTypeDef   RCC_OscInitStructure;
-               (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
-               (+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT;
-               (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL;
-               (+++) RCC_OscInitStructure.PLL...   (optional if used for system clock)
-               (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
-
-        (++) ADC clock source and clock prescaler are configured at ADC level with
-             parameter "ClockPrescaler" using function HAL_ADC_Init().
-
-    (#) ADC pins configuration
-         (++) Enable the clock for the ADC GPIOs
-              using macro __HAL_RCC_GPIOx_CLK_ENABLE()
-         (++) Configure these ADC pins in analog mode
-              using function HAL_GPIO_Init()
-
-    (#) Optionally, in case of usage of ADC with interruptions:
-         (++) Configure the NVIC for ADC
-              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
-         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() 
-              into the function of corresponding ADC interruption vector 
-              ADCx_IRQHandler().
-
-    (#) Optionally, in case of usage of DMA:
-         (++) Configure the DMA (DMA channel, mode normal or circular, ...)
-              using function HAL_DMA_Init().
-         (++) Configure the NVIC for DMA
-              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
-         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() 
-              into the function of corresponding DMA interruption vector 
-              DMAx_Channelx_IRQHandler().
-  
-     *** Configuration of ADC, group regular, channels parameters ***
-     ================================================================
-     [..]
-
-    (#) Configure the ADC parameters (resolution, data alignment, ...)
-        and regular group parameters (conversion trigger, sequencer, ...)
-        using function HAL_ADC_Init().
-
-    (#) Configure the channels for regular group parameters (channel number, 
-        channel rank into sequencer, ..., into regular group)
-        using function HAL_ADC_ConfigChannel().
-
-    (#) Optionally, configure the analog watchdog parameters (channels
-        monitored, thresholds, ...)
-        using function HAL_ADC_AnalogWDGConfig().
-
-     *** Execution of ADC conversions ***
-     ====================================
-     [..]
-
-    (#) Optionally, perform an automatic ADC calibration to improve the
-        conversion accuracy
-        using function HAL_ADCEx_Calibration_Start().
-
-    (#) ADC driver can be used among three modes: polling, interruption,
-        transfer by DMA.
-
-        (++) ADC conversion by polling:
-          (+++) Activate the ADC peripheral and start conversions
-                using function HAL_ADC_Start()
-          (+++) Wait for ADC conversion completion 
-                using function HAL_ADC_PollForConversion()
-          (+++) Retrieve conversion results 
-                using function HAL_ADC_GetValue()
-          (+++) Stop conversion and disable the ADC peripheral 
-                using function HAL_ADC_Stop()
-
-        (++) ADC conversion by interruption: 
-          (+++) Activate the ADC peripheral and start conversions
-                using function HAL_ADC_Start_IT()
-          (+++) Wait for ADC conversion completion by call of function
-                HAL_ADC_ConvCpltCallback()
-                (this function must be implemented in user program)
-          (+++) Retrieve conversion results 
-                using function HAL_ADC_GetValue()
-          (+++) Stop conversion and disable the ADC peripheral 
-                using function HAL_ADC_Stop_IT()
-
-        (++) ADC conversion with transfer by DMA:
-          (+++) Activate the ADC peripheral and start conversions
-                using function HAL_ADC_Start_DMA()
-          (+++) Wait for ADC conversion completion by call of function
-                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
-                (these functions must be implemented in user program)
-          (+++) Conversion results are automatically transferred by DMA into
-                destination variable address.
-          (+++) Stop conversion and disable the ADC peripheral 
-                using function HAL_ADC_Stop_DMA()
-
-     [..]
-
-    (@) Callback functions must be implemented in user program:
-      (+@) HAL_ADC_ErrorCallback()
-      (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
-      (+@) HAL_ADC_ConvCpltCallback()
-      (+@) HAL_ADC_ConvHalfCpltCallback
-
-     *** Deinitialization of ADC ***
-     ============================================================
-     [..]
-
-    (#) Disable the ADC interface
-      (++) ADC clock can be hard reset and disabled at RCC top level.
-        (++) Hard reset of ADC peripherals
-             using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
-        (++) ADC clock disable
-             using the equivalent macro/functions as configuration step.
-             (+++) Example:
-                   Into HAL_ADC_MspDeInit() (recommended code location) or with
-                   other device clock parameters configuration:
-               (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
-               (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock)
-               (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
-
-    (#) ADC pins configuration
-         (++) Disable the clock for the ADC GPIOs
-              using macro __HAL_RCC_GPIOx_CLK_DISABLE()
-
-    (#) Optionally, in case of usage of ADC with interruptions:
-         (++) Disable the NVIC for ADC
-              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
-
-    (#) Optionally, in case of usage of DMA:
-         (++) Deinitialize the DMA
-              using function HAL_DMA_Init().
-         (++) Disable the NVIC for DMA
-              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
-
-    [..]
-  
-    @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup ADC ADC
-  * @brief ADC HAL module driver
-  * @{
-  */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup ADC_Private_Constants ADC Private Constants
-  * @{
-  */
-
-  /* Fixed timeout values for ADC calibration, enable settling time, disable  */
-  /* settling time.                                                           */
-  /* Values defined to be higher than worst cases: low clock frequency,       */
-  /* maximum prescaler.                                                       */
-  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
-  /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits.     */
-  /* Unit: ms                                                                 */
-  #define ADC_ENABLE_TIMEOUT             ( 2U)
-  #define ADC_DISABLE_TIMEOUT            ( 2U)
-  #define ADC_STOP_CONVERSION_TIMEOUT    ( 2U)
-
-  /* Delay for ADC stabilization time.                                        */
-  /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB).       */
-  /* Unit: us                                                                 */
-  #define ADC_STAB_DELAY_US               ( 1U)
-
-  /* Delay for temperature sensor stabilization time.                         */
-  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
-  /* Unit: us                                                                 */
-  #define ADC_TEMPSENSOR_DELAY_US         ( 10U)
-
-/**
-    * @}
-    */
-  
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup ADC_Private_Functions ADC Private Functions
-  * @{
-  */
-static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
-static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
-static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
-static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
-static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
-static void ADC_DMAError(DMA_HandleTypeDef *hdma);
-/**
-    * @}
-    */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup ADC_Exported_Functions ADC Exported Functions
-  * @{
-  */
-
-/** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the ADC. 
-      (+) De-initialize the ADC
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the ADC peripheral and regular group according to  
-  *         parameters specified in structure "ADC_InitTypeDef".
-  * @note   As prerequisite, ADC clock must be configured at RCC top level
-  *         depending on both possible clock sources: APB clock of HSI clock.
-  *         See commented example code below that can be copied and uncommented 
-  *         into HAL_ADC_MspInit().
-  * @note   Possibility to update parameters on the fly:
-  *         This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
-  *         coming from ADC state reset. Following calls to this function can
-  *         be used to reconfigure some parameters of ADC_InitTypeDef  
-  *         structure on the fly, without modifying MSP configuration. If ADC  
-  *         MSP has to be modified again, HAL_ADC_DeInit() must be called
-  *         before HAL_ADC_Init().
-  *         The setting of these parameters is conditioned to ADC state.
-  *         For parameters constraints, see comments of structure 
-  *         "ADC_InitTypeDef".
-  * @note   This function configures the ADC within 2 scopes: scope of entire 
-  *         ADC and scope of regular group. For parameters details, see comments 
-  *         of structure "ADC_InitTypeDef".
-  * @param  hadc ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  uint32_t tmpCFGR1 = 0U;
-
-  /* Check ADC handle */
-  if(hadc == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
-  assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
-  assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); 
-  assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
-  assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));   
-  assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));   
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
-  assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
-  assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
-  
-  /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured    */
-  /* at RCC top level depending on both possible clock sources:               */
-  /* APB clock or HSI clock.                                                  */
-  /* Refer to header of this file for more details on clock enabling procedure*/
-  
-  /* Actions performed only if ADC is coming from state reset:                */
-  /* - Initialization of ADC MSP                                              */
-  /* - ADC voltage regulator enable                                           */
-  if (hadc->State == HAL_ADC_STATE_RESET)
-  {
-    /* Initialize ADC error code */
-    ADC_CLEAR_ERRORCODE(hadc);
-    
-    /* Allocate lock resource and initialize it */
-    hadc->Lock = HAL_UNLOCKED;
-    
-    /* Init the low level hardware */
-    HAL_ADC_MspInit(hadc);
-  }
-  
-  /* Configuration of ADC parameters if previous preliminary actions are      */ 
-  /* correctly completed.                                                     */
-  /* and if there is no conversion on going on regular group (ADC can be      */ 
-  /* enabled anyway, in case of call of this function to update a parameter   */
-  /* on the fly).                                                             */
-  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
-      (tmp_hal_status == HAL_OK)                                &&
-      (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)          )
-  {
-    /* Set ADC state */
-    ADC_STATE_CLR_SET(hadc->State,
-                      HAL_ADC_STATE_REG_BUSY,
-                      HAL_ADC_STATE_BUSY_INTERNAL);
-    
-    /* Parameters update conditioned to ADC state:                            */
-    /* Parameters that can be updated only when ADC is disabled:              */
-    /*  - ADC clock mode                                                      */
-    /*  - ADC clock prescaler                                                 */
-    /*  - ADC resolution                                                      */
-    if (ADC_IS_ENABLE(hadc) == RESET)
-    {
-      /* Some parameters of this register are not reset, since they are set   */
-      /* by other functions and must be kept in case of usage of this         */
-      /* function on the fly (update of a parameter of ADC_InitTypeDef        */
-      /* without needing to reconfigure all other ADC groups/channels         */
-      /* parameters):                                                         */
-      /*   - internal measurement paths: Vbat, temperature sensor, Vref       */
-      /*     (set into HAL_ADC_ConfigChannel() )                              */
-     
-      /* Configuration of ADC resolution                                      */
-      MODIFY_REG(hadc->Instance->CFGR1,
-                 ADC_CFGR1_RES        ,
-                 hadc->Init.Resolution );
-      
-      /* Configuration of ADC clock mode: clock source AHB or HSI with        */
-      /* selectable prescaler                                                 */
-      MODIFY_REG(hadc->Instance->CFGR2    ,
-                 ADC_CFGR2_CKMODE         ,
-                 hadc->Init.ClockPrescaler );
-    }
-      
-    /* Configuration of ADC:                                                  */
-    /*  - discontinuous mode                                                  */
-    /*  - LowPowerAutoWait mode                                               */
-    /*  - LowPowerAutoPowerOff mode                                           */
-    /*  - continuous conversion mode                                          */
-    /*  - overrun                                                             */
-    /*  - external trigger to start conversion                                */
-    /*  - external trigger polarity                                           */
-    /*  - data alignment                                                      */
-    /*  - resolution                                                          */
-    /*  - scan direction                                                      */
-    /*  - DMA continuous request                                              */
-    hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN  |
-                                ADC_CFGR1_AUTOFF  |
-                                ADC_CFGR1_AUTDLY  |
-                                ADC_CFGR1_CONT    |
-                                ADC_CFGR1_OVRMOD  |
-                                ADC_CFGR1_EXTSEL  |
-                                ADC_CFGR1_EXTEN   |
-                                ADC_CFGR1_ALIGN   |
-                                ADC_CFGR1_SCANDIR |
-                                ADC_CFGR1_DMACFG   );
-
-    tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT(hadc->Init.LowPowerAutoWait)        |
-                 ADC_CFGR1_AUTOOFF(hadc->Init.LowPowerAutoPowerOff)     |
-                 ADC_CFGR1_CONTINUOUS(hadc->Init.ContinuousConvMode)    |
-                 ADC_CFGR1_OVERRUN(hadc->Init.Overrun)                  |
-                 hadc->Init.DataAlign                                   |
-                 ADC_SCANDIR(hadc->Init.ScanConvMode)                   |
-                 ADC_CFGR1_DMACONTREQ(hadc->Init.DMAContinuousRequests)  );
-    
-    /* Enable discontinuous mode only if continuous mode is disabled */
-    if (hadc->Init.DiscontinuousConvMode == ENABLE)
-    {
-      if (hadc->Init.ContinuousConvMode == DISABLE)
-      {
-        /* Enable the selected ADC group regular discontinuous mode */
-        tmpCFGR1 |= ADC_CFGR1_DISCEN;
-      }
-      else
-      {
-        /* ADC regular group discontinuous was intended to be enabled,        */
-        /* but ADC regular group modes continuous and sequencer discontinuous */
-        /* cannot be enabled simultaneously.                                  */
-        
-        /* Update ADC state machine to error */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-        
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      }
-    }
-    
-    /* Enable external trigger if trigger selection is different of software  */
-    /* start.                                                                 */
-    /* Note: This configuration keeps the hardware feature of parameter       */
-    /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
-    /*       software start.                                                  */
-    if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
-    {
-      tmpCFGR1 |= ( hadc->Init.ExternalTrigConv    |
-                    hadc->Init.ExternalTrigConvEdge );
-    }
-    
-    /* Update ADC configuration register with previous settings */
-    hadc->Instance->CFGR1 |= tmpCFGR1;
-    
-    /* Channel sampling time configuration */
-    /* Management of parameters "SamplingTimeCommon" and "SamplingTime"       */
-    /* (obsolete): sampling time set in this function if parameter            */
-    /*  "SamplingTimeCommon" has been set to a valid sampling time.           */
-    /* Otherwise, sampling time is set into ADC channel initialization        */
-    /* structure with parameter "SamplingTime" (obsolete).                    */
-    if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
-    {
-      /* Channel sampling time configuration */
-      /* Clear the old sample time */
-      hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
-      
-      /* Set the new sample time */
-      hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon);
-    }
-    
-    /* Check back that ADC registers have effectively been configured to      */
-    /* ensure of no potential problem of ADC core IP clocking.                */
-    /* Check through register CFGR1 (excluding analog watchdog configuration: */
-    /* set into separate dedicated function, and bits of ADC resolution set   */
-    /* out of temporary variable 'tmpCFGR1').                                 */
-    if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RES))
-         == tmpCFGR1)
-    {
-      /* Set ADC error code to none */
-      ADC_CLEAR_ERRORCODE(hadc);
-      
-      /* Set the ADC state */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_BUSY_INTERNAL,
-                        HAL_ADC_STATE_READY);
-    }
-    else
-    {
-      /* Update ADC state machine to error */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_BUSY_INTERNAL,
-                        HAL_ADC_STATE_ERROR_INTERNAL);
-      
-      /* Set ADC error code to ADC IP internal error */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      
-      tmp_hal_status = HAL_ERROR;
-    }
-  
-  }
-  else
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-        
-    tmp_hal_status = HAL_ERROR;
-  }
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-
-/**
-  * @brief  Deinitialize the ADC peripheral registers to their default reset
-  *         values, with deinitialization of the ADC MSP.
-  * @note   For devices with several ADCs: reset of ADC common registers is done 
-  *         only if all ADCs sharing the same common group are disabled.
-  *         If this is not the case, reset of these common parameters reset is  
-  *         bypassed without error reporting: it can be the intended behaviour in
-  *         case of reset of a single ADC while the other ADCs sharing the same 
-  *         common group is still running.
-  * @param  hadc ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check ADC handle */
-  if(hadc == NULL)
-  {
-     return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Set ADC state */
-  SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
-  
-  /* Stop potential conversion on going, on regular group */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-  
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {   
-    /* Disable the ADC peripheral */
-    tmp_hal_status = ADC_Disable(hadc);
-    
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status != HAL_ERROR)
-    {
-      /* Change ADC state */
-      hadc->State = HAL_ADC_STATE_READY;
-    }
-  }
-  
-  
-  /* Configuration of ADC parameters if previous preliminary actions are      */ 
-  /* correctly completed.                                                     */
-  if (tmp_hal_status != HAL_ERROR)
-  {
-  
-    /* ========== Reset ADC registers ========== */
-    /* Reset register IER */
-    __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD   | ADC_IT_OVR  |
-                                ADC_IT_EOS   | ADC_IT_EOC  |
-                                ADC_IT_EOSMP | ADC_IT_RDY   ) );
-        
-    /* Reset register ISR */
-    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD   | ADC_FLAG_OVR  |
-                                ADC_FLAG_EOS   | ADC_FLAG_EOC  |
-                                ADC_FLAG_EOSMP | ADC_FLAG_RDY   ) );
-      
-    /* Reset register CR */
-    /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode     */
-    /* "read-set": no direct reset applicable.                                */
-
-    /* Reset register CFGR1 */
-    hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH   | ADC_CFGR1_AWDEN  | ADC_CFGR1_AWDSGL | ADC_CFGR1_DISCEN |
-                               ADC_CFGR1_AUTOFF  | ADC_CFGR1_WAIT   | ADC_CFGR1_CONT   | ADC_CFGR1_OVRMOD |     
-                               ADC_CFGR1_EXTEN   | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN  | ADC_CFGR1_RES    |
-                               ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN                      );
-    
-    /* Reset register CFGR2 */
-    /* Note: Update of ADC clock mode is conditioned to ADC state disabled:   */
-    /*       already done above.                                              */
-    hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE;
-    
-    /* Reset register SMPR */
-    hadc->Instance->SMPR &= ~ADC_SMPR_SMP;
-    
-    /* Reset register TR1 */
-    hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
-    
-    /* Reset register CHSELR */
-    hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 |
-                                ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12 |
-                                ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9  | ADC_CHSELR_CHSEL8  |
-                                ADC_CHSELR_CHSEL7  | ADC_CHSELR_CHSEL6  | ADC_CHSELR_CHSEL5  | ADC_CHSELR_CHSEL4  |
-                                ADC_CHSELR_CHSEL3  | ADC_CHSELR_CHSEL2  | ADC_CHSELR_CHSEL1  | ADC_CHSELR_CHSEL0   );
-    
-    /* Reset register DR */
-    /* bits in access mode read only, no direct reset applicable*/
-    
-    /* Reset register CCR */
-    ADC->CCR &= ~(ADC_CCR_ALL);
-
-    /* ========== Hard reset ADC peripheral ========== */
-    /* Performs a global reset of the entire ADC peripheral: ADC state is     */
-    /* forced to a similar state after device power-on.                       */
-    /* If needed, copy-paste and uncomment the following reset code into      */
-    /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)":              */
-    /*                                                                        */
-    /*  __HAL_RCC_ADC1_FORCE_RESET()                                                  */
-    /*  __HAL_RCC_ADC1_RELEASE_RESET()                                                */
-    
-    /* DeInit the low level hardware */
-    HAL_ADC_MspDeInit(hadc);
-    
-    /* Set ADC error code to none */
-    ADC_CLEAR_ERRORCODE(hadc);
-    
-    /* Set ADC state */
-    hadc->State = HAL_ADC_STATE_RESET; 
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-    
-/**
-  * @brief  Initializes the ADC MSP.
-  * @param  hadc ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_MspInit must be implemented in the user file.
-   */ 
-}
-
-/**
-  * @brief  DeInitializes the ADC MSP.
-  * @param  hadc ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_MspDeInit must be implemented in the user file.
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Exported_Functions_Group2 IO operation functions
- *  @brief    IO operation functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Start conversion of regular group.
-      (+) Stop conversion of regular group.
-      (+) Poll for conversion complete on regular group.
-      (+) Poll for conversion event.
-      (+) Get result of regular channel conversion.
-      (+) Start conversion of regular group and enable interruptions.
-      (+) Stop conversion of regular group and disable interruptions.
-      (+) Handle ADC interrupt request
-      (+) Start conversion of regular group and enable DMA transfer.
-      (+) Stop conversion of regular group and disable ADC DMA transfer.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Enables ADC, starts conversion of regular group.
-  *         Interruptions enabled in this function: None.
-  * @param  hadc ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* Perform ADC enable and conversion start if no conversion is on going */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Process locked */
-    __HAL_LOCK(hadc);
-      
-    /* Enable the ADC peripheral */
-    /* If low power mode AutoPowerOff is enabled, power-on/off phases are     */
-    /* performed automatically by hardware.                                   */
-    if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
-    {
-      tmp_hal_status = ADC_Enable(hadc);
-    }
-    
-    /* Start conversion if ADC is effectively enabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state                                                        */
-      /* - Clear state bitfield related to regular group conversion results   */
-      /* - Set state bitfield related to regular operation                    */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
-                        HAL_ADC_STATE_REG_BUSY);
-      
-      /* Reset ADC all error code fields */
-      ADC_CLEAR_ERRORCODE(hadc);
-      
-      /* Process unlocked */
-      /* Unlock before starting ADC conversions: in case of potential         */
-      /* interruption, to let the process to ADC IRQ Handler.                 */
-      __HAL_UNLOCK(hadc);
-      
-      /* Clear regular group conversion flag and overrun flag */
-      /* (To ensure of no unknown state from potential previous ADC           */
-      /* operations)                                                          */
-      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
-      
-      /* Enable conversion of regular group.                                  */
-      /* If software start has been selected, conversion starts immediately.  */
-      /* If external trigger has been selected, conversion will start at next */
-      /* trigger event.                                                       */
-      hadc->Instance->CR |= ADC_CR_ADSTART;
-    }
-  }
-  else
-  {
-    tmp_hal_status = HAL_BUSY;
-  }
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Stop ADC conversion of regular group, disable ADC peripheral.
-  * @param  hadc ADC handle
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
-{ 
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* 1. Stop potential conversion on going, on regular group */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-  
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {
-    /* 2. Disable the ADC peripheral */
-    tmp_hal_status = ADC_Disable(hadc);
-    
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_REG_BUSY,
-                        HAL_ADC_STATE_READY);
-    }
-  }
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Wait for regular group conversion to be completed.
-  * @note   ADC conversion flags EOS (end of sequence) and EOC (end of
-  *         conversion) are cleared by this function, with an exception:
-  *         if low power feature "LowPowerAutoWait" is enabled, flags are 
-  *         not cleared to not interfere with this feature until data register
-  *         is read using function HAL_ADC_GetValue().
-  * @note   This function cannot be used in a particular setup: ADC configured 
-  *         in DMA mode and polling for end of each conversion (ADC init
-  *         parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
-  *         In this case, DMA resets the flag EOC and polling cannot be
-  *         performed on each conversion. Nevertheless, polling can still 
-  *         be performed on the complete sequence (ADC init
-  *         parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
-  * @param  hadc ADC handle
-  * @param  Timeout Timeout value in millisecond.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
-{
-  uint32_t tickstart;
-  uint32_t tmp_Flag_EOC;
- 
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* If end of conversion selected to end of sequence */
-  if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
-  {
-    tmp_Flag_EOC = ADC_FLAG_EOS;
-  }
-  /* If end of conversion selected to end of each conversion */
-  else /* ADC_EOC_SINGLE_CONV */
-  {
-    /* Verification that ADC configuration is compliant with polling for      */
-    /* each conversion:                                                       */
-    /* Particular case is ADC configured in DMA mode and ADC sequencer with   */
-    /* several ranks and polling for end of each conversion.                  */
-    /* For code simplicity sake, this particular case is generalized to       */
-    /* ADC configured in DMA mode and and polling for end of each conversion. */
-    if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-      
-      /* Process unlocked */
-      __HAL_UNLOCK(hadc);
-      
-      return HAL_ERROR;
-    }
-    else
-    {
-      tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
-    }
-  }
-  
-  /* Get tick count */
-  tickstart = HAL_GetTick();
-  
-  /* Wait until End of Conversion flag is raised */
-  while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
-  {
-    /* Check if timeout is disabled (set to infinite wait) */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
-      {
-        /* Update ADC state machine to timeout */
-        SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
-        
-        /* Process unlocked */
-        __HAL_UNLOCK(hadc);
-        
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-    
-  /* Update ADC state machine */
-  SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
-  
-  /* Determine whether any further conversion upcoming on group regular       */
-  /* by external trigger, continuous mode or scan sequence on going.          */
-  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
-     (hadc->Init.ContinuousConvMode == DISABLE)   )
-  {
-    /* If End of Sequence is reached, disable interrupts */
-    if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
-    {
-      /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit             */
-      /* ADSTART==0 (no conversion on going)                                  */
-      if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-      {
-        /* Disable ADC end of single conversion interrupt on group regular */
-        /* Note: Overrun interrupt was enabled with EOC interrupt in          */
-        /* HAL_Start_IT(), but is not disabled here because can be used       */
-        /* by overrun IRQ process below.                                      */
-        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
-        
-        /* Set ADC state */
-        ADC_STATE_CLR_SET(hadc->State,
-                          HAL_ADC_STATE_REG_BUSY,
-                          HAL_ADC_STATE_READY);
-      }
-      else
-      {
-        /* Change ADC state to error state */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-        
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      }
-    }
-  }
-  
-  /* Clear end of conversion flag of regular group if low power feature       */
-  /* "LowPowerAutoWait " is disabled, to not interfere with this feature      */
-  /* until data register is read using function HAL_ADC_GetValue().           */
-  if (hadc->Init.LowPowerAutoWait == DISABLE)
-  {
-    /* Clear regular group conversion flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
-  }
-  
-  /* Return ADC state */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Poll for conversion event.
-  * @param  hadc ADC handle
-  * @param  EventType the ADC event type.
-  *          This parameter can be one of the following values:
-  *            @arg ADC_AWD_EVENT: ADC Analog watchdog event
-  *            @arg ADC_OVR_EVENT: ADC Overrun event
-  * @param  Timeout Timeout value in millisecond.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
-{
-  uint32_t tickstart=0; 
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_EVENT_TYPE(EventType));
-  
-  /* Get tick count */
-  tickstart = HAL_GetTick();   
-      
-  /* Check selected event flag */
-  while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
-  {
-    /* Check if timeout is disabled (set to infinite wait) */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
-      {
-        /* Update ADC state machine to timeout */
-        SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
-        
-        /* Process unlocked */
-        __HAL_UNLOCK(hadc);
-        
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  switch(EventType)
-  {
-  /* Analog watchdog (level out of window) event */
-  case ADC_AWD_EVENT:
-    /* Set ADC state */
-    SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
-      
-    /* Clear ADC analog watchdog flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
-    break;
-  
-  /* Overrun event */
-  default: /* Case ADC_OVR_EVENT */
-    /* If overrun is set to overwrite previous data, overrun event is not     */
-    /* considered as an error.                                                */
-    /* (cf ref manual "Managing conversions without using the DMA and without */
-    /* overrun ")                                                             */
-    if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
-    {
-      /* Set ADC state */
-      SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
-        
-      /* Set ADC error code to overrun */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
-    }
-    
-    /* Clear ADC Overrun flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
-    break;
-  }
-  
-  /* Return ADC state */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables ADC, starts conversion of regular group with interruption.
-  *         Interruptions enabled in this function:
-  *          - EOC (end of conversion of regular group) or EOS (end of 
-  *            sequence of regular group) depending on ADC initialization 
-  *            parameter "EOCSelection"
-  *          - overrun (if available)
-  *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-    
-  /* Perform ADC enable and conversion start if no conversion is on going */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Process locked */
-    __HAL_LOCK(hadc);
-     
-    /* Enable the ADC peripheral */
-    /* If low power mode AutoPowerOff is enabled, power-on/off phases are     */
-    /* performed automatically by hardware.                                   */
-    if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
-    {
-      tmp_hal_status = ADC_Enable(hadc);
-    }
-    
-    /* Start conversion if ADC is effectively enabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state                                                        */
-      /* - Clear state bitfield related to regular group conversion results   */
-      /* - Set state bitfield related to regular operation                    */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
-                        HAL_ADC_STATE_REG_BUSY);
-      
-      /* Reset ADC all error code fields */
-      ADC_CLEAR_ERRORCODE(hadc);
-      
-      /* Process unlocked */
-      /* Unlock before starting ADC conversions: in case of potential         */
-      /* interruption, to let the process to ADC IRQ Handler.                 */
-      __HAL_UNLOCK(hadc);
-      
-      /* Clear regular group conversion flag and overrun flag */
-      /* (To ensure of no unknown state from potential previous ADC           */
-      /* operations)                                                          */
-      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
-      
-      /* Enable ADC end of conversion interrupt */
-      /* Enable ADC overrun interrupt */  
-      switch(hadc->Init.EOCSelection)
-      {
-        case ADC_EOC_SEQ_CONV: 
-          __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
-          __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
-          break;
-        /* case ADC_EOC_SINGLE_CONV */
-        default:
-          __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
-          break;
-      }
-      
-      /* Enable conversion of regular group.                                  */
-      /* If software start has been selected, conversion starts immediately.  */
-      /* If external trigger has been selected, conversion will start at next */
-      /* trigger event.                                                       */
-      hadc->Instance->CR |= ADC_CR_ADSTART;
-    }
-  }
-  else
-  {
-    tmp_hal_status = HAL_BUSY;
-  }    
-    
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-
-/**
-  * @brief  Stop ADC conversion of regular group, disable interruption of 
-  *         end-of-conversion, disable ADC peripheral.
-  * @param  hadc ADC handle
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* 1. Stop potential conversion on going, on regular group */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-   
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {
-    /* Disable ADC end of conversion interrupt for regular group */
-    /* Disable ADC overrun interrupt */
-    __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
-    
-    /* 2. Disable the ADC peripheral */
-    tmp_hal_status = ADC_Disable(hadc);
-    
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_REG_BUSY,
-                        HAL_ADC_STATE_READY);
-    }
-  }
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Enables ADC, starts conversion of regular group and transfers result
-  *         through DMA.
-  *         Interruptions enabled in this function:
-  *          - DMA transfer complete
-  *          - DMA half transfer
-  *          - overrun
-  *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc ADC handle
-  * @param  pData The destination Buffer address.
-  * @param  Length The length of data to be transferred from ADC peripheral to memory.
-  * @retval None
-  */
-HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* Perform ADC enable and conversion start if no conversion is on going */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Process locked */
-    __HAL_LOCK(hadc);
-
-    /* Enable the ADC peripheral */
-    /* If low power mode AutoPowerOff is enabled, power-on/off phases are       */
-    /* performed automatically by hardware.                                     */
-    if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
-    {
-      tmp_hal_status = ADC_Enable(hadc);
-    }
-    
-    /* Start conversion if ADC is effectively enabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state                                                        */
-      /* - Clear state bitfield related to regular group conversion results   */
-      /* - Set state bitfield related to regular operation                    */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
-                        HAL_ADC_STATE_REG_BUSY);
-      
-      /* Reset ADC all error code fields */
-      ADC_CLEAR_ERRORCODE(hadc);
-      
-      /* Process unlocked */
-      /* Unlock before starting ADC conversions: in case of potential         */
-      /* interruption, to let the process to ADC IRQ Handler.                 */
-      __HAL_UNLOCK(hadc);
-
-      /* Set the DMA transfer complete callback */
-      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
-
-      /* Set the DMA half transfer complete callback */
-      hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
-      
-      /* Set the DMA error callback */
-      hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
-
-      
-      /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC   */
-      /* start (in case of SW start):                                         */
-      
-      /* Clear regular group conversion flag and overrun flag */
-      /* (To ensure of no unknown state from potential previous ADC           */
-      /* operations)                                                          */
-      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
-      
-      /* Enable ADC overrun interrupt */
-      __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
-      
-      /* Enable ADC DMA mode */
-      hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
-      
-      /* Start the DMA channel */
-      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
-           
-      /* Enable conversion of regular group.                                  */
-      /* If software start has been selected, conversion starts immediately.  */
-      /* If external trigger has been selected, conversion will start at next */
-      /* trigger event.                                                       */
-      hadc->Instance->CR |= ADC_CR_ADSTART;
-    }
-  }
-  else
-  {
-    tmp_hal_status = HAL_BUSY;
-  }
-    
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Stop ADC conversion of regular group, disable ADC DMA transfer, disable 
-  *         ADC peripheral.
-  *         Each of these interruptions has its dedicated callback function.
-  * @param  hadc ADC handle
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
-{  
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* 1. Stop potential conversion on going, on regular group */
-  tmp_hal_status = ADC_ConversionStop(hadc);
-  
-  /* Disable ADC peripheral if conversions are effectively stopped */
-  if (tmp_hal_status == HAL_OK)
-  {
-    /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
-    hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN;
-    
-    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
-    /* while DMA transfer is on going)                                        */
-    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);   
-    
-    /* Check if DMA channel effectively disabled */
-    if (tmp_hal_status != HAL_OK)
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
-    }
-    
-    /* Disable ADC overrun interrupt */
-    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
-    
-    /* 2. Disable the ADC peripheral */
-    /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep  */
-    /* in memory a potential failing status.                                  */
-    if (tmp_hal_status == HAL_OK)
-    {
-      tmp_hal_status = ADC_Disable(hadc);
-    }
-    else
-    {
-      ADC_Disable(hadc);
-    }
-
-    /* Check if ADC is effectively disabled */
-    if (tmp_hal_status == HAL_OK)
-    {
-      /* Set ADC state */
-      ADC_STATE_CLR_SET(hadc->State,
-                        HAL_ADC_STATE_REG_BUSY,
-                        HAL_ADC_STATE_READY);
-    }
-    
-  }
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @brief  Get ADC regular group conversion result.
-  * @note   Reading register DR automatically clears ADC flag EOC
-  *         (ADC group regular end of unitary conversion).
-  * @note   This function does not clear ADC flag EOS 
-  *         (ADC group regular end of sequence conversion).
-  *         Occurrence of flag EOS rising:
-  *          - If sequencer is composed of 1 rank, flag EOS is equivalent
-  *            to flag EOC.
-  *          - If sequencer is composed of several ranks, during the scan
-  *            sequence flag EOC only is raised, at the end of the scan sequence
-  *            both flags EOC and EOS are raised.
-  *         To clear this flag, either use function: 
-  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
-  *         model polling: @ref HAL_ADC_PollForConversion() 
-  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
-  * @param  hadc ADC handle
-  * @retval ADC group regular conversion data
-  */
-uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* Note: EOC flag is not cleared here by software because automatically     */
-  /*       cleared by hardware when reading register DR.                      */
-  
-  /* Return ADC converted value */ 
-  return hadc->Instance->DR;
-}
-
-/**
-  * @brief  Handles ADC interrupt request.  
-  * @param  hadc ADC handle
-  * @retval None
-  */
-void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
-  assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
-  
-  /* ========== Check End of Conversion flag for regular group ========== */
-  if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || 
-      (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS))   )
-  {
-    /* Update state machine on conversion status if not in error state */
-    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
-    {
-      /* Set ADC state */
-      SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 
-    }
-    
-    /* Determine whether any further conversion upcoming on group regular     */
-    /* by external trigger, continuous mode or scan sequence on going.        */
-    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
-       (hadc->Init.ContinuousConvMode == DISABLE)   )
-    {
-      /* If End of Sequence is reached, disable interrupts */
-      if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
-      {
-        /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit           */
-        /* ADSTART==0 (no conversion on going)                                */
-        if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-        {
-          /* Disable ADC end of single conversion interrupt on group regular */
-          /* Note: Overrun interrupt was enabled with EOC interrupt in        */
-          /* HAL_Start_IT(), but is not disabled here because can be used     */
-          /* by overrun IRQ process below.                                    */
-          __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
-          
-          /* Set ADC state */
-          ADC_STATE_CLR_SET(hadc->State,
-                            HAL_ADC_STATE_REG_BUSY,
-                            HAL_ADC_STATE_READY);
-        }
-        else
-        {
-          /* Change ADC state to error state */
-          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-          
-          /* Set ADC error code to ADC IP internal error */
-          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        }
-      }
-    }
-    
-    /* Conversion complete callback */
-    /* Note: into callback, to determine if conversion has been triggered     */
-    /*       from EOC or EOS, possibility to use:                             */
-    /*        " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) "                */
-      HAL_ADC_ConvCpltCallback(hadc);
-
-    
-    /* Clear regular group conversion flag */
-    /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of         */
-    /*       conversion flags clear induces the release of the preserved data.*/
-    /*       Therefore, if the preserved data value is needed, it must be     */
-    /*       read preliminarily into HAL_ADC_ConvCpltCallback().              */
-    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) );
-  }
-   
-  /* ========== Check Analog watchdog flags ========== */
-  if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
-  {
-      /* Set ADC state */
-      SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
-
-    /* Level out of window callback */ 
-    HAL_ADC_LevelOutOfWindowCallback(hadc);
-    
-    /* Clear ADC Analog watchdog flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
-   
-  }
-  
-  
-  /* ========== Check Overrun flag ========== */
-  if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
-  {
-    /* If overrun is set to overwrite previous data (default setting),        */
-    /* overrun event is not considered as an error.                           */
-    /* (cf ref manual "Managing conversions without using the DMA and without */
-    /* overrun ")                                                             */
-    /* Exception for usage with DMA overrun event always considered as an     */
-    /* error.                                                                 */
-    if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)            ||
-        HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)  )
-    {
-      /* Set ADC error code to overrun */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
-      
-      /* Clear ADC overrun flag */
-      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
-      
-      /* Error callback */ 
-      HAL_ADC_ErrorCallback(hadc);
-    }
-    
-    /* Clear the Overrun flag */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
-  }
-
-}
-
-
-/**
-  * @brief  Conversion complete callback in non blocking mode 
-  * @param  hadc ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_ConvCpltCallback must be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Conversion DMA half-transfer callback in non blocking mode 
-  * @param  hadc ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
-  */
-}
-
-/**
-  * @brief  Analog watchdog callback in non blocking mode. 
-  * @param  hadc ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file.
-  */
-}
-
-/**
-  * @brief  ADC error callback in non blocking mode
-  *        (ADC conversion with interruption or transfer by DMA)
-  * @param  hadc ADC handle
-  * @retval None
-  */
-__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hadc);
-
-  /* NOTE : This function should not be modified. When the callback is needed,
-            function HAL_ADC_ErrorCallback must be implemented in the user file.
-  */
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
- *  @brief    Peripheral Control functions 
- *
-@verbatim   
- ===============================================================================
-             ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure channels on regular group
-      (+) Configure the analog watchdog
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configures the the selected channel to be linked to the regular
-  *         group.
-  * @note   In case of usage of internal measurement channels:
-  *         VrefInt/Vbat/TempSensor.
-  *         Sampling time constraints must be respected (sampling time can be 
-  *         adjusted in function of ADC clock frequency and sampling time 
-  *         setting).
-  *         Refer to device datasheet for timings values, parameters TS_vrefint,
-  *         TS_vbat, TS_temp (values rough order: 5us to 17us).
-  *         These internal paths can be be disabled using function 
-  *         HAL_ADC_DeInit().
-  * @note   Possibility to update parameters on the fly:
-  *         This function initializes channel into regular group, following  
-  *         calls to this function can be used to reconfigure some parameters 
-  *         of structure "ADC_ChannelConfTypeDef" on the fly, without reseting 
-  *         the ADC.
-  *         The setting of these parameters is conditioned to ADC state.
-  *         For parameters constraints, see comments of structure 
-  *         "ADC_ChannelConfTypeDef".
-  * @param  hadc ADC handle
-  * @param  sConfig Structure of ADC channel for regular group.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  __IO uint32_t wait_loop_index = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
-  assert_param(IS_ADC_RANK(sConfig->Rank));
-  
-  if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
-  {
-    assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
-  }
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* Parameters update conditioned to ADC state:                              */
-  /* Parameters that can be updated when ADC is disabled or enabled without   */
-  /* conversion on going on regular group:                                    */
-  /*  - Channel number                                                        */
-  /*  - Channel sampling time                                                 */
-  /*  - Management of internal measurement channels: VrefInt/TempSensor/Vbat  */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Configure channel: depending on rank setting, add it or remove it from */
-    /* ADC conversion sequencer.                                              */
-    if (sConfig->Rank != ADC_RANK_NONE)
-    {
-      /* Regular sequence configuration */
-      /* Set the channel selection register from the selected channel */
-      hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel);
-      
-      /* Channel sampling time configuration */
-      /* Management of parameters "SamplingTimeCommon" and "SamplingTime"     */
-      /* (obsolete): sampling time set in this function with                  */
-      /* parameter "SamplingTime" (obsolete) only if not already set into     */
-      /* ADC initialization structure with parameter "SamplingTimeCommon".    */
-      if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
-      {
-        /* Modify sampling time if needed (not needed in case of reoccurrence */
-        /* for several channels programmed consecutively into the sequencer)  */
-        if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc))
-        {
-          /* Channel sampling time configuration */
-          /* Clear the old sample time */
-          hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
-          
-          /* Set the new sample time */
-          hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime);
-        }
-      }
-      
-      /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
-      /* internal measurement paths enable: If internal channel selected,     */
-      /* enable dedicated internal buffers and path.                          */
-      /* Note: these internal measurement paths can be disabled using         */
-      /*       HAL_ADC_DeInit() or removing the channel from sequencer with   */
-      /*       channel configuration parameter "Rank".                        */
-      if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
-      {
-        /* If Channel_16 is selected, enable Temp. sensor measurement path. */
-        /* If Channel_17 is selected, enable VREFINT measurement path. */
-        /* If Channel_18 is selected, enable VBAT measurement path. */
-        ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
-        
-        /* If Temp. sensor is selected, wait for stabilization delay */
-        if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
-        {
-          /* Delay for temperature sensor stabilization time */
-          /* Compute number of CPU cycles to wait for */
-          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
-          while(wait_loop_index != 0U)
-          {
-            wait_loop_index--;
-          }
-        }
-      }
-    }
-    else
-    {
-      /* Regular sequence configuration */
-      /* Reset the channel selection register from the selected channel */
-      hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel);
-      
-      /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
-      /* internal measurement paths disable: If internal channel selected,    */
-      /* disable dedicated internal buffers and path.                         */
-      if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
-      {
-        /* If Channel_16 is selected, disable Temp. sensor measurement path. */
-        /* If Channel_17 is selected, disable VREFINT measurement path. */
-        /* If Channel_18 is selected, disable VBAT measurement path. */
-        ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
-      }
-    }
-    
-  }
-   
-  /* If a conversion is on going on regular group, no update on regular       */
-  /* channel could be done on neither of the channel configuration structure  */
-  /* parameters.                                                              */
-  else
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-    
-    tmp_hal_status = HAL_ERROR;
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-
-/**
-  * @brief  Configures the analog watchdog.
-  * @note   Possibility to update parameters on the fly:
-  *         This function initializes the selected analog watchdog, following  
-  *         calls to this function can be used to reconfigure some parameters 
-  *         of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting 
-  *         the ADC.
-  *         The setting of these parameters is conditioned to ADC state.
-  *         For parameters constraints, see comments of structure 
-  *         "ADC_AnalogWDGConfTypeDef".
-  * @param  hadc ADC handle
-  * @param  AnalogWDGConfig Structure of ADC analog watchdog configuration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  
-  uint32_t tmpAWDHighThresholdShifted;
-  uint32_t tmpAWDLowThresholdShifted;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
-  assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
-
-  /* Verify if threshold is within the selected ADC resolution */
-  assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
-  assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
-
-  if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
-  {
-    assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
-  }
-  
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* Parameters update conditioned to ADC state:                              */
-  /* Parameters that can be updated when ADC is disabled or enabled without   */
-  /* conversion on going on regular group:                                    */
-  /*  - Analog watchdog channels                                              */
-  /*  - Analog watchdog thresholds                                            */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-  {
-    /* Configuration of analog watchdog:                                      */
-    /*  - Set the analog watchdog enable mode: one or overall group of        */
-    /*    channels.                                                           */
-    /*  - Set the Analog watchdog channel (is not used if watchdog            */
-    /*    mode "all channels": ADC_CFGR_AWD1SGL=0).                           */
-    hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL |
-                                ADC_CFGR1_AWDEN  |
-                                ADC_CFGR1_AWDCH   );
-    
-    hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode            |
-                               ADC_CFGR_AWDCH(AnalogWDGConfig->Channel)  );
-
-    /* Shift the offset in function of the selected ADC resolution: Thresholds*/
-    /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0   */
-    tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
-    tmpAWDLowThresholdShifted  = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
-    
-    /* Set the high and low thresholds */
-    hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
-    hadc->Instance->TR |=  ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) |
-                             tmpAWDLowThresholdShifted                           );
-    
-    /* Clear the ADC Analog watchdog flag (in case of left enabled by         */
-    /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler()   */
-    /* or HAL_ADC_PollForEvent().                                             */
-    __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD);
-    
-    /* Configure ADC Analog watchdog interrupt */
-    if(AnalogWDGConfig->ITMode == ENABLE)
-    {
-      /* Enable the ADC Analog watchdog interrupt */
-      __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
-    }
-    else
-    {
-      /* Disable the ADC Analog watchdog interrupt */
-      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
-    }
-    
-  }
-  /* If a conversion is on going on regular group, no update could be done    */
-  /* on neither of the AWD configuration structure parameters.                */
-  else
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-    
-    tmp_hal_status = HAL_ERROR;
-  }
-  
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-
-/**
-  * @}
-  */
-
-
-/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
- *  @brief    Peripheral State functions
- *
-@verbatim
- ===============================================================================
-            ##### Peripheral State and Errors functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions to get in run-time the status of the  
-    peripheral.
-      (+) Check the ADC state
-      (+) Check the ADC error code
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the ADC state
-  * @note   ADC state machine is managed by bitfields, ADC status must be 
-  *         compared with states bits.
-  *         For example:                                                         
-  *           " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
-  *           " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1)    ) "
-  * @param  hadc ADC handle
-  * @retval HAL state
-  */
-uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-  
-  /* Return ADC state */
-  return hadc->State;
-}
-
-/**
-  * @brief  Return the ADC error code
-  * @param  hadc ADC handle
-  * @retval ADC Error Code
-  */
-uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
-{
-  return hadc->ErrorCode;
-}
-
-/**
-  * @}
-  */  
-
-/**
-  * @}
-  */
-
-/** @defgroup ADC_Private_Functions ADC Private Functions
-  * @{
-  */
-
-/**
-  * @brief  Enable the selected ADC.
-  * @note   Prerequisite condition to use this function: ADC must be disabled
-  *         and voltage regulator must be enabled (done into HAL_ADC_Init()).
-  * @note   If low power mode AutoPowerOff is enabled, power-on/off phases are
-  *         performed automatically by hardware.
-  *         In this mode, this function is useless and must not be called because 
-  *         flag ADC_FLAG_RDY is not usable.
-  *         Therefore, this function must be called under condition of
-  *         "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
-  * @param  hadc ADC handle
-  * @retval HAL status.
-  */
-static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
-{
-  uint32_t tickstart = 0U;
-  __IO uint32_t wait_loop_index = 0U;
-  
-  /* ADC enable and wait for ADC ready (in case of ADC is disabled or         */
-  /* enabling phase not yet completed: flag ADC ready not yet set).           */
-  /* Timeout implemented to not be stuck if ADC cannot be enabled (possible   */
-  /* causes: ADC clock not running, ...).                                     */
-  if (ADC_IS_ENABLE(hadc) == RESET)
-  {
-    /* Check if conditions to enable the ADC are fulfilled */
-    if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-    
-      /* Set ADC error code to ADC IP internal error */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      
-      return HAL_ERROR;
-    }
-    
-    /* Enable the ADC peripheral */
-    __HAL_ADC_ENABLE(hadc);
-    
-    /* Delay for ADC stabilization time */
-    /* Compute number of CPU cycles to wait for */
-    wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
-    while(wait_loop_index != 0U)
-    {
-      wait_loop_index--;
-    }
-
-    /* Get tick count */
-    tickstart = HAL_GetTick();
-    
-    /* Wait for ADC effectively enabled */
-    while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
-    {
-      if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-      
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      
-        return HAL_ERROR;
-      }
-    }   
-    
-  }
-   
-  /* Return HAL status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the selected ADC.
-  * @note   Prerequisite condition to use this function: ADC conversions must be
-  *         stopped.
-  * @param  hadc ADC handle
-  * @retval HAL status.
-  */
-static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Verification if ADC is not already disabled:                             */
-  /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already  */
-  /*       disabled.                                                          */
-  if (ADC_IS_ENABLE(hadc) != RESET)
-  {
-    /* Check if conditions to disable the ADC are fulfilled */
-    if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
-    {
-      /* Disable the ADC peripheral */
-      __HAL_ADC_DISABLE(hadc);
-    }
-    else
-    {
-      /* Update ADC state machine to error */
-      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-    
-      /* Set ADC error code to ADC IP internal error */
-      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-      
-      return HAL_ERROR;
-    }
-     
-    /* Wait for ADC effectively disabled */
-    /* Get tick count */
-    tickstart = HAL_GetTick();
-    
-    while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
-    {
-      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-      
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        
-        return HAL_ERROR;
-      }
-    }
-  }
-  
-  /* Return HAL status */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Stop ADC conversion.
-  * @note   Prerequisite condition to use this function: ADC conversions must be
-  *         stopped to disable the ADC.
-  * @param  hadc ADC handle
-  * @retval HAL status.
-  */
-static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-    
-  /* Verification if ADC is not already stopped on regular group to bypass    */
-  /* this function if not needed.                                             */
-  if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
-  {
-    
-    /* Stop potential conversion on going on regular group */
-    /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
-    if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && 
-        HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS)                  )
-    {
-      /* Stop conversions on regular group */
-      hadc->Instance->CR |= ADC_CR_ADSTP;
-    }
-    
-    /* Wait for conversion effectively stopped */
-    /* Get tick count */
-    tickstart = HAL_GetTick();
-      
-    while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
-    {
-      if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
-      
-        /* Set ADC error code to ADC IP internal error */
-        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        
-        return HAL_ERROR;
-      }
-    }
-    
-  }
-   
-  /* Return HAL status */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  DMA transfer complete callback. 
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
-{
-  /* Retrieve ADC handle corresponding to current DMA handle */
-  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  /* Update state machine on conversion status if not in error state */
-  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
-  {
-    /* Set ADC state */
-    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 
-    
-    /* Determine whether any further conversion upcoming on group regular     */
-    /* by external trigger, continuous mode or scan sequence on going.        */
-    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        && 
-       (hadc->Init.ContinuousConvMode == DISABLE)   )
-    {
-      /* If End of Sequence is reached, disable interrupts */
-      if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
-      {
-        /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit           */
-        /* ADSTART==0 (no conversion on going)                                */
-        if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
-        {
-          /* Disable ADC end of single conversion interrupt on group regular */
-          /* Note: Overrun interrupt was enabled with EOC interrupt in        */
-          /* HAL_Start_IT(), but is not disabled here because can be used     */
-          /* by overrun IRQ process below.                                    */
-          __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
-          
-          /* Set ADC state */
-          ADC_STATE_CLR_SET(hadc->State,
-                            HAL_ADC_STATE_REG_BUSY,
-                            HAL_ADC_STATE_READY);
-        }
-        else
-        {
-          /* Change ADC state to error state */
-          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-          
-          /* Set ADC error code to ADC IP internal error */
-          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
-        }
-      }
-    }
-
-    /* Conversion complete callback */
-    HAL_ADC_ConvCpltCallback(hadc); 
-  }
-  else
-  {
-    /* Call DMA error callback */
-    hadc->DMA_Handle->XferErrorCallback(hdma);
-  }
-
-}
-
-/**
-  * @brief  DMA half transfer complete callback. 
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)   
-{
-  /* Retrieve ADC handle corresponding to current DMA handle */
-  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  /* Half conversion callback */
-  HAL_ADC_ConvHalfCpltCallback(hadc); 
-}
-
-/**
-  * @brief  DMA error callback 
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-static void ADC_DMAError(DMA_HandleTypeDef *hdma)   
-{
-  /* Retrieve ADC handle corresponding to current DMA handle */
-  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  /* Set ADC state */
-  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
-  
-  /* Set ADC error code to DMA error */
-  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
-  
-  /* Error callback */
-  HAL_ADC_ErrorCallback(hadc); 
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_ADC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_adc_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_adc_ex.c
deleted file mode 100644
index a3408d9d..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_adc_ex.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_adc_ex.c
-  * @author  MCD Application Team
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Analog to Digital Convertor (ADC)
-  *          peripheral:
-  *           + Operation functions
-  *             ++ Calibration (ADC automatic self-calibration)
-  *          Other functions (generic functions) are available in file 
-  *          "stm32f0xx_hal_adc.c".
-  *
-  @verbatim
-  [..] 
-  (@) Sections "ADC peripheral features" and "How to use this driver" are
-      available in file of generic functions "stm32l1xx_hal_adc.c".
-  [..]
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup ADCEx ADCEx
-  * @brief ADC HAL module driver
-  * @{
-  */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
-  * @{
-  */ 
- 
-/* Fixed timeout values for ADC calibration, enable settling time, disable  */
-  /* settling time.                                                           */
-  /* Values defined to be higher than worst cases: low clock frequency,       */
-  /* maximum prescaler.                                                       */
-  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
-  /* prescaler 4.                                                             */
-  /* Unit: ms                                                                 */
-  #define ADC_DISABLE_TIMEOUT           2
-  #define ADC_CALIBRATION_TIMEOUT       2U      
-/**
-  * @}
-  */
-
-/* Private macros -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
-  * @{
-  */
-
-/** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 
- *  @brief    Extended Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Perform the ADC calibration. 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Perform an ADC automatic self-calibration
-  *         Calibration prerequisite: ADC must be disabled (execute this
-  *         function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
-  * @note   Calibration factor can be read after calibration, using function
-  *         HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]).
-  * @param  hadc ADC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
-{
-  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
-  uint32_t tickstart = 0U;
-  uint32_t backup_setting_adc_dma_transfer = 0; /* Note: Variable not declared as volatile because register read is already declared as volatile */
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(hadc);
-  
-  /* Calibration prerequisite: ADC must be disabled. */
-  if (ADC_IS_ENABLE(hadc) == RESET)
-  {
-    /* Set ADC state */
-    ADC_STATE_CLR_SET(hadc->State, 
-                      HAL_ADC_STATE_REG_BUSY,
-                      HAL_ADC_STATE_BUSY_INTERNAL);
-    
-    /* Disable ADC DMA transfer request during calibration */
-    /* Note: Specificity of this STM32 serie: Calibration factor is           */
-    /*       available in data register and also transfered by DMA.           */
-    /*       To not insert ADC calibration factor among ADC conversion data   */
-    /*       in array variable, DMA transfer must be disabled during          */
-    /*       calibration.                                                     */
-    backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
-    CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG);
-
-    /* Start ADC calibration */
-    hadc->Instance->CR |= ADC_CR_ADCAL;
-
-    tickstart = HAL_GetTick();  
-
-    /* Wait for calibration completion */
-    while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
-    {
-      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
-      {
-        /* Update ADC state machine to error */
-        ADC_STATE_CLR_SET(hadc->State,
-                          HAL_ADC_STATE_BUSY_INTERNAL,
-                          HAL_ADC_STATE_ERROR_INTERNAL);
-        
-        /* Process unlocked */
-        __HAL_UNLOCK(hadc);
-        
-        return HAL_ERROR;
-      }
-    }
-    
-    /* Restore ADC DMA transfer request after calibration */
-    SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer);
-
-    /* Set ADC state */
-    ADC_STATE_CLR_SET(hadc->State,
-                      HAL_ADC_STATE_BUSY_INTERNAL,
-                      HAL_ADC_STATE_READY);
-  }
-  else
-  {
-    /* Update ADC state machine to error */
-    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
-    
-    tmp_hal_status = HAL_ERROR;
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hadc);
-  
-  /* Return function status */
-  return tmp_hal_status;
-}
-
-/**
-  * @}
-  */  
-
-/**
-  * @}
-  */
-
-#endif /* HAL_ADC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_can.c b/lib/hal-stm32f0/source/stm32f0xx_hal_can.c
deleted file mode 100644
index 17dede7d..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_can.c
+++ /dev/null
@@ -1,1697 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_can.c
-  * @author  MCD Application Team
-  * @brief   CAN HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Controller Area Network (CAN) peripheral:
-  *           + Initialization and de-initialization functions 
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Error functions
-  *
-  @verbatim
-  ==============================================================================    
-                        ##### How to use this driver #####
-  ==============================================================================
-    [..]            
-      (#) Enable the CAN controller interface clock using __HAL_RCC_CAN1_CLK_ENABLE(); 
-       
-      (#) CAN pins configuration
-        (++) Enable the clock for the CAN GPIOs using the following function:
-             __HAL_RCC_GPIOx_CLK_ENABLE();   
-        (++) Connect and configure the involved CAN pins to AF9 using the 
-              following function HAL_GPIO_Init(); 
-              
-      (#) Initialise and configure the CAN using HAL_CAN_Init() function.   
-                 
-      (#) Transmit the desired CAN frame using HAL_CAN_Transmit() function.
-
-      (#) Or transmit the desired CAN frame using HAL_CAN_Transmit_IT() function.
-
-      (#) Receive a CAN frame using HAL_CAN_Receive() function.
-
-      (#) Or receive a CAN frame using HAL_CAN_Receive_IT() function.
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]    
-       (+) Start the CAN peripheral transmission and wait the end of this operation 
-           using HAL_CAN_Transmit(), at this stage user can specify the value of timeout
-           according to his end application
-       (+) Start the CAN peripheral reception and wait the end of this operation 
-           using HAL_CAN_Receive(), at this stage user can specify the value of timeout
-           according to his end application 
-       
-     *** Interrupt mode IO operation ***    
-     ===================================
-     [..]    
-       (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT()
-       (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT()         
-       (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine
-       (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can 
-            add his own code by customization of function pointer HAL_CAN_TxCpltCallback 
-       (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can 
-            add his own code by customization of function pointer HAL_CAN_ErrorCallback
- 
-     *** CAN HAL driver macros list ***
-     ============================================= 
-     [..]
-       Below the list of most used macros in CAN HAL driver.
-       
-      (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts
-      (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts
-      (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled
-      (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags
-      (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status
-      
-     [..] 
-      (@) You can refer to the CAN HAL driver header file for more useful macros 
-                
-  @endverbatim
-           
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#ifdef HAL_CAN_MODULE_ENABLED  
-  
-#if defined(STM32F072xB) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F091xC) || defined(STM32F098xx) 
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CAN CAN
-  * @brief CAN driver modules
-  * @{
-  */ 
-  
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup CAN_Private_Constants CAN Private Constants
-  * @{
-  */
-#define CAN_TIMEOUT_VALUE 10U
-/**
-  * @}
-  */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup CAN_Private_Functions CAN Private Functions
-  * @{
-  */
-static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber);
-static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan);
-/**
-  * @}
-  */
-  
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup CAN_Exported_Functions CAN Exported Functions
-  * @{
-  */
-
-/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
-  ==============================================================================
-              ##### Initialization and de-initialization functions #####
-  ==============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the CAN. 
-      (+) De-initialize the CAN. 
-         
-@endverbatim
-  * @{
-  */
-  
-/**
-  * @brief Initializes the CAN peripheral according to the specified
-  *        parameters in the CAN_InitStruct.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *             the configuration information for the specified CAN.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
-{
-  uint32_t status = CAN_INITSTATUS_FAILED;  /* Default init status */
-  uint32_t tickstart = 0U;
-  
-  /* Check CAN handle */
-  if(hcan == NULL)
-  {
-     return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
-  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM));
-  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM));
-  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM));
-  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART));
-  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM));
-  assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP));
-  assert_param(IS_CAN_MODE(hcan->Init.Mode));
-  assert_param(IS_CAN_SJW(hcan->Init.SJW));
-  assert_param(IS_CAN_BS1(hcan->Init.BS1));
-  assert_param(IS_CAN_BS2(hcan->Init.BS2));
-  assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
-  
-  if(hcan->State == HAL_CAN_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hcan->Lock = HAL_UNLOCKED;
-    /* Init the low level hardware */
-    HAL_CAN_MspInit(hcan);
-  }
-  
-  /* Initialize the CAN state*/
-  hcan->State = HAL_CAN_STATE_BUSY;
-  
-  /* Exit from sleep mode */
-  CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
-
-  /* Request initialisation */
-  SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
-
-  /* Get tick */
-  tickstart = HAL_GetTick();   
-  
-  /* Wait the acknowledge */
-  while(HAL_IS_BIT_CLR(hcan->Instance->MSR, CAN_MSR_INAK))
-  {
-    if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE)
-    {
-      hcan->State= HAL_CAN_STATE_TIMEOUT;
-      /* Process unlocked */
-      __HAL_UNLOCK(hcan);
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Check acknowledge */
-  if (HAL_IS_BIT_SET(hcan->Instance->MSR, CAN_MSR_INAK))
-  {
-    /* Set the time triggered communication mode */
-    if (hcan->Init.TTCM == ENABLE)
-    {
-      SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
-    }
-    else
-    {
-      CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM);
-    }
-
-    /* Set the automatic bus-off management */
-    if (hcan->Init.ABOM == ENABLE)
-    {
-      SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
-    }
-    else
-    {
-      CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM);
-    }
-
-    /* Set the automatic wake-up mode */
-    if (hcan->Init.AWUM == ENABLE)
-    {
-      SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
-    }
-    else
-    {
-      CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM);
-    }
-
-    /* Set the no automatic retransmission */
-    if (hcan->Init.NART == ENABLE)
-    {
-      SET_BIT(hcan->Instance->MCR, CAN_MCR_NART);
-    }
-    else
-    {
-      CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART);
-    }
-
-    /* Set the receive FIFO locked mode */
-    if (hcan->Init.RFLM == ENABLE)
-    {
-      SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
-    }
-    else
-    {
-      CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM);
-    }
-
-    /* Set the transmit FIFO priority */
-    if (hcan->Init.TXFP == ENABLE)
-    {
-      SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
-    }
-    else
-    {
-      CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP);
-    }
-
-    /* Set the bit timing register */
-    WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode           |
-                                              hcan->Init.SJW            |
-                                              hcan->Init.BS1            |
-                                              hcan->Init.BS2            |
-                                              (hcan->Init.Prescaler - 1U) ));
-
-    /* Request leave initialisation */
-    CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ);
-
-    /* Get tick */
-    tickstart = HAL_GetTick();   
-   
-    /* Wait the acknowledge */
-    while(HAL_IS_BIT_SET(hcan->Instance->MSR, CAN_MSR_INAK))
-    {
-      if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE)
-      {
-         hcan->State= HAL_CAN_STATE_TIMEOUT;
-
-       /* Process unlocked */
-       __HAL_UNLOCK(hcan);
-
-       return HAL_TIMEOUT;
-      }
-    }
-
-    /* Check acknowledged */
-    if(HAL_IS_BIT_CLR(hcan->Instance->MSR, CAN_MSR_INAK))
-    {
-      status = CAN_INITSTATUS_SUCCESS;
-    }
-  }
- 
-  if(status == CAN_INITSTATUS_SUCCESS)
-  {
-    /* Set CAN error code to none */
-    hcan->ErrorCode = HAL_CAN_ERROR_NONE;
-    
-    /* Initialize the CAN state */
-    hcan->State = HAL_CAN_STATE_READY;
-  
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Initialize the CAN state */
-    hcan->State = HAL_CAN_STATE_ERROR;
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Configures the CAN reception filter according to the specified
-  *         parameters in the CAN_FilterInitStruct.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @param  sFilterConfig pointer to a CAN_FilterConfTypeDef structure that
-  *         contains the filter configuration information.
-  * @retval None
-  */
-HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig)
-{
-  uint32_t filternbrbitpos = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber));
-  assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
-  assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
-  assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
-  assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation));
-  assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber));
-  
-  filternbrbitpos = (1U) << sFilterConfig->FilterNumber;
-
-  /* Initialisation mode for the filter */
-  /* Select the start slave bank */
-  MODIFY_REG(hcan->Instance->FMR                         ,
-             CAN_FMR_CAN2SB                              ,
-             CAN_FMR_FINIT                              |
-             (uint32_t)(sFilterConfig->BankNumber << 8U)   );  /* Filter Deactivation */
-  CLEAR_BIT(hcan->Instance->FA1R, filternbrbitpos);
-
-  /* Filter Scale */
-  if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
-  {
-    /* 16-bit scale for the filter */
-    CLEAR_BIT(hcan->Instance->FS1R, filternbrbitpos);
-
-    /* First 16-bit identifier and First 16-bit mask */
-    /* Or First 16-bit identifier and Second 16-bit identifier */
-    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR1 = 
-       ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) |
-        (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
-
-    /* Second 16-bit identifier and Second 16-bit mask */
-    /* Or Third 16-bit identifier and Fourth 16-bit identifier */
-    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR2 = 
-       ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
-        (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh);
-  }
-
-  if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
-  {
-    /* 32-bit scale for the filter */
-    SET_BIT(hcan->Instance->FS1R, filternbrbitpos);
-
-    /* 32-bit identifier or First 32-bit identifier */
-    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR1 = 
-       ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) |
-        (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow);
-
-    /* 32-bit mask or Second 32-bit identifier */
-    hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR2 = 
-       ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |
-        (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow);
-  }
-
-  /* Filter Mode */
-  if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
-  {
-    /*Id/Mask mode for the filter*/
-    CLEAR_BIT(hcan->Instance->FM1R, filternbrbitpos);
-  }
-  else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
-  {
-    /*Identifier list mode for the filter*/
-    SET_BIT(hcan->Instance->FM1R, filternbrbitpos);
-  }
-
-  /* Filter FIFO assignment */
-  if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
-  {
-    /* FIFO 0 assignation for the filter */
-    CLEAR_BIT(hcan->Instance->FFA1R, filternbrbitpos);
-  }
-  else
-  {
-    /* FIFO 1 assignation for the filter */
-    SET_BIT(hcan->Instance->FFA1R, filternbrbitpos);
-  }
-  
-  /* Filter activation */
-  if (sFilterConfig->FilterActivation == ENABLE)
-  {
-    SET_BIT(hcan->Instance->FA1R, filternbrbitpos);
-  }
-
-  /* Leave the initialisation mode for the filter */
-  CLEAR_BIT(hcan->Instance->FMR, ((uint32_t)CAN_FMR_FINIT));
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deinitializes the CANx peripheral registers to their default reset values. 
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
-{
-  /* Check CAN handle */
-  if(hcan == NULL)
-  {
-     return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
-  
-  /* Change CAN state */
-  hcan->State = HAL_CAN_STATE_BUSY;
-  
-  /* DeInit the low level hardware */
-  HAL_CAN_MspDeInit(hcan);
-  
-  /* Change CAN state */
-  hcan->State = HAL_CAN_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hcan);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the CAN MSP.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @retval None
-  */
-__weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcan);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_CAN_MspInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  DeInitializes the CAN MSP.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @retval None
-  */
-__weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcan);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_CAN_MspDeInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CAN_Exported_Functions_Group2 Input and Output operation functions
- *  @brief    IO operation functions 
- *
-@verbatim   
-  ==============================================================================
-                      ##### IO operation functions #####
-  ==============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Transmit a CAN frame message.
-      (+) Receive a CAN frame message.
-      (+) Enter CAN peripheral in sleep mode. 
-      (+) Wake up the CAN peripheral from sleep mode.
-               
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initiates and transmits a CAN frame message.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @param  Timeout Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout)
-{
-  uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
-  assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
-  assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
-
-  if(((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) || \
-     ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) || \
-     ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2))
-  {
-    /* Process locked */
-    __HAL_LOCK(hcan);
-
-    /* Change CAN state */
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_RX0):
-          hcan->State = HAL_CAN_STATE_BUSY_TX_RX0;
-          break;
-      case(HAL_CAN_STATE_BUSY_RX1):
-          hcan->State = HAL_CAN_STATE_BUSY_TX_RX1;
-          break;
-      case(HAL_CAN_STATE_BUSY_RX0_RX1):
-          hcan->State = HAL_CAN_STATE_BUSY_TX_RX0_RX1;
-          break;
-      default: /* HAL_CAN_STATE_READY */
-          hcan->State = HAL_CAN_STATE_BUSY_TX;
-          break;
-    }
-
-    /* Select one empty transmit mailbox */
-    if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME0))
-    {
-      transmitmailbox = CAN_TXMAILBOX_0;
-    }
-    else if (HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME1))
-    {
-      transmitmailbox = CAN_TXMAILBOX_1;
-    }
-    else
-    {
-      transmitmailbox = CAN_TXMAILBOX_2;
-    }
-
-    /* Set up the Id */
-    hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
-    if (hcan->pTxMsg->IDE == CAN_ID_STD)
-    {
-      assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));  
-      hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << CAN_TI0R_STID_Pos) | \
-                                                           hcan->pTxMsg->RTR);
-    }
-    else
-    {
-      assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
-      hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << CAN_TI0R_EXID_Pos) | \
-                                                           hcan->pTxMsg->IDE | \
-                                                           hcan->pTxMsg->RTR);
-    }
-    
-    /* Set up the DLC */
-    hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU;
-    hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= 0xFFFFFFF0U;
-    hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
-
-    /* Set up the data field */
-    WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, ((uint32_t)hcan->pTxMsg->Data[3] << CAN_TDL0R_DATA3_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[2] << CAN_TDL0R_DATA2_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[1] << CAN_TDL0R_DATA1_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[0] << CAN_TDL0R_DATA0_Pos));
-    WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, ((uint32_t)hcan->pTxMsg->Data[7] << CAN_TDL0R_DATA3_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[6] << CAN_TDL0R_DATA2_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[5] << CAN_TDL0R_DATA1_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[4] << CAN_TDL0R_DATA0_Pos));
-
-    /* Request transmission */
-    SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ);
-  
-    /* Get tick */
-    tickstart = HAL_GetTick();   
-  
-    /* Check End of transmission flag */
-    while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox)))
-    {
-      /* Check for the Timeout */
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
-        {
-          hcan->State = HAL_CAN_STATE_TIMEOUT;
-
-          /* Cancel transmission */
-          __HAL_CAN_CANCEL_TRANSMIT(hcan, transmitmailbox);
-
-          /* Process unlocked */
-          __HAL_UNLOCK(hcan);
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Change CAN state */
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX_RX0):
-          hcan->State = HAL_CAN_STATE_BUSY_RX0;
-          break;
-      case(HAL_CAN_STATE_BUSY_TX_RX1):
-          hcan->State = HAL_CAN_STATE_BUSY_RX1;
-          break;
-      case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):
-          hcan->State = HAL_CAN_STATE_BUSY_RX0_RX1;
-          break;
-      default: /* HAL_CAN_STATE_BUSY_TX */
-          hcan->State = HAL_CAN_STATE_READY;
-          break;
-    }
-
-    /* Process unlocked */
-    __HAL_UNLOCK(hcan);
-    
-    /* Return function status */
-    return HAL_OK;
-  }
-  else
-  {
-    /* Change CAN state */
-    hcan->State = HAL_CAN_STATE_ERROR; 
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Initiates and transmits a CAN frame message.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
-{
-  uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
-
-  /* Check the parameters */
-  assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
-  assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
-  assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
-
-  if(((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) || \
-     ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) || \
-     ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2))
-  {
-    /* Process Locked */
-    __HAL_LOCK(hcan);
-    
-    /* Select one empty transmit mailbox */
-    if(HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME0))
-    {
-      transmitmailbox = CAN_TXMAILBOX_0;
-    }
-    else if(HAL_IS_BIT_SET(hcan->Instance->TSR, CAN_TSR_TME1))
-    {
-      transmitmailbox = CAN_TXMAILBOX_1;
-    }
-    else
-    {
-      transmitmailbox = CAN_TXMAILBOX_2;
-    }
-
-    /* Set up the Id */
-    hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
-    if(hcan->pTxMsg->IDE == CAN_ID_STD)
-    {
-      assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
-      hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << CAN_TI0R_STID_Pos) | \
-                                                           hcan->pTxMsg->RTR);
-    }
-    else
-    {
-      assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
-      hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << CAN_TI0R_EXID_Pos) | \
-                                                           hcan->pTxMsg->IDE |                         \
-                                                           hcan->pTxMsg->RTR);
-    }
-
-    /* Set up the DLC */
-    hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU;
-    hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= 0xFFFFFFF0U;
-    hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
-
-    /* Set up the data field */
-    WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, ((uint32_t)hcan->pTxMsg->Data[3] << CAN_TDL0R_DATA3_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[2] << CAN_TDL0R_DATA2_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[1] << CAN_TDL0R_DATA1_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[0] << CAN_TDL0R_DATA0_Pos));
-    WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, ((uint32_t)hcan->pTxMsg->Data[7] << CAN_TDL0R_DATA3_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[6] << CAN_TDL0R_DATA2_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[5] << CAN_TDL0R_DATA1_Pos) |
-                                                                ((uint32_t)hcan->pTxMsg->Data[4] << CAN_TDL0R_DATA0_Pos));
-
-    /* Change CAN state */
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_RX0):
-          hcan->State = HAL_CAN_STATE_BUSY_TX_RX0;
-          break;
-      case(HAL_CAN_STATE_BUSY_RX1):
-          hcan->State = HAL_CAN_STATE_BUSY_TX_RX1;
-          break;
-      case(HAL_CAN_STATE_BUSY_RX0_RX1):
-          hcan->State = HAL_CAN_STATE_BUSY_TX_RX0_RX1;
-          break;
-      default: /* HAL_CAN_STATE_READY */
-          hcan->State = HAL_CAN_STATE_BUSY_TX;
-          break;
-    }
-
-    /* Set CAN error code to none */
-    hcan->ErrorCode = HAL_CAN_ERROR_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcan);
-
-    /* Request transmission */
-    hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
-
-    /* Enable interrupts: */
-    /*  - Enable Error warning Interrupt */
-    /*  - Enable Error passive Interrupt */
-    /*  - Enable Bus-off Interrupt */
-    /*  - Enable Last error code Interrupt */
-    /*  - Enable Error Interrupt */
-    /*  - Enable Transmit mailbox empty Interrupt */
-    __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG |
-                              CAN_IT_EPV |
-                              CAN_IT_BOF |
-                              CAN_IT_LEC |
-                              CAN_IT_ERR |
-                              CAN_IT_TME  );
-  }
-  else
-  {
-    /* Change CAN state */
-    hcan->State = HAL_CAN_STATE_ERROR;
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Receives a correct CAN frame.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @param  FIFONumber    FIFO number.
-  * @param  Timeout       Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-  CanRxMsgTypeDef* pRxMsg = NULL;
-
-  /* Check the parameters */
-  assert_param(IS_CAN_FIFO(FIFONumber));
-
-  /* Process locked */
-  __HAL_LOCK(hcan);
-
-  /* Check if CAN state is not busy for RX FIFO0 */
-  if ((FIFONumber == CAN_FIFO0) && ((hcan->State == HAL_CAN_STATE_BUSY_RX0) ||         \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX0) ||      \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_RX0_RX1) ||     \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX0_RX1)))
-  {
-    /* Process unlocked */
-    __HAL_UNLOCK(hcan);
-
-    return HAL_BUSY;
-  }
-
-  /* Check if CAN state is not busy for RX FIFO1 */
-  if ((FIFONumber == CAN_FIFO1) && ((hcan->State == HAL_CAN_STATE_BUSY_RX1) ||         \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX1) ||      \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_RX0_RX1) ||     \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX0_RX1)))
-  {
-    /* Process unlocked */
-    __HAL_UNLOCK(hcan);
-
-    return HAL_BUSY;
-  }
-
-  /* Change CAN state */
-  if (FIFONumber == CAN_FIFO0)
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_RX0_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0_RX1;
-        break;
-      default: /* HAL_CAN_STATE_READY */
-        hcan->State = HAL_CAN_STATE_BUSY_RX0;
-        break;
-    }
-  }
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX0):
-        hcan->State = HAL_CAN_STATE_BUSY_RX0_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX0):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0_RX1;
-        break;
-      default: /* HAL_CAN_STATE_READY */
-        hcan->State = HAL_CAN_STATE_BUSY_RX1;
-        break;
-    }
-  }
-
-  /* Get tick */
-  tickstart = HAL_GetTick();   
-  
-  /* Check pending message */
-  while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0U)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
-      {
-        hcan->State = HAL_CAN_STATE_TIMEOUT;
-
-        /* Process unlocked */
-        __HAL_UNLOCK(hcan);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Set RxMsg pointer */
-  if(FIFONumber == CAN_FIFO0)
-  {
-    pRxMsg = hcan->pRxMsg;
-  }
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    pRxMsg = hcan->pRx1Msg;
-  }
-
-  /* Get the Id */
-  pRxMsg->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
-  if (pRxMsg->IDE == CAN_ID_STD)
-  {
-    pRxMsg->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[FIFONumber].RIR) >> CAN_TI0R_STID_Pos;
-  }
-  else
-  {
-    pRxMsg->ExtId = (0xFFFFFFF8U & hcan->Instance->sFIFOMailBox[FIFONumber].RIR) >> CAN_RI0R_EXID_Pos;
-  }
-  pRxMsg->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[FIFONumber].RIR) >> CAN_RI0R_RTR_Pos;
-  /* Get the DLC */
-  pRxMsg->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR) >> CAN_RDT0R_DLC_Pos;
-  /* Get the FMI */
-  pRxMsg->FMI = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR) >> CAN_RDT0R_FMI_Pos;
-  /* Get the FIFONumber */
-  pRxMsg->FIFONumber = FIFONumber;
-  /* Get the data field */
-  pRxMsg->Data[0] = (CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA0_Pos;
-  pRxMsg->Data[1] = (CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA1_Pos;
-  pRxMsg->Data[2] = (CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA2_Pos;
-  pRxMsg->Data[3] = (CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA3_Pos;
-  pRxMsg->Data[4] = (CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA4_Pos;
-  pRxMsg->Data[5] = (CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA5_Pos;
-  pRxMsg->Data[6] = (CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA6_Pos;
-  pRxMsg->Data[7] = (CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA7_Pos;
-  
-  /* Release the FIFO */
-  if(FIFONumber == CAN_FIFO0)
-  {
-    /* Release FIFO0 */
-    __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
-  }
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    /* Release FIFO1 */
-    __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
-  }
-
-  /* Change CAN state */
-  if (FIFONumber == CAN_FIFO0)
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX_RX0):
-        hcan->State = HAL_CAN_STATE_BUSY_TX;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX1;
-        break;
-      default: /* HAL_CAN_STATE_BUSY_RX0 */
-        hcan->State = HAL_CAN_STATE_READY;
-        break;
-    }
-  }
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_RX0;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0;
-        break;
-      default: /* HAL_CAN_STATE_BUSY_RX1 */
-        hcan->State = HAL_CAN_STATE_READY;
-        break;
-    }
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hcan);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Receives a correct CAN frame.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @param  FIFONumber    FIFO number.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
-{
-  /* Check the parameters */
-  assert_param(IS_CAN_FIFO(FIFONumber));
-
-  /* Process locked */
-  __HAL_LOCK(hcan);
-
-  /* Check if CAN state is not busy for RX FIFO0 */
-  if ((FIFONumber == CAN_FIFO0) && ((hcan->State == HAL_CAN_STATE_BUSY_RX0) ||        \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX0) ||      \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_RX0_RX1) ||     \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX0_RX1)))
-  {
-    /* Process unlocked */
-    __HAL_UNLOCK(hcan);
-
-    return HAL_BUSY;
-  }
-
-  /* Check if CAN state is not busy for RX FIFO1 */
-  if ((FIFONumber == CAN_FIFO1) && ((hcan->State == HAL_CAN_STATE_BUSY_RX1) ||        \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX1) ||      \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_RX0_RX1) ||     \
-                                    (hcan->State == HAL_CAN_STATE_BUSY_TX_RX0_RX1)))
-  {
-    /* Process unlocked */
-    __HAL_UNLOCK(hcan);
-
-    return HAL_BUSY;
-  }
-
-  /* Change CAN state */
-  if (FIFONumber == CAN_FIFO0)
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_RX0_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0_RX1;
-        break;
-      default: /* HAL_CAN_STATE_READY */
-        hcan->State = HAL_CAN_STATE_BUSY_RX0;
-        break;
-    }
-  }
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX0):
-        hcan->State = HAL_CAN_STATE_BUSY_RX0_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX0):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0_RX1;
-        break;
-      default: /* HAL_CAN_STATE_READY */
-        hcan->State = HAL_CAN_STATE_BUSY_RX1;
-        break;
-    }
-  }
-
-  /* Set CAN error code to none */
-  hcan->ErrorCode = HAL_CAN_ERROR_NONE;
-
-  /* Enable interrupts: */
-  /*  - Enable Error warning Interrupt */
-  /*  - Enable Error passive Interrupt */
-  /*  - Enable Bus-off Interrupt */
-  /*  - Enable Last error code Interrupt */
-  /*  - Enable Error Interrupt */
-  __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG |
-                            CAN_IT_EPV |
-                            CAN_IT_BOF |
-                            CAN_IT_LEC |
-                            CAN_IT_ERR);
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hcan);
-
-  if(FIFONumber == CAN_FIFO0)
-  {
-    /* Enable FIFO 0 overrun and message pending Interrupt */
-    __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FOV0 | CAN_IT_FMP0);
-  }
-  else
-  {
-    /* Enable FIFO 1 overrun and message pending Interrupt */
-    __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FOV1 | CAN_IT_FMP1);
-  }
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enters the Sleep (low power) mode.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef* hcan)
-{
-  uint32_t tickstart = 0U;
-   
-  /* Process locked */
-  __HAL_LOCK(hcan);
-  
-  /* Change CAN state */
-  hcan->State = HAL_CAN_STATE_BUSY; 
-    
-  /* Request Sleep mode */
-  MODIFY_REG(hcan->Instance->MCR,
-             CAN_MCR_INRQ       ,
-             CAN_MCR_SLEEP       );
-   
-  /* Sleep mode status */
-  if (HAL_IS_BIT_CLR(hcan->Instance->MSR, CAN_MSR_SLAK) ||
-      HAL_IS_BIT_SET(hcan->Instance->MSR, CAN_MSR_INAK)   )
-  {
-    /* Process unlocked */
-    __HAL_UNLOCK(hcan);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Get tick */
-  tickstart = HAL_GetTick();   
-  
-  /* Wait the acknowledge */
-  while (HAL_IS_BIT_CLR(hcan->Instance->MSR, CAN_MSR_SLAK) ||
-         HAL_IS_BIT_SET(hcan->Instance->MSR, CAN_MSR_INAK)   )
-  {
-    if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
-    {
-      hcan->State = HAL_CAN_STATE_TIMEOUT;
-      /* Process unlocked */
-      __HAL_UNLOCK(hcan);
-      return HAL_TIMEOUT;
-    }
-  }
-  
-  /* Change CAN state */
-  hcan->State = HAL_CAN_STATE_READY;
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hcan);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Wakes up the CAN peripheral from sleep mode, after that the CAN peripheral
-  *         is in the normal mode.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef* hcan)
-{
-  uint32_t tickstart = 0U;
-    
-  /* Process locked */
-  __HAL_LOCK(hcan);
-  
-  /* Change CAN state */
-  hcan->State = HAL_CAN_STATE_BUSY;  
- 
-  /* Wake up request */
-  CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
-    
-  /* Get tick */
-  tickstart = HAL_GetTick();   
-  
-  /* Sleep mode status */
-  while(HAL_IS_BIT_SET(hcan->Instance->MSR, CAN_MSR_SLAK))
-  {
-    if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
-    {
-      hcan->State= HAL_CAN_STATE_TIMEOUT;
-
-      /* Process unlocked */
-      __HAL_UNLOCK(hcan);
-
-      return HAL_TIMEOUT;
-    }
-  }
-
-  if(HAL_IS_BIT_SET(hcan->Instance->MSR, CAN_MSR_SLAK))
-  {
-    /* Process unlocked */
-    __HAL_UNLOCK(hcan);
-
-    /* Return function status */
-    return HAL_ERROR;
-  }
-  
-  /* Change CAN state */
-  hcan->State = HAL_CAN_STATE_READY; 
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hcan);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handles CAN interrupt request  
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval None
-  */
-void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan)
-{
-  uint32_t errorcode = HAL_CAN_ERROR_NONE;
-
-  /* Check Overrun flag for FIFO0 */
-  if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV0))    &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV0)))
-  {
-    /* Set CAN error code to FOV0 error */
-    errorcode |= HAL_CAN_ERROR_FOV0;
-
-    /* Clear FIFO0 Overrun Flag */
-    __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0);
-  }
-
-  /* Check Overrun flag for FIFO1 */
-  if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_FOV1))    &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FOV1)))
-  {
-    /* Set CAN error code to FOV1 error */
-    errorcode |= HAL_CAN_ERROR_FOV1;
-
-    /* Clear FIFO1 Overrun Flag */
-    __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1);
-  }
-
-  /* Check End of transmission flag */
-  if(__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_TME))
-  {
-    /* Check Transmit request completion status */
-    if((__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0)) ||
-       (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1)) ||
-       (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2)))
-    {
-      /* Check Transmit success */
-      if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK0)) ||
-         (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK1)) ||
-         (__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_TXOK2)))
-      {
-        /* Call transmit function */
-        CAN_Transmit_IT(hcan);
-      }
-      else /* Transmit failure */
-      {
-        /* Set CAN error code to TXFAIL error */
-        errorcode |= HAL_CAN_ERROR_TXFAIL;
-      }
-
-      /* Clear transmission status flags (RQCPx and TXOKx) */
-      SET_BIT(hcan->Instance->TSR, CAN_TSR_RQCP0  | CAN_TSR_RQCP1  | CAN_TSR_RQCP2 | \
-                                   CAN_FLAG_TXOK0 | CAN_FLAG_TXOK1 | CAN_FLAG_TXOK2);
-    }
-  }
-  
-  /* Check End of reception flag for FIFO0 */
-  if((__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0)) &&
-     (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0) != 0U))
-  {
-    /* Call receive function */
-    CAN_Receive_IT(hcan, CAN_FIFO0);
-  }
-  
-  /* Check End of reception flag for FIFO1 */
-  if((__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1)) &&
-     (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1) != 0U))
-  {
-    /* Call receive function */
-    CAN_Receive_IT(hcan, CAN_FIFO1);
-  }
-  
-  /* Set error code in handle */
-  hcan->ErrorCode |= errorcode;
-
-  /* Check Error Warning Flag */
-  if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EWG))    &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EWG)) &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR)))
-  {
-    /* Set CAN error code to EWG error */
-    hcan->ErrorCode |= HAL_CAN_ERROR_EWG;
-    /* No need for clear of Error Warning Flag as read-only */
-  }
-  
-  /* Check Error Passive Flag */
-  if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EPV))    &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EPV)) &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR)))
-  {
-    /* Set CAN error code to EPV error */
-    hcan->ErrorCode |= HAL_CAN_ERROR_EPV;
-    /* No need for clear of Error Passive Flag as read-only */ 
-  }
-  
-  /* Check Bus-Off Flag */
-  if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_BOF))    &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_BOF)) &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR)))
-  {
-    /* Set CAN error code to BOF error */
-    hcan->ErrorCode |= HAL_CAN_ERROR_BOF;
-    /* No need for clear of Bus-Off Flag as read-only */
-  }
-  
-  /* Check Last error code Flag */
-  if((!HAL_IS_BIT_CLR(hcan->Instance->ESR, CAN_ESR_LEC)) &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_LEC))         &&
-     (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR)))
-  {
-    switch(hcan->Instance->ESR & CAN_ESR_LEC)
-    {
-      case(CAN_ESR_LEC_0):
-          /* Set CAN error code to STF error */
-          hcan->ErrorCode |= HAL_CAN_ERROR_STF;
-          break;
-      case(CAN_ESR_LEC_1):
-          /* Set CAN error code to FOR error */
-          hcan->ErrorCode |= HAL_CAN_ERROR_FOR;
-          break;
-      case(CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
-          /* Set CAN error code to ACK error */
-          hcan->ErrorCode |= HAL_CAN_ERROR_ACK;
-          break;
-      case(CAN_ESR_LEC_2):
-          /* Set CAN error code to BR error */
-          hcan->ErrorCode |= HAL_CAN_ERROR_BR;
-          break;
-      case(CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
-          /* Set CAN error code to BD error */
-          hcan->ErrorCode |= HAL_CAN_ERROR_BD;
-          break;
-      case(CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
-          /* Set CAN error code to CRC error */
-          hcan->ErrorCode |= HAL_CAN_ERROR_CRC;
-          break;
-      default:
-          break;
-    }
-
-    /* Clear Last error code Flag */ 
-    CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC);
-  }
-
-  /* Call the Error call Back in case of Errors */
-  if(hcan->ErrorCode != HAL_CAN_ERROR_NONE)
-  {
-    /* Clear ERRI Flag */ 
-    SET_BIT(hcan->Instance->MSR, CAN_MSR_ERRI);
-
-    /* Set the CAN state ready to be able to start again the process */
-    hcan->State = HAL_CAN_STATE_READY;
-
-    /* Disable interrupts: */
-    /*  - Disable Error warning Interrupt */
-    /*  - Disable Error passive Interrupt */
-    /*  - Disable Bus-off Interrupt */
-    /*  - Disable Last error code Interrupt */
-    /*  - Disable Error Interrupt */
-    /*  - Disable FIFO 0 message pending Interrupt */
-    /*  - Disable FIFO 0 Overrun Interrupt */
-    /*  - Disable FIFO 1 message pending Interrupt */
-    /*  - Disable FIFO 1 Overrun Interrupt */
-    /*  - Disable Transmit mailbox empty Interrupt */
-    __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG |
-                               CAN_IT_EPV |
-                               CAN_IT_BOF |
-                               CAN_IT_LEC |
-                               CAN_IT_ERR |
-                               CAN_IT_FMP0|
-                               CAN_IT_FOV0|
-                               CAN_IT_FMP1|
-                               CAN_IT_FOV1|
-                               CAN_IT_TME  );
-
-    /* Call Error callback function */
-    HAL_CAN_ErrorCallback(hcan);
-  }  
-}
-
-/**
-  * @brief  Transmission  complete callback in non blocking mode 
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval None
-  */
-__weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcan);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_CAN_TxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Transmission  complete callback in non blocking mode 
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval None
-  */
-__weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcan);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_CAN_RxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Error CAN callback.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval None
-  */
-__weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcan);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_CAN_ErrorCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
- *  @brief   CAN Peripheral State functions 
- *
-@verbatim   
-  ==============================================================================
-            ##### Peripheral State and Error functions #####
-  ==============================================================================
-    [..]
-    This subsection provides functions allowing to :
-      (+) Check the CAN state.
-      (+) Check CAN Errors detected during interrupt process
-         
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  return the CAN state
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval HAL state
-  */
-HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan)
-{
-  /* Return CAN state */
-  return hcan->State;
-}
-
-/**
-  * @brief  Return the CAN error code
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.
-  * @retval CAN Error Code
-  */
-uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan)
-{
-  return hcan->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/** @addtogroup CAN_Private_Functions CAN Private Functions
- *  @brief    CAN Frame message Rx/Tx functions 
- *
- * @{
- */
-
-/**
-  * @brief  Initiates and transmits a CAN frame message.
-  * @param  hcan pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
-{
-  /* Disable Transmit mailbox empty Interrupt */
-  __HAL_CAN_DISABLE_IT(hcan, CAN_IT_TME);
-  
-  if(hcan->State == HAL_CAN_STATE_BUSY_TX)
-  {   
-    /* Disable interrupts: */
-    /*  - Disable Error warning Interrupt */
-    /*  - Disable Error passive Interrupt */
-    /*  - Disable Bus-off Interrupt */
-    /*  - Disable Last error code Interrupt */
-    /*  - Disable Error Interrupt */
-    __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG |
-                               CAN_IT_EPV |
-                               CAN_IT_BOF |
-                               CAN_IT_LEC |
-                               CAN_IT_ERR );
-  }
-
-  /* Change CAN state */
-  switch(hcan->State)
-  {
-    case(HAL_CAN_STATE_BUSY_TX_RX0):
-      hcan->State = HAL_CAN_STATE_BUSY_RX0;
-      break;
-    case(HAL_CAN_STATE_BUSY_TX_RX1):
-      hcan->State = HAL_CAN_STATE_BUSY_RX1;
-      break;
-    case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):
-      hcan->State = HAL_CAN_STATE_BUSY_RX0_RX1;
-      break;
-    default: /* HAL_CAN_STATE_BUSY_TX */
-      hcan->State = HAL_CAN_STATE_READY;
-      break;
-  }
-
-  /* Transmission complete callback */ 
-  HAL_CAN_TxCpltCallback(hcan);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Receives a correct CAN frame.
-  * @param  hcan       Pointer to a CAN_HandleTypeDef structure that contains
-  *         the configuration information for the specified CAN.  
-  * @param  FIFONumber Specify the FIFO number    
-  * @retval HAL status
-  * @retval None
-  */
-static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
-{
-  CanRxMsgTypeDef* pRxMsg = NULL;
-
-  /* Set RxMsg pointer */
-  if(FIFONumber == CAN_FIFO0)
-  {
-    pRxMsg = hcan->pRxMsg;
-  }
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    pRxMsg = hcan->pRx1Msg;
-  }
-
-  /* Get the Id */
-  pRxMsg->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
-  if (pRxMsg->IDE == CAN_ID_STD)
-  {
-    pRxMsg->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[FIFONumber].RIR) >> CAN_TI0R_STID_Pos;
-  }
-  else
-  {
-    pRxMsg->ExtId = (0xFFFFFFF8U & hcan->Instance->sFIFOMailBox[FIFONumber].RIR) >> CAN_RI0R_EXID_Pos;
-  }
-  pRxMsg->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[FIFONumber].RIR) >> CAN_RI0R_RTR_Pos;
-  /* Get the DLC */
-  pRxMsg->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR) >> CAN_RDT0R_DLC_Pos;
-  /* Get the FMI */
-  pRxMsg->FMI = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR) >> CAN_RDT0R_FMI_Pos;
-  /* Get the FIFONumber */
-  pRxMsg->FIFONumber = FIFONumber;
-  /* Get the data field */
-  pRxMsg->Data[0] = (CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA0_Pos;
-  pRxMsg->Data[1] = (CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA1_Pos;
-  pRxMsg->Data[2] = (CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA2_Pos;
-  pRxMsg->Data[3] = (CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR) >> CAN_RDL0R_DATA3_Pos;
-  pRxMsg->Data[4] = (CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA4_Pos;
-  pRxMsg->Data[5] = (CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA5_Pos;
-  pRxMsg->Data[6] = (CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA6_Pos;
-  pRxMsg->Data[7] = (CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR) >> CAN_RDH0R_DATA7_Pos;
-
-  /* Release the FIFO */
-  /* Release FIFO0 */
-  if (FIFONumber == CAN_FIFO0)
-  {
-    __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
-    
-    /* Disable FIFO 0 overrun and message pending Interrupt */
-    __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FOV0 | CAN_IT_FMP0);
-  }
-  /* Release FIFO1 */
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
-    
-    /* Disable FIFO 1 overrun and message pending Interrupt */
-    __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FOV1 | CAN_IT_FMP1);
-  }
-  
-  if((hcan->State == HAL_CAN_STATE_BUSY_RX0) || (hcan->State == HAL_CAN_STATE_BUSY_RX1))
-  {   
-    /* Disable interrupts: */
-    /*  - Disable Error warning Interrupt */
-    /*  - Disable Error passive Interrupt */
-    /*  - Disable Bus-off Interrupt */
-    /*  - Disable Last error code Interrupt */
-    /*  - Disable Error Interrupt */
-    __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG |
-                               CAN_IT_EPV |
-                               CAN_IT_BOF |
-                               CAN_IT_LEC |
-                               CAN_IT_ERR );
-  }
-
-  /* Change CAN state */
-  if (FIFONumber == CAN_FIFO0)
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX_RX0):
-        hcan->State = HAL_CAN_STATE_BUSY_TX;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_RX1;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX1;
-        break;
-      default: /* HAL_CAN_STATE_BUSY_RX0 */
-        hcan->State = HAL_CAN_STATE_READY;
-        break;
-    }
-  }
-  else /* FIFONumber == CAN_FIFO1 */
-  {
-    switch(hcan->State)
-    {
-      case(HAL_CAN_STATE_BUSY_TX_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX;
-        break;
-      case(HAL_CAN_STATE_BUSY_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_RX0;
-        break;
-      case(HAL_CAN_STATE_BUSY_TX_RX0_RX1):
-        hcan->State = HAL_CAN_STATE_BUSY_TX_RX0;
-        break;
-      default: /* HAL_CAN_STATE_BUSY_RX1 */
-        hcan->State = HAL_CAN_STATE_READY;
-        break;
-    }
-  }
-
-  /* Receive complete callback */ 
-  HAL_CAN_RxCpltCallback(hcan);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
- 
-#endif /* defined(STM32F072xB) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F091xC) || defined(STM32F098xx) */
-
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_cec.c b/lib/hal-stm32f0/source/stm32f0xx_hal_cec.c
deleted file mode 100644
index 3c93dc5a..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_cec.c
+++ /dev/null
@@ -1,676 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_cec.c
-  * @author  MCD Application Team
-  * @brief   CEC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the High Definition Multimedia Interface 
-  *          Consumer Electronics Control Peripheral (CEC).
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *
-  *           
-  @verbatim       
- ===============================================================================
-                        ##### How to use this driver #####
- ===============================================================================
-    [..]
-    The CEC HAL driver can be used as follow:
-    
-    (#) Declare a CEC_HandleTypeDef handle structure.
-    (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
-        (##) Enable the CEC interface clock.
-        (##) CEC pins configuration:
-            (+) Enable the clock for the CEC GPIOs.
-            (+) Configure these CEC pins as alternate function pull-up.
-        (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
-             and HAL_CEC_Receive_IT() APIs):
-            (+) Configure the CEC interrupt priority.
-            (+) Enable the NVIC CEC IRQ handle.
-            (@) The specific CEC interrupts (Transmission complete interrupt, 
-                RXNE interrupt and Error Interrupts) will be managed using the macros
-                __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit 
-                and receive process.
-
-    (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
-        in case of Bit Rising Error, Error-Bit generation conditions, device logical
-        address and Listen mode in the hcec Init structure.
-
-    (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
-        
-    (@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-        by calling the customed HAL_CEC_MspInit() API.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#ifdef HAL_CEC_MODULE_ENABLED
-
-#if defined(STM32F042x6) || defined(STM32F048xx) ||\
-    defined(STM32F051x8) || defined(STM32F058xx) ||\
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||\
-    defined(STM32F091xC) || defined (STM32F098xx)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CEC CEC 
-  * @brief HAL CEC module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup CEC_Private_Constants CEC Private Constants
-  * @{
-  */
-/**
-  * @}
-  */
- 
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup CEC_Private_Functions CEC Private Functions
-  * @{
-  */
-/**
-  * @}
-  */
-  
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup CEC_Exported_Functions CEC Exported Functions
-  * @{
-  */
-
-/** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions 
-  *
-@verbatim                                                
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to initialize the CEC
-      (+) The following parameters need to be configured: 
-        (++) SignalFreeTime
-        (++) Tolerance 
-        (++) BRERxStop                 (RX stopped or not upon Bit Rising Error)
-        (++) BREErrorBitGen            (Error-Bit generation in case of Bit Rising Error)
-        (++) LBPEErrorBitGen           (Error-Bit generation in case of Long Bit Period Error)
-        (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
-        (++) SignalFreeTimeOption      (SFT Timer start definition)
-        (++) OwnAddress                (CEC device address)
-        (++) ListenMode
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Initializes the CEC mode according to the specified
-  *         parameters in the CEC_InitTypeDef and creates the associated handle .
-  * @param hcec CEC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
-{  
-  /* Check the CEC handle allocation */
-  if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */ 
-  assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
-  assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
-  assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));  
-  assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
-  assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
-  assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
-  assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
-  assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption)); 
-  assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
-  assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));  
-
-  if(hcec->gState == HAL_CEC_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hcec->Lock = HAL_UNLOCKED;
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_CEC_MspInit(hcec);
-  }
-  hcec->gState = HAL_CEC_STATE_BUSY;
-  
-  /* Disable the Peripheral */
-  __HAL_CEC_DISABLE(hcec);
-  
-  /* Write to CEC Control Register */
-  hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
-                         hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
-			 hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
-                         hcec->Init.ListenMode;
-  
-  /* Enable the following CEC Transmission/Reception interrupts as
-   * well as the following CEC Transmission/Reception Errors interrupts 
-   * Rx Byte Received IT 
-   * End of Reception IT 
-   * Rx overrun
-   * Rx bit rising error
-   * Rx short bit period error
-   * Rx long bit period error
-   * Rx missing acknowledge
-   * Tx Byte Request IT 
-   * End of Transmission IT
-   * Tx Missing Acknowledge IT
-   * Tx-Error IT
-   * Tx-Buffer Underrun IT 
-   * Tx arbitration lost   */
- __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
-    
-  /* Enable the CEC Peripheral */
-  __HAL_CEC_ENABLE(hcec);
-  
-  hcec->ErrorCode = HAL_CEC_ERROR_NONE;
-  hcec->gState = HAL_CEC_STATE_READY;
-  hcec->RxState = HAL_CEC_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief DeInitializes the CEC peripheral 
-  * @param hcec CEC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
-{
-  /* Check the CEC handle allocation */
-  if(hcec == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
-
-  hcec->gState = HAL_CEC_STATE_BUSY;
-  
-  /* DeInit the low level hardware */
-  HAL_CEC_MspDeInit(hcec);
-  /* Disable the Peripheral */
-  __HAL_CEC_DISABLE(hcec);
-  
-  /* Clear Flags */
-  __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
-  
-  /* Disable the following CEC Transmission/Reception interrupts as
-   * well as the following CEC Transmission/Reception Errors interrupts 
-   * Rx Byte Received IT 
-   * End of Reception IT 
-   * Rx overrun
-   * Rx bit rising error
-   * Rx short bit period error
-   * Rx long bit period error
-   * Rx missing acknowledge
-   * Tx Byte Request IT 
-   * End of Transmission IT
-   * Tx Missing Acknowledge IT
-   * Tx-Error IT
-   * Tx-Buffer Underrun IT 
-   * Tx arbitration lost   */
-  __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
-  
-  hcec->ErrorCode = HAL_CEC_ERROR_NONE;
-  hcec->gState = HAL_CEC_STATE_RESET;
-  hcec->RxState = HAL_CEC_STATE_RESET;
-  
-  /* Process Unlock */
-  __HAL_UNLOCK(hcec);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief Initializes the Own Address of the CEC device
-  * @param hcec CEC handle
-  * @param  CEC_OwnAddress The CEC own address.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
-{
-  /* Check the parameters */
-  assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
-
-  if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
-  { 
-    /* Process Locked */
-    __HAL_LOCK(hcec); 
-    
-    hcec->gState = HAL_CEC_STATE_BUSY;
-  
-    /* Disable the Peripheral */
-    __HAL_CEC_DISABLE(hcec);
-    
-    if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
-    {
-      hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U);
-    }
-    else
-    {
-      hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
-    }
-        
-    hcec->gState = HAL_CEC_STATE_READY;
-    hcec->ErrorCode = HAL_CEC_ERROR_NONE;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcec); 
-    
-    /* Enable the Peripheral */
-    __HAL_CEC_ENABLE(hcec);
-    
-    return  HAL_OK; 
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief CEC MSP Init
-  * @param hcec CEC handle
-  * @retval None
-  */
- __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcec);
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CEC_MspInit can be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief CEC MSP DeInit
-  * @param hcec CEC handle
-  * @retval None
-  */
- __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcec);
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CEC_MspDeInit can be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions 
-  *  @brief CEC Transmit/Receive functions 
-  *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions ##### 
- ===============================================================================  
-    This subsection provides a set of functions allowing to manage the CEC data transfers.
-    
-    (#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
-        logical addresses (4-bit long addresses, 0x0F for broadcast messages destination)
-    
-    (#) The communication is performed using Interrupts. 
-           These API's return the HAL status.
-           The end of the data processing will be indicated through the 
-           dedicated CEC IRQ when using Interrupt mode.
-           The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks 
-           will be executed respectivelly at the end of the transmit or Receive process
-           The HAL_CEC_ErrorCallback()user callback will be executed when a communication 
-           error is detected
-        
-    (#) API's with Interrupt are :
-         (+) HAL_CEC_Transmit_IT()
-         (+) HAL_CEC_IRQHandler()
-
-    (#) A set of User Callbacks are provided:
-         (+) HAL_CEC_TxCpltCallback()
-         (+) HAL_CEC_RxCpltCallback()
-         (+) HAL_CEC_ErrorCallback()
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Send data in interrupt mode 
-  * @param hcec CEC handle 
-  * @param InitiatorAddress Initiator address
-  * @param DestinationAddress destination logical address      
-  * @param pData pointer to input byte data buffer
-  * @param Size amount of data to be sent in bytes (without counting the header).
-  *              0 means only the header is sent (ping operation).
-  *              Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
-  * @retval HAL status
-  */  
-HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
-{
-  /* if the IP isn't already busy and if there is no previous transmission
-     already pending due to arbitration lost */
-  if (hcec->gState == HAL_CEC_STATE_READY) 
-  {    
-    if((pData == NULL ) && (Size > 0U)) 
-    {
-      return  HAL_ERROR;                                    
-    }
-
-    assert_param(IS_CEC_ADDRESS(DestinationAddress)); 
-    assert_param(IS_CEC_ADDRESS(InitiatorAddress)); 
-    assert_param(IS_CEC_MSGSIZE(Size));
-
-    /* Process Locked */
-    __HAL_LOCK(hcec);
-    hcec->pTxBuffPtr = pData;
-    hcec->gState = HAL_CEC_STATE_BUSY_TX;
-    hcec->ErrorCode = HAL_CEC_ERROR_NONE;
-  
-    /* initialize the number of bytes to send,
-     * 0 means only one header is sent (ping operation) */
-    hcec->TxXferCount = Size;
-    
-    /* in case of no payload (Size = 0), sender is only pinging the system;
-       Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
-    if (Size == 0U)
-    {
-      __HAL_CEC_LAST_BYTE_TX_SET(hcec);
-    }
-
-    /* send header block */
-    hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
-    /* Set TX Start of Message  (TXSOM) bit */
-    __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
-	    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hcec); 
-  
-    return HAL_OK;
-
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Get size of the received frame.
-  * @param hcec CEC handle
-  * @retval Frame size
-  */
-uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
-{
-  return hcec->RxXferSize;
-}
-
-/**
-  * @brief Change Rx Buffer.
-  * @param hcec CEC handle
-  * @param Rxbuffer Rx Buffer
-  * @note  This function can be called only inside the HAL_CEC_RxCpltCallback() 
-  * @retval Frame size
-  */
-void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
-{
-  hcec->Init.RxBuffer = Rxbuffer; 
-}
-  
-/**
-  * @brief This function handles CEC interrupt requests.
-  * @param hcec CEC handle
-  * @retval None
-  */
-void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
-{
-  
-  /* save interrupts register for further error or interrupts handling purposes */
-  uint32_t reg = 0U;
-  reg = hcec->Instance->ISR;
-
-  
-  /* ----------------------------Arbitration Lost Management----------------------------------*/     
-  /* CEC TX arbitration error interrupt occurred --------------------------------------*/
-  if((reg & CEC_FLAG_ARBLST) != RESET) 
-  { 
-    hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
-    __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
-  }
-  
-  /* ----------------------------Rx Management----------------------------------*/ 
-  /* CEC RX byte received interrupt  ---------------------------------------------------*/
-  if((reg & CEC_FLAG_RXBR) != RESET) 
-  { 
-    /* reception is starting */ 
-    hcec->RxState = HAL_CEC_STATE_BUSY_RX;
-    hcec->RxXferSize++;
-    /* read received byte */
-    *hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
-    __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);  
-  }
-  
-  /* CEC RX end received interrupt  ---------------------------------------------------*/
-  if((reg & CEC_FLAG_RXEND) != RESET) 
-  { 
-    /* clear IT */
-    __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
-    
-    /* Rx process is completed, restore hcec->RxState to Ready */
-    hcec->RxState = HAL_CEC_STATE_READY; 
-    hcec->ErrorCode = HAL_CEC_ERROR_NONE;
-    hcec->Init.RxBuffer -= hcec->RxXferSize;
-    HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize); 
-    hcec->RxXferSize = 0U; 
-  }
-  
-  /* ----------------------------Tx Management----------------------------------*/  
-  /* CEC TX byte request interrupt ------------------------------------------------*/
-  if((reg & CEC_FLAG_TXBR) != RESET) 
-  {
-    if (hcec->TxXferCount == 0U)
-    {
-      /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
-      __HAL_CEC_LAST_BYTE_TX_SET(hcec);
-      hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
-    }
-    else
-    {	
-      hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
-      hcec->TxXferCount--;
-    }  
-    /* clear Tx-Byte request flag */
-    __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR); 
-  } 
-  
-  /* CEC TX end interrupt ------------------------------------------------*/
-  if((reg & CEC_FLAG_TXEND) != RESET) 
-  {	
-    __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
-    
-    /* Tx process is ended, restore hcec->gState to Ready */     
-    hcec->gState = HAL_CEC_STATE_READY;
-    /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
-    start again the Transmission under the Tx call back API */
-    __HAL_UNLOCK(hcec);
-    hcec->ErrorCode = HAL_CEC_ERROR_NONE;
-    HAL_CEC_TxCpltCallback(hcec);
-  } 
-  
-  /* ----------------------------Rx/Tx Error Management----------------------------------*/   
-  if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U)
-  {
-    hcec->ErrorCode = reg;
-    __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
-
-    
-    if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
-    {
-      hcec->Init.RxBuffer-=hcec->RxXferSize;	
-      hcec->RxXferSize = 0U; 
-      hcec->RxState = HAL_CEC_STATE_READY;
-    }
-    else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
-    {	
-      /* Set the CEC state ready to be able to start again the process */
-      hcec->gState = HAL_CEC_STATE_READY;
-    }	
-    
-    /* Error  Call Back */    
-    HAL_CEC_ErrorCallback(hcec);
-  }
-  
-}
-
-/**
-  * @brief Tx Transfer completed callback
-  * @param hcec CEC handle
-  * @retval None
-  */
- __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcec);  
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CEC_TxCpltCallback can be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief Rx Transfer completed callback
-  * @param hcec CEC handle
-  * @param RxFrameSize Size of frame
-  * @retval None
-  */
-__weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcec);
-  UNUSED(RxFrameSize);
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CEC_RxCpltCallback can be implemented in the user file
-   */
-}
-
-/**
-  * @brief CEC error callbacks
-  * @param hcec CEC handle
-  * @retval None
-  */
- __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcec);
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CEC_ErrorCallback can be implemented in the user file
-   */ 
-}
-/**
-  * @}
-  */
-
-/** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function 
-  *  @brief   CEC control functions 
-  *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control function #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the CEC.
-     (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. 
-	 (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral. 
-@endverbatim
-  * @{
-  */
-/**
-  * @brief return the CEC state
-  * @param hcec pointer to a CEC_HandleTypeDef structure that contains
-  *              the configuration information for the specified CEC module.
-  * @retval HAL state
-  */
-HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
-{
-  uint32_t temp1 = 0x00U, temp2 = 0x00U;
-  temp1 = hcec->gState;
-  temp2 = hcec->RxState;
-  
-  return (HAL_CEC_StateTypeDef)(temp1 | temp2);
-}
-
-/**
-  * @brief  Return the CEC error code
-  * @param  hcec pointer to a CEC_HandleTypeDef structure that contains
-  *              the configuration information for the specified CEC.
-  * @retval CEC Error Code
-  */
-uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
-{
-  return hcec->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */  
-#endif /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F051x8) || defined(STM32F058xx) || */
-       /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */
-       /* defined(STM32F091xC) || defined (STM32F098xx) */
-
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_comp.c b/lib/hal-stm32f0/source/stm32f0xx_hal_comp.c
deleted file mode 100644
index a2d9c2d1..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_comp.c
+++ /dev/null
@@ -1,744 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_comp.c
-  * @author  MCD Application Team
-  * @brief   COMP HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the COMP peripheral:
-  *           + Initialization/de-initialization functions
-  *           + I/O operation functions
-  *           + Peripheral Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
-================================================================================
-          ##### COMP Peripheral features #####
-================================================================================
-           
-  [..]       
-      The STM32F0xx device family integrates up to 2 analog comparators COMP1 and COMP2:
-      (+) The non inverting input and inverting input can be set to GPIO pins.
-  
-      (+) The COMP output is available using HAL_COMP_GetOutputLevel() 
-          and can be set on GPIO pins.
-  
-      (+) The COMP output can be redirected to embedded timers (TIM1, TIM2 and TIM3).
-  
-      (+) The comparators COMP1 and COMP2 can be combined in window mode.
-  
-      (+) The comparators have interrupt capability with wake-up
-          from Sleep and Stop modes (through the EXTI controller):
-          (++) COMP1 is internally connected to EXTI Line 21
-          (++) COMP2 is internally connected to EXTI Line 22
-
-      (+) From the corresponding IRQ handler, the right interrupt source can be retrieved with the 
-          macros __HAL_COMP_COMP1_EXTI_GET_FLAG() and __HAL_COMP_COMP2_EXTI_GET_FLAG().
-
-
-            ##### How to use this driver #####
-================================================================================
-  [..]
-      This driver provides functions to configure and program the Comparators of STM32F05x, STM32F07x and STM32F09x devices.
-
-      To use the comparator, perform the following steps:
-  
-      (#) Fill in the HAL_COMP_MspInit() to
-      (++) Configure the comparator input in analog mode using HAL_GPIO_Init()
-      (++) Configure the comparator output in alternate function mode using HAL_GPIO_Init() to map the comparator 
-           output to the GPIO pin
-      (++) If required enable the COMP interrupt by configuring and enabling EXTI line in Interrupt mode and 
-           selecting the desired sensitivity level using HAL_GPIO_Init() function. After that enable the comparator
-           interrupt vector using HAL_NVIC_EnableIRQ() function.
-  
-      (#) Configure the comparator using HAL_COMP_Init() function:
-      (++) Select the inverting input (input minus)
-      (++) Select the non inverting input (input plus)
-      (++) Select the output polarity  
-      (++) Select the output redirection
-      (++) Select the hysteresis level
-      (++) Select the power mode
-      (++) Select the event/interrupt mode
-      (++) Select the window mode
-  
-      -@@- HAL_COMP_Init() calls internally __HAL_RCC_SYSCFG_CLK_ENABLE() in order
-          to access the comparator(s) registers.
-
-      (#) Enable the comparator using HAL_COMP_Start() function or HAL_COMP_Start_IT() function for interrupt mode.
-    
-      (#) Use HAL_COMP_TriggerCallback() and/or HAL_COMP_GetOutputLevel() functions
-          to manage comparator outputs (event/interrupt triggered and output level).
-
-      (#) Disable the comparator using HAL_COMP_Stop() or HAL_COMP_Stop_IT() 
-          function.
-
-      (#) De-initialize the comparator using HAL_COMP_DeInit() function.
-
-      (#) For safety purposes comparator(s) can be locked using HAL_COMP_Lock() function.
-          Only a MCU reset can reset that protection.
-      
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/*
-    Additional Tables:
-
-    Table 1. COMP Inputs for the STM32F05x, STM32F07x and STM32F09x devices
-    +--------------------------------------------------+    
-    |                 |                | COMP1 | COMP2 |
-    |-----------------|----------------|---------------|
-    |                 | 1/4 VREFINT    |  OK   |  OK   |
-    |                 | 1/2 VREFINT    |  OK   |  OK   |
-    |                 | 3/4 VREFINT    |  OK   |  OK   |
-    | Inverting Input | VREFINT        |  OK   |  OK   |
-    |                 | DAC1 OUT (PA4) |  OK   |  OK   |
-    |                 | DAC2 OUT (PA5) |  OK   |  OK   |
-    |                 | IO1            |  PA0  |  PA2  |
-    |-----------------|----------------|-------|-------|
-    |  Non Inverting  |                |  PA1  |  PA3  |
-    |    Input        |                |       |       |
-    +--------------------------------------------------+  
-
-    Table 2. COMP Outputs for the STM32F05x, STM32F07x and STM32F09x devices
-    +---------------+     
-    | COMP1 | COMP2 |
-    |-------|-------|
-    |  PA0  |  PA2  |
-    |  PA6  |  PA7  |
-    |  PA11 |  PA12 |
-    +---------------+
-
-    Table 3. COMP Outputs redirection to embedded timers for the STM32F05x, STM32F07x and STM32F09x devices
-    +---------------------------------+     
-    |     COMP1      |     COMP2      |
-    |----------------|----------------|
-    |  TIM1 BKIN     |  TIM1 BKIN     |
-    |                |                |
-    |  TIM1 OCREFCLR |  TIM1 OCREFCLR |
-    |                |                |
-    |  TIM1 IC1      |  TIM1 IC1      |
-    |                |                |
-    |  TIM2 IC4      |  TIM2 IC4      |
-    |                |                |
-    |  TIM2 OCREFCLR |  TIM2 OCREFCLR |
-    |                |                |
-    |  TIM3 IC1      |  TIM3 IC1      |
-    |                |                |
-    |  TIM3 OCREFCLR |  TIM3 OCREFCLR |
-    +---------------------------------+
-
-*/
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#ifdef HAL_COMP_MODULE_ENABLED
-
-#if defined(STM32F051x8) || defined(STM32F058xx) || \
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined (STM32F098xx)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup COMP COMP
-  * @brief COMP HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-
-/** @defgroup COMP_Private_Constants COMP Private Constants
-  * @{
-  */
-
-/* Delay for COMP startup time.                                               */
-/* Note: Delay required to reach propagation delay specification.             */
-/* Literal set to maximum value (refer to device datasheet,                   */
-/* parameter "tSTART").                                                       */
-/* Unit: us                                                                   */
-#define COMP_DELAY_STARTUP_US           (60U)  /*!< Delay for COMP startup time */
-
-/* CSR register reset value */ 
-#define COMP_CSR_RESET_VALUE            (0x00000000U)
-/* CSR register masks */ 
-#define COMP_CSR_RESET_PARAMETERS_MASK   (0x00003FFFU)
-#define COMP_CSR_UPDATE_PARAMETERS_MASK  (0x00003FFEU)
-/* CSR COMPx non inverting input mask */ 
-#define COMP_CSR_COMPxNONINSEL_MASK      ((uint16_t)COMP_CSR_COMP1SW1)
-/* CSR COMP2 shift */ 
-#define COMP_CSR_COMP1_SHIFT             0U
-#define COMP_CSR_COMP2_SHIFT             16U
-/**
-  * @}
-  */
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup COMP_Exported_Functions COMP Exported Functions
-  * @{
-  */
-
-/** @defgroup COMP_Exported_Functions_Group1 Initialization/de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]  This section provides functions to initialize and de-initialize comparators 
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the COMP according to the specified
-  *         parameters in the COMP_InitTypeDef and create the associated handle.
-  * @note   If the selected comparator is locked, initialization can't be performed.
-  *         To unlock the configuration, perform a system reset.
-  * @param  hcomp COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t regshift = COMP_CSR_COMP1_SHIFT;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-    assert_param(IS_COMP_INVERTINGINPUT(hcomp->Init.InvertingInput));
-    assert_param(IS_COMP_NONINVERTINGINPUT(hcomp->Init.NonInvertingInput));
-    assert_param(IS_COMP_OUTPUT(hcomp->Init.Output));
-    assert_param(IS_COMP_OUTPUTPOL(hcomp->Init.OutputPol));
-    assert_param(IS_COMP_HYSTERESIS(hcomp->Init.Hysteresis));
-    assert_param(IS_COMP_MODE(hcomp->Init.Mode));
-    
-    if(hcomp->Init.NonInvertingInput == COMP_NONINVERTINGINPUT_DAC1SWITCHCLOSED)
-    {
-      assert_param(IS_COMP_DAC1SWITCH_INSTANCE(hcomp->Instance));
-    }
-  
-    if(hcomp->Init.WindowMode != COMP_WINDOWMODE_DISABLE)
-    {
-      assert_param(IS_COMP_WINDOWMODE_INSTANCE(hcomp->Instance));
-    }
-
-    /* Init SYSCFG and the low level hardware to access comparators */
-    __HAL_RCC_SYSCFG_CLK_ENABLE();  
-
-    /* Init the low level hardware : SYSCFG to access comparators */
-    HAL_COMP_MspInit(hcomp);
-
-    if(hcomp->State == HAL_COMP_STATE_RESET)
-    {
-      /* Allocate lock resource and initialize it */
-      hcomp->Lock = HAL_UNLOCKED;
-    }
-
-    /* Change COMP peripheral state */
-    hcomp->State = HAL_COMP_STATE_BUSY;
-
-    /* Set COMP parameters */
-    /*     Set COMPxINSEL bits according to hcomp->Init.InvertingInput value        */
-    /*     Set COMPxOUTSEL bits according to hcomp->Init.Output value               */
-    /*     Set COMPxPOL bit according to hcomp->Init.OutputPol value                */
-    /*     Set COMPxHYST bits according to hcomp->Init.Hysteresis value             */
-    /*     Set COMPxMODE bits according to hcomp->Init.Mode value                   */
-    if(hcomp->Instance == COMP2)
-    {
-      regshift = COMP_CSR_COMP2_SHIFT;
-    }
-    MODIFY_REG(COMP->CSR, 
-               (COMP_CSR_COMPxINSEL  | COMP_CSR_COMPxNONINSEL_MASK | \
-                COMP_CSR_COMPxOUTSEL | COMP_CSR_COMPxPOL           | \
-                COMP_CSR_COMPxHYST   | COMP_CSR_COMPxMODE) << regshift,
-               (hcomp->Init.InvertingInput    | \
-                hcomp->Init.NonInvertingInput | \
-                hcomp->Init.Output            | \
-                hcomp->Init.OutputPol         | \
-                hcomp->Init.Hysteresis        | \
-                hcomp->Init.Mode) << regshift);   
-    
-    if(hcomp->Init.WindowMode != COMP_WINDOWMODE_DISABLE)
-    {
-      COMP->CSR |= COMP_CSR_WNDWEN;
-    }
-
-    /* Initialize the COMP state*/
-    hcomp->State = HAL_COMP_STATE_READY;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  DeInitializes the COMP peripheral 
-  * @note   Deinitialization can't be performed if the COMP configuration is locked.
-  *         To unlock the configuration, perform a system reset.
-  * @param  hcomp COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t regshift = COMP_CSR_COMP1_SHIFT;
-
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
-    /* Set COMP_CSR register to reset value for the corresponding COMP instance */
-    if(hcomp->Instance == COMP2)
-    {
-      regshift = COMP_CSR_COMP2_SHIFT;
-    }
-    MODIFY_REG(COMP->CSR, 
-               COMP_CSR_RESET_PARAMETERS_MASK << regshift, 
-               COMP_CSR_RESET_VALUE << regshift);
-    
-    /* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */
-    HAL_COMP_MspDeInit(hcomp);
-
-    hcomp->State = HAL_COMP_STATE_RESET;
-    
-    /* Release Lock */
-    __HAL_UNLOCK(hcomp);
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Initializes the COMP MSP.
-  * @param  hcomp COMP handle
-  * @retval None
-  */
-__weak void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcomp);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_COMP_MspInit could be implenetd in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes COMP MSP.
-  * @param  hcomp COMP handle
-  * @retval None
-  */
-__weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcomp);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_COMP_MspDeInit could be implenetd in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_Exported_Functions_Group2 I/O operation functions 
- *  @brief   Data transfers functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to manage the COMP data 
-    transfers.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Start the comparator 
-  * @param  hcomp COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp)
-{ 
-  uint32_t wait_loop_index = 0U;
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t regshift = COMP_CSR_COMP1_SHIFT;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
-    if(hcomp->State == HAL_COMP_STATE_READY)
-    {
-      /* Enable the selected comparator */
-      if(hcomp->Instance == COMP2)
-      {
-        regshift = COMP_CSR_COMP2_SHIFT;
-      }
-      SET_BIT(COMP->CSR, COMP_CSR_COMPxEN << regshift);
-      
-      /* Set HAL COMP handle state */
-      hcomp->State = HAL_COMP_STATE_BUSY;
-      
-      /* Delay for COMP startup time */
-      wait_loop_index = (COMP_DELAY_STARTUP_US * (SystemCoreClock / 1000000U));
-      while(wait_loop_index != 0U)
-      {
-        wait_loop_index--;
-      }    
-    }
-    else
-    {
-      status = HAL_ERROR;
-    }
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Stop the comparator 
-  * @param  hcomp COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp)
-{ 
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t regshift = COMP_CSR_COMP1_SHIFT;
-  
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
-    if(hcomp->State == HAL_COMP_STATE_BUSY)
-    {
-      /* Disable the selected comparator */
-      if(hcomp->Instance == COMP2)
-      {
-        regshift = COMP_CSR_COMP2_SHIFT;
-      }
-      CLEAR_BIT(COMP->CSR, COMP_CSR_COMPxEN << regshift);
-
-      hcomp->State = HAL_COMP_STATE_READY;
-    }
-    else
-    {
-      status = HAL_ERROR;
-    }
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Enables the interrupt and starts the comparator
-  * @param  hcomp COMP handle
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t extiline = 0U;
-  
-  /* Check the parameter */
-  assert_param(IS_COMP_TRIGGERMODE(hcomp->Init.TriggerMode));
-
-  status = HAL_COMP_Start(hcomp);
-  if(status == HAL_OK)
-  {
-    /* Check the Exti Line output configuration */
-    extiline = COMP_GET_EXTI_LINE(hcomp->Instance);
-    /* Configure the rising edge */
-    if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_RISING) != RESET)
-    {
-      SET_BIT(EXTI->RTSR, extiline);
-    }
-    else
-    {
-      CLEAR_BIT(EXTI->RTSR, extiline);
-    }
-    /* Configure the falling edge */
-    if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_FALLING) != RESET)
-    {
-      SET_BIT(EXTI->FTSR, extiline);
-    }
-    else
-    {
-      CLEAR_BIT(EXTI->FTSR, extiline);
-    }
-
-    /* Clear COMP EXTI pending bit */
-    WRITE_REG(EXTI->PR, extiline);
-    
-    /* Enable Exti interrupt mode */
-    SET_BIT(EXTI->IMR, extiline);
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Disable the interrupt and Stop the comparator 
-  * @param  hcomp COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp)
-{ 
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Disable the Exti Line interrupt mode */
-  CLEAR_BIT(EXTI->IMR, COMP_GET_EXTI_LINE(hcomp->Instance));
-  
-  status = HAL_COMP_Stop(hcomp);
-  
-  return status;
-}
-
-/**
-  * @brief  Comparator IRQ Handler 
-  * @param  hcomp COMP handle
-  * @retval HAL status
-  */
-void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
-{
-  uint32_t extiline = COMP_GET_EXTI_LINE(hcomp->Instance);
-  
-  /* Check COMP Exti flag */
-  if(READ_BIT(EXTI->PR, extiline) != RESET)
-  {
-    /* Clear COMP Exti pending bit */
-    WRITE_REG(EXTI->PR, extiline);
-
-    /* COMP trigger user callback */
-    HAL_COMP_TriggerCallback(hcomp);    
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_Exported_Functions_Group3 Peripheral Control functions 
- *  @brief   management functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the COMP data 
-    transfers.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Lock the selected comparator configuration. 
-  * @param  hcomp COMP handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t regshift = COMP_CSR_COMP1_SHIFT;
-
-  /* Check the COMP handle allocation and lock status */
-  if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET))
-  {
-    status = HAL_ERROR;
-  }
-  else
-  {
-    /* Check the parameter */
-    assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
-    /* Set lock flag */
-    hcomp->State |= COMP_STATE_BIT_LOCK;
-
-    /* Set the lock bit corresponding to selected comparator */
-    if(hcomp->Instance == COMP2)
-    {
-      regshift = COMP_CSR_COMP2_SHIFT;
-    }
-    SET_BIT(COMP->CSR, COMP_CSR_COMPxLOCK << regshift);
-  }
-  
-  return status; 
-}
-
-/**
-  * @brief  Return the output level (high or low) of the selected comparator. 
-  *         The output level depends on the selected polarity.
-  *         If the polarity is not inverted:
-  *           - Comparator output is low when the non-inverting input is at a lower
-  *             voltage than the inverting input
-  *           - Comparator output is high when the non-inverting input is at a higher
-  *             voltage than the inverting input
-  *         If the polarity is inverted:
-  *           - Comparator output is high when the non-inverting input is at a lower
-  *             voltage than the inverting input
-  *           - Comparator output is low when the non-inverting input is at a higher
-  *             voltage than the inverting input
-  * @param  hcomp COMP handle
-  * @retval Returns the selected comparator output level: COMP_OUTPUTLEVEL_LOW or COMP_OUTPUTLEVEL_HIGH.
-  *       
-  */
-uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp)
-{
-  uint32_t level=0;
-  uint32_t regshift = COMP_CSR_COMP1_SHIFT;
-  
-  /* Check the parameter */
-  assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-  
-  if(hcomp->Instance == COMP2)
-  {
-    regshift = COMP_CSR_COMP2_SHIFT;
-  }
-  level = READ_BIT(COMP->CSR, COMP_CSR_COMPxOUT << regshift);
-  
-  if(level != 0U)
-  {
-    return(COMP_OUTPUTLEVEL_HIGH);
-  }
-  return(COMP_OUTPUTLEVEL_LOW);
-}
-
-/**
-  * @brief  Comparator callback.
-  * @param  hcomp COMP handle
-  * @retval None
-  */
-__weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcomp);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_COMP_TriggerCallback should be implemented in the user file
-   */
-}
-
-
-/**
-  * @}
-  */
-
-/** @defgroup COMP_Exported_Functions_Group4 Peripheral State functions 
- *  @brief   Peripheral State functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection permit to get in run-time the status of the peripheral 
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the COMP state
-  * @param  hcomp COMP handle
-  * @retval HAL state
-  */
-uint32_t HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
-{
-  /* Check the COMP handle allocation */
-  if(hcomp == NULL)
-  {
-    return HAL_COMP_STATE_RESET;
-  }
-
-  /* Check the parameter */
-  assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
-
-  return hcomp->State;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* STM32F051x8 || STM32F058xx || */
-       /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || defined (STM32F098xx) */
-
-#endif /* HAL_COMP_MODULE_ENABLED */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_cortex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_cortex.c
deleted file mode 100644
index fba72d33..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_cortex.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_cortex.c
-  * @author  MCD Application Team
-  * @brief   CORTEX HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the CORTEX:
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions 
-  *
-  *  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-
-    [..]  
-    *** How to configure Interrupts using CORTEX HAL driver ***
-    ===========================================================
-    [..]
-    This section provides functions allowing to configure the NVIC interrupts (IRQ).
-    The Cortex-M0 exceptions are managed by CMSIS functions.
-      (#) Enable and Configure the priority of the selected IRQ Channels. 
-             The priority can be 0..3. 
-
-        -@- Lower priority values gives higher priority.
-        -@- Priority Order:
-            (#@) Lowest priority.
-            (#@) Lowest hardware priority (IRQn position).  
-
-      (#)  Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority()
-
-      (#)  Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ()
-      
-      -@-  Negative value of IRQn_Type are not allowed.
-
-
-    [..]
-    *** How to configure Systick using CORTEX HAL driver ***
-    ========================================================
-    [..]
-    Setup SysTick Timer for time base. 
-           
-   (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
-       is a CMSIS function that:
-        (++) Configures the SysTick Reload register with value passed as function parameter.
-        (++) Configures the SysTick IRQ priority to the lowest value (0x03).
-        (++) Resets the SysTick Counter register.
-        (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
-        (++) Enables the SysTick Interrupt.
-        (++) Starts the SysTick Counter.
-    
-   (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
-       HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
-       HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() macro is defined
-       inside the stm32f0xx_hal_cortex.h file.
-
-   (+) You can change the SysTick IRQ priority by calling the
-       HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function 
-       call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
-
-   (+) To adjust the SysTick time base, use the following formula:
-
-       Reload Value = SysTick Counter Clock (Hz) x  Desired Time base (s)
-       (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
-       (++) Reload Value should not exceed 0xFFFFFF
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CORTEX CORTEX
-  * @brief CORTEX CORTEX HAL module driver
-  * @{
-  */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
-  * @{
-  */
-
-
-/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions 
- *  @brief    Initialization and Configuration functions
- *
-@verbatim
-  ==============================================================================
-              ##### Initialization and de-initialization functions #####
-  ==============================================================================
-    [..]
-      This section provides the CORTEX HAL driver functions allowing to configure Interrupts
-      Systick functionalities 
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Sets the priority of an interrupt.
-  * @param  IRQn External interrupt number .
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32f0xx.h file)
-  * @param  PreemptPriority The preemption priority for the IRQn channel.
-  *         This parameter can be a value between 0 and 3.
-  *         A lower priority value indicates a higher priority
-  * @param  SubPriority the subpriority level for the IRQ channel.
-  *         with stm32f0xx devices, this parameter is a dummy value and it is ignored, because 
-  *         no subpriority supported in Cortex M0 based products.   
-  * @retval None
-  */
-void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
-{ 
-  /* Check the parameters */
-  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
-  NVIC_SetPriority(IRQn,PreemptPriority);
-}
-
-/**
-  * @brief  Enables a device specific interrupt in the NVIC interrupt controller.
-  * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
-  *         function should be called before. 
-  * @param  IRQn External interrupt number.
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
-  * @retval None
-  */
-void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Enable interrupt */
-  NVIC_EnableIRQ(IRQn);
-}
-
-/**
-  * @brief  Disables a device specific interrupt in the NVIC interrupt controller.
-  * @param  IRQn External interrupt number.
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
-  * @retval None
-  */
-void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Disable interrupt */
-  NVIC_DisableIRQ(IRQn);
-}
-
-/**
-  * @brief  Initiates a system reset request to reset the MCU.
-  * @retval None
-  */
-void HAL_NVIC_SystemReset(void)
-{
-  /* System Reset */
-  NVIC_SystemReset();
-}
-
-/**
-  * @brief  Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-  *         Counter is in free running mode to generate periodic interrupts.
-  * @param  TicksNumb Specifies the ticks Number of ticks between two interrupts.
-  * @retval status:  - 0  Function succeeded.
-  *                  - 1  Function failed.
-  */
-uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
-{
-   return SysTick_Config(TicksNumb);
-}
-/**
-  * @}
-  */
-
-/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions 
- *  @brief   Cortex control functions
- *
-@verbatim
-  ==============================================================================
-                      ##### Peripheral Control functions #####
-  ==============================================================================
-    [..]
-      This subsection provides a set of functions allowing to control the CORTEX
-      (NVIC, SYSTICK) functionalities.
-
-
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief  Gets the priority of an interrupt.
-  * @param  IRQn External interrupt number.
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
-  * @retval None
-  */
-uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn)
-{
-  /* Get priority for Cortex-M system or device specific interrupts */
-  return NVIC_GetPriority(IRQn);
-}
-
-/**
-  * @brief  Sets Pending bit of an external interrupt.
-  * @param  IRQn External interrupt number
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
-  * @retval None
-  */
-void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Set interrupt pending */
-  NVIC_SetPendingIRQ(IRQn);
-}
-
-/**
-  * @brief  Gets Pending Interrupt (reads the pending register in the NVIC
-  *         and returns the pending bit for the specified interrupt).
-  * @param  IRQn External interrupt number.
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
-  * @retval status: - 0  Interrupt status is not pending.
-  *                 - 1  Interrupt status is pending.
-  */
-uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Return 1 if pending else 0 */
-  return NVIC_GetPendingIRQ(IRQn);
-}
-
-/**
-  * @brief  Clears the pending bit of an external interrupt.
-  * @param  IRQn External interrupt number.
-  *         This parameter can be an enumerator of IRQn_Type enumeration
-  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
-  * @retval None
-  */
-void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  /* Check the parameters */
-  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
-  
-  /* Clear pending interrupt */
-  NVIC_ClearPendingIRQ(IRQn);
-}
-
-/**
-  * @brief  Configures the SysTick clock source.
-  * @param  CLKSource specifies the SysTick clock source.
-  *         This parameter can be one of the following values:
-  *             @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
-  *             @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
-  * @retval None
-  */
-void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
-{
-  /* Check the parameters */
-  assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
-  if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
-  {
-    SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
-  }
-  else
-  {
-    SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
-  }
-}
-
-/**
-  * @brief  This function handles SYSTICK interrupt request.
-  * @retval None
-  */
-void HAL_SYSTICK_IRQHandler(void)
-{
-  HAL_SYSTICK_Callback();
-}
-
-/**
-  * @brief  SYSTICK callback.
-  * @retval None
-  */
-__weak void HAL_SYSTICK_Callback(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SYSTICK_Callback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_crc.c b/lib/hal-stm32f0/source/stm32f0xx_hal_crc.c
deleted file mode 100644
index cd94ee26..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_crc.c
+++ /dev/null
@@ -1,531 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_crc.c
-  * @author  MCD Application Team
-  * @brief   CRC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Cyclic Redundancy Check (CRC) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
- ===============================================================================
-                     ##### How to use this driver #####
- ===============================================================================
-    [..]
-         (+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE();
-         (+) Initialize CRC calculator
-             (++)specify generating polynomial (IP default or non-default one)
-             (++)specify initialization value (IP default or non-default one)
-             (++)specify input data format
-             (++)specify input or output data inversion mode if any
-         (+) Use HAL_CRC_Accumulate() function to compute the CRC value of the 
-             input data buffer starting with the previously computed CRC as 
-             initialization value
-         (+) Use HAL_CRC_Calculate() function to compute the CRC value of the 
-             input data buffer starting with the defined initialization value 
-             (default or non-default) to initiate CRC calculation
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CRC CRC
-  * @brief CRC HAL module driver.
-  * @{
-  */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup CRC_Private_Functions CRC Private Functions
-  * @{
-  */
-static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength);
-static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup CRC_Exported_Functions CRC Exported Functions
-  * @{
-  */
-
-/** @defgroup CRC_Exported_Functions_Group1 Initialization/de-initialization functions
- *  @brief    Initialization and Configuration functions. 
- *
-@verbatim    
- ===============================================================================
-            ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize the CRC according to the specified parameters 
-          in the CRC_InitTypeDef and create the associated handle
-      (+) DeInitialize the CRC peripheral
-      (+) Initialize the CRC MSP (MCU Specific Package)
-      (+) DeInitialize the CRC MSP
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the CRC according to the specified
-  *         parameters in the CRC_InitTypeDef and initialize the associated handle.
-  * @param  hcrc CRC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
-{
-  /* Check the CRC handle allocation */
-  if(hcrc == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
-
-  if(hcrc->State == HAL_CRC_STATE_RESET)
-  {   
-    /* Allocate lock resource and initialize it */
-    hcrc->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware */
-    HAL_CRC_MspInit(hcrc);
-  }
-  
-  hcrc->State = HAL_CRC_STATE_BUSY; 
-  
-  /* Extended initialization: if programmable polynomial feature is 
-     applicable to device, set default or non-default generating 
-     polynomial according to hcrc->Init parameters.
-     If feature is non-applicable to device in use, HAL_CRCEx_Init straight 
-     away reports HAL_OK. */
-  if (HAL_CRCEx_Init(hcrc) != HAL_OK)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* check whether or not non-default CRC initial value has been 
-   * picked up by user */
-  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
-  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
-  {
-    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);  
-  }
-  else
-  {
-    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
-  }
-  
-
-  /* set input data inversion mode */
-  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode)); 
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode); 
-  
-  /* set output data inversion mode */
-  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode)); 
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);  
-  
-  /* makes sure the input data format (bytes, halfwords or words stream)
-   * is properly specified by user */
-  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));
-
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitialize the CRC peripheral. 
-  * @param  hcrc CRC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
-{ 
-  /* Check the CRC handle allocation */
-  if(hcrc == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
-  
-  /* Check the CRC peripheral state */
-  if(hcrc->State == HAL_CRC_STATE_BUSY)
-  {
-    return HAL_BUSY;
-  }
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_BUSY;
-  
-  /* Reset CRC calculation unit */
-  __HAL_CRC_DR_RESET(hcrc);
-  
-  /* Reset IDR register content */
-  CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR) ;
-
-  /* DeInit the low level hardware */
-  HAL_CRC_MspDeInit(hcrc);
-
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_RESET;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(hcrc);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the CRC MSP.
-  * @param  hcrc CRC handle
-  * @retval None
-  */
-__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcrc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CRC_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitialize the CRC MSP.
-  * @param  hcrc CRC handle
-  * @retval None
-  */
-__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hcrc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_CRC_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions 
- *  @brief    management functions. 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) compute the 7U, 8U, 16 or 32-bit CRC value of an 8U, 16 or 32-bit data buffer
-          using the combination of the previous CRC value and the new one
-          
-       [..]  or
-          
-      (+) compute the 7U, 8U, 16 or 32-bit CRC value of an 8U, 16 or 32-bit data buffer
-          independently of the previous CRC value.
-
-@endverbatim
-  * @{
-  */
-
-/**                  
-  * @brief  Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
-  *         starting with the previously computed CRC as initialization value.
-  * @param  hcrc CRC handle
-  * @param  pBuffer pointer to the input data buffer, exact input data format is
-  *         provided by hcrc->InputDataFormat.  
-  * @param  BufferLength input data buffer length (number of bytes if pBuffer
-  *         type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
-  *         number of words if pBuffer type is * uint32_t).
-  * @note  By default, the API expects a uint32_t pointer as input buffer parameter.
-  *        Input buffer pointers with other types simply need to be cast in uint32_t
-  *        and the API will internally adjust its input data processing based on the
-  *        handle field hcrc->InputDataFormat.
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */
-uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
-{
-  uint32_t index = 0U; /* CRC input data buffer index */
-  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
-  
-  /* Process locked */
-  __HAL_LOCK(hcrc); 
-    
-  /* Change CRC peripheral state */  
-  hcrc->State = HAL_CRC_STATE_BUSY;
-  
-  switch (hcrc->InputDataFormat)
-  {
-    case CRC_INPUTDATA_FORMAT_WORDS:  
-      /* Enter Data to the CRC calculator */
-      for(index = 0U; index < BufferLength; index++)
-      {
-        hcrc->Instance->DR = pBuffer[index];
-      }
-      temp = hcrc->Instance->DR;
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_BYTES: 
-      temp = CRC_Handle_8(hcrc, (uint8_t*)pBuffer, BufferLength);
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_HALFWORDS: 
-      temp = CRC_Handle_16(hcrc, (uint16_t*)pBuffer, BufferLength);
-      break;
-      
-    default:
-      break;          
-  }
-  
-  /* Change CRC peripheral state */    
-  hcrc->State = HAL_CRC_STATE_READY; 
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hcrc);
-  
-  /* Return the CRC computed value */ 
-  return temp;
-}
-
-
-/**                  
-  * @brief  Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
-  *         starting with hcrc->Instance->INIT as initialization value.
-  * @param  hcrc CRC handle
-  * @param  pBuffer pointer to the input data buffer, exact input data format is
-  *         provided by hcrc->InputDataFormat.  
-  * @param  BufferLength input data buffer length (number of bytes if pBuffer
-  *         type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
-  *         number of words if pBuffer type is * uint32_t).
-  * @note  By default, the API expects a uint32_t pointer as input buffer parameter.
-  *        Input buffer pointers with other types simply need to be cast in uint32_t
-  *        and the API will internally adjust its input data processing based on the
-  *        handle field hcrc->InputDataFormat. 
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */  
-uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
-{
-  uint32_t index = 0U; /* CRC input data buffer index */
-  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
-    
-  /* Process locked */
-  __HAL_LOCK(hcrc); 
-  
-  /* Change CRC peripheral state */  
-  hcrc->State = HAL_CRC_STATE_BUSY;
-  
-  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is 
-  *  written in hcrc->Instance->DR) */
-  __HAL_CRC_DR_RESET(hcrc);
-  
-  switch (hcrc->InputDataFormat)
-  {
-    case CRC_INPUTDATA_FORMAT_WORDS:  
-      /* Enter 32-bit input data to the CRC calculator */
-      for(index = 0U; index < BufferLength; index++)
-      {
-        hcrc->Instance->DR = pBuffer[index];
-      }
-      temp = hcrc->Instance->DR;
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_BYTES: 
-      /* Specific 8-bit input data handling  */
-      temp = CRC_Handle_8(hcrc, (uint8_t*)pBuffer, BufferLength);
-      break;
-      
-    case CRC_INPUTDATA_FORMAT_HALFWORDS: 
-      /* Specific 16-bit input data handling  */
-      temp = CRC_Handle_16(hcrc, (uint16_t*)pBuffer, BufferLength);
-      break;
-      
-    default:
-      break;         
-  }
-
-  /* Change CRC peripheral state */    
-  hcrc->State = HAL_CRC_STATE_READY; 
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hcrc);
-  
-  /* Return the CRC computed value */ 
-  return temp;
-}
-  
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions 
- *  @brief    Peripheral State functions. 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection permits to get in run-time the status of the peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the CRC handle state.
-  * @param  hcrc CRC handle
-  * @retval HAL state
-  */
-HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)
-{
-  /* Return CRC handle state */
-  return hcrc->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup CRC_Private_Functions CRC Private Functions
-  * @{
-  */
-
-/**             
-  * @brief  Enter 8-bit input data to the CRC calculator.
-  *         Specific data handling to optimize processing time.  
-  * @param  hcrc CRC handle
-  * @param  pBuffer pointer to the input data buffer
-  * @param  BufferLength input data buffer length
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */
-static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
-{
-  uint32_t i = 0U; /* input data buffer index */
-  
-   /* Processing time optimization: 4 bytes are entered in a row with a single word write,
-    * last bytes must be carefully fed to the CRC calculator to ensure a correct type
-    * handling by the IP */
-   for(i = 0U; i < (BufferLength/4U); i++)
-   {
-      hcrc->Instance->DR = ((uint32_t)pBuffer[4U*i]<<24U) | ((uint32_t)pBuffer[4U*i+1]<<16U) | ((uint32_t)pBuffer[4U*i+2]<<8U) | (uint32_t)pBuffer[4U*i+3];      
-   }
-   /* last bytes specific handling */
-   if ((BufferLength%4U) != 0U)
-   {
-     if  (BufferLength%4U == 1U)
-     {
-       *(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4*i];
-     }
-     if  (BufferLength%4U == 2U)
-     {
-       *(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4*i]<<8) | (uint32_t)pBuffer[4*i+1];
-     }
-     if  (BufferLength%4U == 3U)
-     {
-       *(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4*i]<<8) | (uint32_t)pBuffer[4*i+1];
-       *(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4*i+2];       
-     }
-   }
-  
-  /* Return the CRC computed value */ 
-  return hcrc->Instance->DR;
-}
-
-
-
-/**             
-  * @brief  Enter 16-bit input data to the CRC calculator.
-  *         Specific data handling to optimize processing time.  
-  * @param  hcrc CRC handle
-  * @param  pBuffer pointer to the input data buffer
-  * @param  BufferLength input data buffer length
-  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
-  */  
-static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
-{
-  uint32_t i = 0U;  /* input data buffer index */
-  
-  /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
-   * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure 
-   * a correct type handling by the IP */
-  for(i = 0U; i < (BufferLength/2U); i++)
-  {
-    hcrc->Instance->DR = ((uint32_t)pBuffer[2U*i]<<16U) | (uint32_t)pBuffer[2U*i+1];     
-  }
-  if ((BufferLength%2U) != 0U)
-  {
-       *(uint16_t volatile*) (&hcrc->Instance->DR) = pBuffer[2*i]; 
-  }
-   
-  /* Return the CRC computed value */ 
-  return hcrc->Instance->DR;
-}
-
-/**
-  * @}
-  */
-  
-#endif /* HAL_CRC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_crc_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_crc_ex.c
deleted file mode 100644
index 02591701..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_crc_ex.c
+++ /dev/null
@@ -1,270 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_crc_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended CRC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the CRC peripheral:
-  *           + Extended initialization functions
-  *         
-  @verbatim
-================================================================================
-            ##### How to use this driver #####
-================================================================================
-    [..]
-         (+) Extended initialization
-         (+) Set or not user-defined generating
-            polynomial other than default one
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup CRCEx CRCEx 
-  * @brief CRC Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup CRCEx_Exported_Functions CRCEx Exported Functions
-  * @{
-  */
-
-/** @defgroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions
-  * @brief    Extended Initialization and Configuration functions.
-  *
-@verbatim    
- ===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize the CRC generating polynomial: if programmable polynomial 
-          feature is applicable to device, set default or non-default generating 
-          polynomial according to hcrc->Init.DefaultPolynomialUse parameter.
-          If feature is non-applicable to device in use, HAL_CRCEx_Init straight 
-          away reports HAL_OK.
-      (+) Set the generating polynomial
- 
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief  Extended initialization to set generating polynomial
-  * @param  hcrc CRC handle             
-  * @retval HAL status
-  */             
-HAL_StatusTypeDef HAL_CRCEx_Init(CRC_HandleTypeDef *hcrc)
-{
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined (STM32F098xx)
-  /* check whether or not non-default generating polynomial has been 
-   * picked up by user */
-  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse)); 
-  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
-  {
-    /* initialize IP with default generating polynomial */
-    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);  
-    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
-  }
-  else
-  {
-    /* initialize CRC IP with generating polynomial defined by user */
-    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-  }
-#endif /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined (STM32F098xx) */    
-
-   return HAL_OK;
-}
-
-/**
-  * @brief  Set the Reverse Input data mode.
-  * @param  hcrc CRC handle
-  * @param  InputReverseMode Input Data inversion mode
-  *         This parameter can be one of the following values:
-  *          @arg CRC_INPUTDATA_NOINVERSION: no change in bit order (default value)
-  *          @arg CRC_INPUTDATA_INVERSION_BYTE: Byte-wise bit reversal
-  *          @arg CRC_INPUTDATA_INVERSION_HALFWORD: HalfWord-wise bit reversal
-  *          @arg CRC_INPUTDATA_INVERSION_WORD: Word-wise bit reversal              
-  * @retval HAL status
-  */                                   
-HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode)
-{  
-  /* Check the parameters */
-  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode));
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_BUSY;
-
-  /* set input data inversion mode */
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode);    
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the Reverse Output data mode.
-  * @param  hcrc CRC handle
-  * @param  OutputReverseMode Output Data inversion mode
-  *         This parameter can be one of the following values:
-  *          @arg CRC_OUTPUTDATA_INVERSION_DISABLE: no CRC inversion (default value)
-  *          @arg CRC_OUTPUTDATA_INVERSION_ENABLE: bit-level inversion (e.g for a 8-bit CRC: 0xB5 becomes 0xAD)            
-  * @retval HAL status
-  */                                   
-HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode)
-{
-  /* Check the parameters */
-  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode));
-  
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_BUSY;
-
-  /* set output data inversion mode */
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); 
-      
-  /* Change CRC peripheral state */
-  hcrc->State = HAL_CRC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-#if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F091xC) || defined (STM32F098xx)
-/**
-  * @brief  Initializes the CRC polynomial if different from default one.
-  * @param  hcrc CRC handle
-  * @param  Pol CRC generating polynomial (7, 8, 16 or 32-bit long)
-  *         This parameter is written in normal representation, e.g.
-  *         for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 
-  *         for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021     
-  * @param  PolyLength CRC polynomial length 
-  *         This parameter can be one of the following values:
-  *          @arg CRC_POLYLENGTH_7B: 7-bit long CRC (generating polynomial of degree 7)
-  *          @arg CRC_POLYLENGTH_8B: 8-bit long CRC (generating polynomial of degree 8)
-  *          @arg CRC_POLYLENGTH_16B: 16-bit long CRC (generating polynomial of degree 16)
-  *          @arg CRC_POLYLENGTH_32B: 32-bit long CRC (generating polynomial of degree 32)                
-  * @retval HAL status
-  */                                   
-HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
-{
-  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
-
-  /* Check the parameters */
-  assert_param(IS_CRC_POL_LENGTH(PolyLength));
-  
-  /* check polynomial definition vs polynomial size:
-   * polynomial length must be aligned with polynomial
-   * definition. HAL_ERROR is reported if Pol degree is 
-   * larger than that indicated by PolyLength.
-   * Look for MSB position: msb will contain the degree of
-   *  the second to the largest polynomial member. E.g., for
-   *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
-  while (((Pol & (1U << msb)) == 0U) && (msb-- > 0U))
-  {}
-
-  switch (PolyLength)
-  {
-    case CRC_POLYLENGTH_7B:
-      if (msb >= HAL_CRC_LENGTH_7B)
-      {
-        return  HAL_ERROR;
-      }
-      break;
-    case CRC_POLYLENGTH_8B:
-      if (msb >= HAL_CRC_LENGTH_8B)
-      { 
-        return  HAL_ERROR;
-      }
-      break;
-    case CRC_POLYLENGTH_16B:
-      if (msb >= HAL_CRC_LENGTH_16B)
-      {
-        return  HAL_ERROR;
-      }
-      break;
-    case CRC_POLYLENGTH_32B:
-      /* no polynomial definition vs. polynomial length issue possible */
-      break;      
-    default:
-      break;
-  }
-
-  /* set generating polynomial */
-  WRITE_REG(hcrc->Instance->POL, Pol);
-  
-  /* set generating polynomial size */
-  MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);  
-  
-  /* Return function status */
-  return HAL_OK;
-}
-#endif /* #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F091xC) || defined (STM32F098xx) */
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-
-#endif /* HAL_CRC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_dac.c b/lib/hal-stm32f0/source/stm32f0xx_hal_dac.c
deleted file mode 100644
index f3b658d4..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_dac.c
+++ /dev/null
@@ -1,785 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_dac.c
-  * @author  MCD Application Team
-  * @brief   DAC HAL module driver.
-  *         This file provides firmware functions to manage the following 
-  *         functionalities of the Digital to Analog Converter (DAC) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Errors functions      
-  *     
-  *
-  @verbatim      
-  ==============================================================================
-                      ##### DAC Peripheral features #####
-  ==============================================================================
-    [..]        
-      *** DAC Channels ***
-      ====================  
-    [..]  
-    STM32F0 devices integrates no, one or two 12-bit Digital Analog Converters.
-    STM32F05x devices have one converter (channel1)
-    STM32F07x & STM32F09x devices have two converters (i.e. channel1 & channel2)
-
-    When 2 converters are present (i.e. channel1 & channel2)  they 
-    can be used independently or simultaneously (dual mode):
-      (#) DAC channel1 with DAC_OUT1 (PA4) as output
-      (#) DAC channel2 with DAC_OUT2 (PA5) as output
-      
-      *** DAC Triggers ***
-      ====================
-    [..]
-    Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
-    and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. 
-    [..] 
-    Digital to Analog conversion can be triggered by:
-      (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
-          The used pin (GPIOx_PIN_9) must be configured in input mode.
-  
-      (#) Timers TRGO: TIM2, TIM3, TIM6, and TIM15 
-          (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
-  
-      (#) Software using DAC_TRIGGER_SOFTWARE
-  
-      *** DAC Buffer mode feature ***
-      =============================== 
-      [..] 
-      Each DAC channel integrates an output buffer that can be used to 
-      reduce the output impedance, and to drive external loads directly
-      without having to add an external operational amplifier.
-      To enable, the output buffer use  
-      sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
-      [..]           
-      (@) Refer to the device datasheet for more details about output 
-          impedance value with and without output buffer.
-
-      *** GPIO configurations guidelines ***
-      =====================
-      [..] 
-      When a DAC channel is used (ex channel1 on PA4) and the other is not 
-      (ex channel1 on PA5 is configured in Analog and disabled).
-      Channel1 may disturb channel2 as coupling effect.
-      Note that there is no coupling on channel2 as soon as channel2 is turned on.
-      Coupling on adjacent channel could be avoided as follows:
-      when unused PA5 is configured as INPUT PULL-UP or DOWN. 
-      PA5 is configured in ANALOG just before it is turned on.     
-            
-       *** DAC wave generation feature ***
-       =================================== 
-       [..]     
-       Both DAC channels can be used to generate
-         (#) Noise wave 
-         (#) Triangle wave
-            
-       *** DAC data format ***
-       =======================
-       [..]   
-       The DAC data format can be:
-         (#) 8-bit right alignment using DAC_ALIGN_8B_R
-         (#) 12-bit left alignment using DAC_ALIGN_12B_L
-         (#) 12-bit right alignment using DAC_ALIGN_12B_R
-  
-       *** DAC data value to voltage correspondance ***  
-       ================================================ 
-       [..] 
-       The analog output voltage on each DAC channel pin is determined
-       by the following equation: 
-       [..]
-       DAC_OUTx = VREF+ * DOR / 4095
-       (+) with  DOR is the Data Output Register
-       [..]
-          VEF+ is the input voltage reference (refer to the device datasheet)
-       [..]
-        e.g. To set DAC_OUT1 to 0.7V, use
-       (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
-  
-       *** DMA requests  ***
-       =====================
-       [..]    
-       A DMA1 request can be generated when an external trigger (but not
-       a software trigger) occurs if DMA1 requests are enabled using
-       HAL_DAC_Start_DMA()
-       [..]
-       DMA1 requests are mapped as following:
-         (#) DAC channel1 : mapped on DMA1 channel3 which must be 
-             already configured
-         (#) DAC channel2 : mapped on DMA1 channel4 which must be 
-             already configured
-       
-    (@) For Dual mode and specific signal (Triangle and noise) generation please 
-        refer to Extended Features Driver description        
-        STM32F0 devices with one channel (one converting capability) does not
-        support Dual mode and specific signal (Triangle and noise) generation.
-      
-                      ##### How to use this driver #####
-  ==============================================================================
-    [..]          
-      (+) DAC APB clock must be enabled to get write access to DAC
-          registers using HAL_DAC_Init()
-      (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
-      (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
-      (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]    
-       (+) Start the DAC peripheral using HAL_DAC_Start() 
-       (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
-       (+) Stop the DAC peripheral using HAL_DAC_Stop()
-       
-     *** DMA mode IO operation ***    
-     ==============================
-     [..]    
-       (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length 
-           of data to be transferred at each end of conversion
-       (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()  
-           function is executed and user can add his own code by customization of function pointer 
-           HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
-       (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()  
-           function is executed and user can add his own code by customization of function pointer 
-           HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
-       (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can 
-            add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
-       (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
-           HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()  
-           function is executed and user can add his own code by customization of function pointer 
-           HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
-           add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
-       (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
-                    
-     *** DAC HAL driver macros list ***
-     ============================================= 
-     [..]
-       Below the list of most used macros in DAC HAL driver.
-       
-      (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
-      (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
-      (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
-      (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
-      
-     [..]
-      (@) You can refer to the DAC HAL driver header file for more useful macros  
-   
- @endverbatim    
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-
-#if defined(STM32F051x8) || defined(STM32F058xx) || \
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined (STM32F098xx)
-
-/** @defgroup DAC DAC
-  * @brief DAC driver modules
-  * @{
-  */ 
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup DAC_Private_Macros DAC Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup DAC_Private_Functions DAC Private Functions
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Exported functions -------------------------------------------------------*/
-
-/** @defgroup DAC_Exported_Functions DAC Exported Functions
-  * @{
-  */
-
-/** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
-  ==============================================================================
-              ##### Initialization and de-initialization functions #####
-  ==============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the DAC. 
-      (+) De-initialize the DAC. 
-         
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the DAC peripheral according to the specified parameters
-  *         in the DAC_InitStruct and initialize the associated handle.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
-{ 
-  /* Check DAC handle */
-  if(hdac == NULL)
-  {
-     return HAL_ERROR;
-  }
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
-  
-  if(hdac->State == HAL_DAC_STATE_RESET)
-  {  
-    /* Allocate lock resource and initialize it */
-    hdac->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware */
-    HAL_DAC_MspInit(hdac);
-  }
-  
-  /* Initialize the DAC state*/
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Set DAC error code to none */
-  hdac->ErrorCode = HAL_DAC_ERROR_NONE;
-  
-  /* Initialize the DAC state*/
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deinitialize the DAC peripheral registers to their default reset values.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
-{
-  /* Check DAC handle */
-  if(hdac == NULL)
-  {
-     return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-
-  /* DeInit the low level hardware */
-  HAL_DAC_MspDeInit(hdac);
-
-  /* Set DAC error code to none */
-  hdac->ErrorCode = HAL_DAC_ERROR_NONE;
-
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hdac);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initialize the DAC MSP.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
-{ 
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_DAC_MspInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  DeInitialize the DAC MSP.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.  
-  * @retval None
-  */
-__weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_DAC_MspDeInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_Exported_Functions_Group2 IO operation functions
- *  @brief    IO operation functions 
- *
-@verbatim   
-  ==============================================================================
-             ##### IO operation functions #####
-  ==============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Start conversion.
-      (+) Stop conversion.
-      (+) Start conversion and enable DMA transfer.
-      (+) Stop conversion and disable DMA transfer.
-      (+) Set the specified data holding register value for DAC channel.
-                     
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32f0xx_hal_dac_ex.c   */
-  
-  /* Return error status as not implemented here */
-  return HAL_ERROR;
-}
-
-/**
-  * @brief  Disables DAC and stop conversion of channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Disable the Peripheral */
-  __HAL_DAC_DISABLE(hdac, Channel);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @param  pData The destination peripheral Buffer address.
-  * @param  Length The length of data to be transferred from memory to DAC peripheral
-  * @param  Alignment Specifies the data alignment for DAC channel.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-  UNUSED(pData);
-  UNUSED(Length);
-  UNUSED(Alignment);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32f0xx_hal_dac_ex.c   */
-  
-  /* Return error status as not implemented here */
-  return HAL_ERROR;
-}
-
-/**
-  * @brief  Disables DAC and stop conversion of channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-   HAL_StatusTypeDef status = HAL_OK;
-    
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Disable the selected DAC channel DMA request */
-    hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
-    
-  /* Disable the Peripheral */
-  __HAL_DAC_DISABLE(hdac, Channel);
-  
-  /* Disable the DMA channel */
-  /* Channel1 is used */
-  if (Channel == DAC_CHANNEL_1)
-  {
-    /* Disable the DMA channel */
-    status = HAL_DMA_Abort(hdac->DMA_Handle1);   
-    
-    /* Disable the DAC DMA underrun interrupt */
-    __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
-  }
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined (STM32F098xx)
-  /* Does not apply to STM32F051x8 & STM32F058xx */
-  
-  else /* Channel2 is used for */
-  {
-    /* Disable the DMA channel */
-    status = HAL_DMA_Abort(hdac->DMA_Handle2);   
-    
-    /* Disable the DAC DMA underrun interrupt */
-    __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
-  }
-#endif /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || STM32F098xx */ 
-  
-  /* Check if DMA Channel effectively disabled */
-  if (status != HAL_OK)
-  {
-  /* Update DAC state machine to error */
-  hdac->State = HAL_DAC_STATE_ERROR; 
-  }
-  else
-  {
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  }
-
-  /* Return function status */
-  return status;
-}
-
-/**
-  * @brief  Handles DAC interrupt request  
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32f0xx_hal_dac_ex.c   */
-}
-
-/**
-  * @brief  Set the specified data holding register value for DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected  
-  * @param  Alignment Specifies the data alignment.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @param  Data Data to be loaded in the selected data holding register.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
-{  
-  __IO uint32_t tmp = 0;
-  
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_ALIGN(Alignment));
-  assert_param(IS_DAC_DATA(Data));
-  
-  tmp = (uint32_t)hdac->Instance; 
-  if(Channel == DAC_CHANNEL_1)
-  {
-    tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
-  }
-  else
-  {
-    tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
-  }
-
-  /* Set the DAC channel1 selected data holding register */
-  *(__IO uint32_t *) tmp = Data;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Conversion complete callback in non blocking mode for Channel1 
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Conversion half DMA transfer callback in non-blocking mode for Channel1 
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Error DAC callback for Channel1.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DMA underrun DAC callback for channel1.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-  
-/** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
- *  @brief    Peripheral Control functions 
- *
-@verbatim
-  ==============================================================================
-             ##### Peripheral Control functions #####
-  ==============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure channels. 
-      (+) Get result of conversion.
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval The selected DAC channel data output value.
-  */
-__weak uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(Channel);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32f0xx_hal_dac_ex.c   */
-  
-  /* Return error status as not implemented here */
-  return HAL_ERROR;
-}
-
-/**
-  * @brief  Configures the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  sConfig DAC configuration structure.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-__weak HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-  UNUSED(sConfig);
-  UNUSED(Channel);
-
-  /* Note : This function is defined into this file for library reference. */
-  /*        Function content is located into file stm32f0xx_hal_dac_ex.c   */
-  
-  /* Return error status as not implemented here */
-  return HAL_ERROR;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
- *  @brief   Peripheral State and Errors functions 
- *
-@verbatim   
-  ==============================================================================
-            ##### Peripheral State and Errors functions #####
-  ==============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Check the DAC state.
-      (+) Check the DAC Errors.
-        
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  return the DAC handle state
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval HAL state
-  */
-HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
-{
-  /* Return DAC handle state */
-  return hdac->State;
-}
-
-
-/**
-  * @brief  Return the DAC error code
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval DAC Error Code
-  */
-uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
-{
-  return hdac->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* STM32F051x8 || STM32F058xx ||                */
-       /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || STM32F098xx */
-
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_dac_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_dac_ex.c
deleted file mode 100644
index 7ff936db..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_dac_ex.c
+++ /dev/null
@@ -1,1187 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_dac_ex.c
-  * @author  MCD Application Team
-  * @brief   DAC HAL module driver.
-  *          This file provides firmware functions to manage the extended 
-  *          functionalities of the DAC peripheral.  
-  *     
-  *
-  @verbatim      
-  ==============================================================================
-                      ##### How to use this driver #####
-  ==============================================================================
-    [..]          
-      (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
-          Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
-          HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.  
-      (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
-      (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
-   
- @endverbatim    
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-
-/** @addtogroup DAC
-  * @{
-  */ 
-
-#if defined(STM32F051x8) || defined(STM32F058xx) || \
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/** @addtogroup DAC_Private_Functions
-  * @{
-  */
-static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
-static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
-static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 
-/**
-  * @}
-  */
-  
-#endif /* STM32F051x8 STM32F058xx  */
-       /* STM32F071xB STM32F072xB STM32F078xx */
-       /* STM32F091xC STM32F098xx */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/** @addtogroup DAC_Private_Functions
-  * @{
-  */
-
-/* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */
-/* are set by HAL_DAC_Start_DMA */
-
-void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
-void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
-void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma); 
-/**
-  * @}
-  */
-
-#endif /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-
-/** @addtogroup DAC_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DAC_Exported_Functions_Group3
-  * @{
-  */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/**
-  * @brief  Configures the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  sConfig DAC configuration structure.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
-{
-  uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
-
-  /* Check the DAC parameters */
-  assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
-  assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
-  assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Get the DAC CR value */
-  tmpreg1 = hdac->Instance->CR;
-  /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
-  tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel); 
-  /* Configure for the selected DAC channel: buffer output, trigger */
-  /* Set TSELx and TENx bits according to DAC_Trigger value */
-  /* Set BOFFx bit according to DAC_OutputBuffer value */   
-  tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
-  /* Calculate CR register value depending on DAC_Channel */
-  tmpreg1 |= tmpreg2 << Channel;
-  /* Write to DAC CR */
-  hdac->Instance->CR = tmpreg1;
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-#endif /* STM32F071xB STM32F072xB STM32F078xx */
-       /* STM32F091xC STM32F098xx  */
-
-#if defined (STM32F051x8) || defined (STM32F058xx)
-
-/**
-  * @brief  Configures the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  sConfig DAC configuration structure.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
-{
-  uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
-
-  /* Check the DAC parameters */
-  assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
-  assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
-  assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Get the DAC CR value */
-  tmpreg1 = hdac->Instance->CR;
-  /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
-  tmpreg1 &= ~(((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel); 
-  /* Configure for the selected DAC channel: buffer output, trigger */
-  /* Set TSELx and TENx bits according to DAC_Trigger value */
-  /* Set BOFFx bit according to DAC_OutputBuffer value */   
-  tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
-  /* Calculate CR register value depending on DAC_Channel */
-  tmpreg1 |= tmpreg2 << Channel;
-  /* Write to DAC CR */
-  hdac->Instance->CR = tmpreg1;
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-#endif /* STM32F051x8 STM32F058xx */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-/* DAC 1 has 2 channels 1 & 2 */
-
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval The selected DAC channel data output value.
-  */
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Returns the DAC channel data output register value */
-  if(Channel == DAC_CHANNEL_1)
-  {
-    return hdac->Instance->DOR1;
-  }
-  else
-  {
-    return hdac->Instance->DOR2;
-  }
-}
-
-#endif /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-  
-#if defined (STM32F051x8) || defined (STM32F058xx)
-
-/* DAC 1 has 1 channels  */
-
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-    * @retval The selected DAC channel data output value.
-  */
-uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Returns the DAC channel data output register value */
-  return hdac->Instance->DOR1;
-}
-
-
-
-#endif /* STM32F051x8 STM32F058xx */
-
-/**
-  * @}
-  */
-
-/** @addtogroup DAC_Exported_Functions_Group2
-  * @{
-  */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-  
-  if(Channel == DAC_CHANNEL_1)
-  {
-    /* Check if software trigger enabled */
-    if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
-    {
-      /* Enable the selected DAC software conversion */
-      SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
-    }
-  }
-  else
-  {
-    /* Check if software trigger enabled */
-    if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
-    {
-      /* Enable the selected DAC software conversion*/
-      SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
-    }
-  }
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-    
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  *            @arg DAC_CHANNEL_2: DAC Channel2 selected
-  * @param  pData The destination peripheral Buffer address.
-  * @param  Length The length of data to be transferred from memory to DAC peripheral
-  * @param  Alignment Specifies the data alignment for DAC channel.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
-{
-  uint32_t tmpreg = 0U;
-    
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_ALIGN(Alignment));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  if(Channel == DAC_CHANNEL_1)
-  {
-    /* Set the DMA transfer complete callback for channel1 */
-    hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
-    
-    /* Set the DMA half transfer complete callback for channel1 */
-    hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
-       
-    /* Set the DMA error callback for channel1 */
-    hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
-    
-    /* Enable the selected DAC channel1 DMA request */
-    SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
-    
-    /* Case of use of channel 1 */
-    switch(Alignment)
-    {
-      case DAC_ALIGN_12B_R:
-        /* Get DHR12R1 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
-        break;
-      case DAC_ALIGN_12B_L:
-        /* Get DHR12L1 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
-        break;
-      case DAC_ALIGN_8B_R:
-        /* Get DHR8R1 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
-        break;
-      default:
-        break;
-    }
-  }
-  else
-  {
-    /* Set the DMA transfer complete callback for channel2 */
-    hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
-    
-    /* Set the DMA half transfer complete callback for channel2 */
-    hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
-       
-    /* Set the DMA error callback for channel2 */
-    hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
-    
-    /* Enable the selected DAC channel2 DMA request */
-    SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
-    
-    /* Case of use of channel 2 */
-    switch(Alignment)
-    {
-      case DAC_ALIGN_12B_R:
-        /* Get DHR12R2 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
-        break;
-      case DAC_ALIGN_12B_L:
-        /* Get DHR12L2 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
-        break;
-      case DAC_ALIGN_8B_R:
-        /* Get DHR8R2 address */
-        tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
-        break;
-      default:
-        break;
-    }
-  }
-  
-  /* Enable the DMA channel */
-  if(Channel == DAC_CHANNEL_1)
-  {
-    /* Enable the DAC DMA underrun interrupt */
-    __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
-    
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
-  } 
-  else
-  {
-    /* Enable the DAC DMA underrun interrupt */
-    __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
-    
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
-  }
-  
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-
-
-#endif /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-
-#if defined (STM32F051x8) || defined (STM32F058xx)
-
-HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-  
-  if(Channel == DAC_CHANNEL_1)
-  {
-    /* Check if software trigger enabled */
-    if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
-    {
-      /* Enable the selected DAC software conversion */
-      SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
-    }
-  }
- 
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-    
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables DAC and starts conversion of channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_CHANNEL_1: DAC Channel1 selected
-  * @param  pData The destination peripheral Buffer address.
-  * @param  Length The length of data to be transferred from memory to DAC peripheral
-  * @param  Alignment Specifies the data alignment for DAC channel.
-  *          This parameter can be one of the following values:
-  *            @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
-{
-  uint32_t tmpreg = 0U;
-    
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_ALIGN(Alignment));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Set the DMA transfer complete callback for channel1 */
-  hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
-  
-  /* Set the DMA half transfer complete callback for channel1 */
-  hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
-     
-  /* Set the DMA error callback for channel1 */
-  hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
-  
-  /* Enable the selected DAC channel1 DMA request */
-  SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
-
-  /* Case of use of channel 1 */
-  switch(Alignment)
-  {
-    case DAC_ALIGN_12B_R:
-      /* Get DHR12R1 address */
-      tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
-      break;
-    case DAC_ALIGN_12B_L:
-      /* Get DHR12L1 address */
-      tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
-      break;
-    case DAC_ALIGN_8B_R:
-      /* Get DHR8R1 address */
-      tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
-      break;
-    default:
-      break;
-  }
-
-  /* Enable the DMA channel */
-  /* Enable the DAC DMA underrun interrupt */
-  __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
-    
-  /* Enable the DMA channel */
-  HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
-  
-  /* Enable the DAC DMA underrun interrupt */
-  __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
-    
-  /* Enable the DMA channel */
-  HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
-    
-  /* Enable the Peripharal */
-  __HAL_DAC_ENABLE(hdac, Channel);
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-#endif  /* STM32F051x8 STM32F058xx */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-/* DAC channel 2 is available on top of DAC channel 1 */
-
-/**
-  * @brief  Handles DAC interrupt request  
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
-{
-  if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
-  { 
-    /* Check underrun channel 1 flag */
-    if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
-    {
-      /* Change DAC state to error state */
-      hdac->State = HAL_DAC_STATE_ERROR;
-    
-      /* Set DAC error code to channel1 DMA underrun error */
-      hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
-    
-      /* Clear the underrun flag */
-      __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
-    
-      /* Disable the selected DAC channel1 DMA request */
-      hdac->Instance->CR &= ~DAC_CR_DMAEN1;
-    
-      /* Error callback */ 
-      HAL_DAC_DMAUnderrunCallbackCh1(hdac);
-    }
-  }
-  if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
-  {
-    /* Check underrun channel 2 flag */
-    if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
-    { 
-      /* Change DAC state to error state */
-      hdac->State = HAL_DAC_STATE_ERROR;
-    
-      /* Set DAC error code to channel2 DMA underrun error */
-      hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
-    
-      /* Clear the underrun flag */
-      __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
-    
-      /* Disable the selected DAC channel1 DMA request */
-      hdac->Instance->CR &= ~DAC_CR_DMAEN2;
-    
-      /* Error callback */ 
-      HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
-    }
-  }
-}
-
-#endif  /* STM32F071xB  STM32F072xB  STM32F078xx */
-        /* STM32F091xC  STM32F098xx */
-
-#if defined (STM32F051x8) || defined (STM32F058xx)
-/* DAC channel 2 is NOT available. Only DAC channel 1 is available */
-
-/**
-  * @brief  Handles DAC interrupt request  
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
-{
-  if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
-  { 
-  /* Check Overrun flag */
-  if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
-    {
-      /* Change DAC state to error state */
-      hdac->State = HAL_DAC_STATE_ERROR;
-    
-      /* Set DAC error code to chanel1 DMA underrun error */
-      hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
-    
-      /* Clear the underrun flag */
-      __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
-    
-      /* Disable the selected DAC channel1 DMA request */
-      hdac->Instance->CR &= ~DAC_CR_DMAEN1;
-    
-      /* Error callback */ 
-      HAL_DAC_DMAUnderrunCallbackCh1(hdac);
-    }
-  }
-}
-
-#endif  /* STM32F051x8 STM32F058xx */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#if defined(STM32F051x8) || defined(STM32F058xx) || \
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/** @addtogroup DAC_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  DMA conversion complete callback. 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)   
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  HAL_DAC_ConvCpltCallbackCh1(hdac); 
-  
-  hdac->State= HAL_DAC_STATE_READY;
-}
-
-/**
-  * @brief  DMA half transfer complete callback. 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)   
-{
-    DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-    /* Conversion complete callback */
-    HAL_DAC_ConvHalfCpltCallbackCh1(hdac); 
-}
-
-/**
-  * @brief  DMA error callback 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)   
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-    
-  /* Set DAC error code to DMA error */
-  hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
-    
-  HAL_DAC_ErrorCallbackCh1(hdac); 
-    
-  hdac->State= HAL_DAC_STATE_READY;
-}
-/**
-  * @}
-  */
-#endif /* STM32F051x8  STM32F058xx */
-       /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/** @addtogroup DAC_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  DMA conversion complete callback. 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)   
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  HAL_DACEx_ConvCpltCallbackCh2(hdac); 
-  
-  hdac->State= HAL_DAC_STATE_READY;
-}
-
-/**
-  * @brief  DMA half transfer complete callback. 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)   
-{
-    DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-    /* Conversion complete callback */
-    HAL_DACEx_ConvHalfCpltCallbackCh2(hdac); 
-}
-
-/**
-  * @brief  DMA error callback 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)   
-{
-  DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-    
-  /* Set DAC error code to DMA error */
-  hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
-    
-  HAL_DACEx_ErrorCallbackCh2(hdac); 
-    
-  hdac->State= HAL_DAC_STATE_READY;
-}
-
-/**
-  * @}
-  */
-
-#endif /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-
-/**
-  * @}
-  */
-
-/** @defgroup DACEx DACEx
-  * @brief DACEx driver module
-  * @{
-  */ 
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup DACEx_Private_Macros DACEx Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
-  * @{
-  */
-
-/** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
- *  @brief    Extended features functions 
- *
-@verbatim   
-  ==============================================================================
-                 ##### Extended features functions #####
-  ==============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Start conversion.
-      (+) Stop conversion.
-      (+) Start conversion and enable DMA transfer.
-      (+) Stop conversion and disable DMA transfer.
-      (+) Get result of conversion.
-      (+) Get result of dual mode conversion.
-                     
-@endverbatim
-  * @{
-  */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx) 
-      
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval The selected DAC channel data output value.
-  */
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
-{
-  uint32_t tmp = 0U;
-  
-  tmp |= hdac->Instance->DOR1;
-
-  /* DAC channel 2 is present in DAC 1 */
-  tmp |= hdac->Instance->DOR2 << 16U;
-  
-  /* Returns the DAC channel data output register value */
-  return tmp;
-}
-
-#endif /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-
-#if defined (STM32F051x8) || defined (STM32F058xx)
-
-/**
-  * @brief  Returns the last data output value of the selected DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval The selected DAC channel data output value.
-  */
-uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
-{
-  uint32_t tmp = 0U;
-  
-  tmp |= hdac->Instance->DOR1;
-  
-  /* Returns the DAC channel data output register value */
-  return tmp;
-}
-
-#endif /* STM32F051x8 STM32F058xx */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/**
-  * @brief  Enables or disables the selected DAC channel wave generation.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            DAC_CHANNEL_1 / DAC_CHANNEL_2
-  * @param  Amplitude Select max triangle amplitude. 
-  *          This parameter can be one of the following values:
-  *            @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
-  *            @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
-  *            @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
-  *            @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
-  *            @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
-  *            @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
-  *            @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
-  *            @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
-  *            @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
-  *            @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
-  *            @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
-  *            @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095                               
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
-{  
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Enable the selected wave generation for the selected DAC channel */
-  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables or disables the selected DAC channel wave generation.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC. 
-  * @param  Channel The selected DAC channel. 
-  *          This parameter can be one of the following values:
-  *            DAC_CHANNEL_1 / DAC_CHANNEL_2
-  * @param  Amplitude Unmask DAC channel LFSR for noise wave generation. 
-  *          This parameter can be one of the following values: 
-  *            @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation  
-  *            @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
-  *            @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation 
-  *            @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
-{  
-  /* Check the parameters */
-  assert_param(IS_DAC_CHANNEL(Channel));
-  assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
-  
-  /* Process locked */
-  __HAL_LOCK(hdac);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_BUSY;
-  
-  /* Enable the selected wave generation for the selected DAC channel */
-  MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
-  
-  /* Change DAC state */
-  hdac->State = HAL_DAC_STATE_READY;
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdac);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-#endif   /* STM32F071xB  STM32F072xB  STM32F078xx */
-         /* STM32F091xC  STM32F098xx */
-  
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#if defined(STM32F051x8) || defined(STM32F058xx) || \
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/** @addtogroup DACEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DACEx_Exported_Functions_Group1
- *  @brief    Extended features functions
-   * @{
-  */
-
-/**
-  * @brief  Set the specified data holding register value for dual DAC channel.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *               the configuration information for the specified DAC.
-  * @param  Alignment Specifies the data alignment for dual channel DAC.
-  *          This parameter can be one of the following values:
-  *            DAC_ALIGN_8B_R: 8bit right data alignment selected
-  *            DAC_ALIGN_12B_L: 12bit left data alignment selected
-  *            DAC_ALIGN_12B_R: 12bit right data alignment selected
-  * @param  Data1 Data for DAC Channel2 to be loaded in the selected data holding register.
-  * @param  Data2 Data for DAC Channel1 to be loaded in the selected data  holding register.
-  * @note   In dual mode, a unique register access is required to write in both
-  *          DAC channels at the same time.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
-{  
-  uint32_t data = 0U, tmp = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_DAC_ALIGN(Alignment));
-  assert_param(IS_DAC_DATA(Data1));
-  assert_param(IS_DAC_DATA(Data2));
-  
-  /* Calculate and set dual DAC data holding register value */
-  if (Alignment == DAC_ALIGN_8B_R)
-  {
-    data = ((uint32_t)Data2 << 8U) | Data1; 
-  }
-  else
-  {
-    data = ((uint32_t)Data2 << 16U) | Data1;
-  }
-  
-  tmp = (uint32_t)hdac->Instance;
-  tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
-
-  /* Set the dual DAC selected data holding register */
-  *(__IO uint32_t *)tmp = data;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* STM32F051x8  STM32F058xx */
-       /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/** @addtogroup DACEx_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DACEx_Exported_Functions_Group1
- *  @brief    Extended features functions
-   * @{
-  */
-
-/**
-  * @brief  Conversion complete callback in non blocking mode for Channel2 
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_ConvCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Conversion half DMA transfer callback in non blocking mode for Channel2 
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_ConvHalfCpltCallbackCh2 could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Error DAC callback for Channel2.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_ErrorCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DMA underrun DAC callback for channel2.
-  * @param  hdac pointer to a DAC_HandleTypeDef structure that contains
-  *         the configuration information for the specified DAC.
-  * @retval None
-  */
-__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdac);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* STM32F071xB  STM32F072xB  STM32F078xx */
-       /* STM32F091xC  STM32F098xx */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_dma.c b/lib/hal-stm32f0/source/stm32f0xx_hal_dma.c
deleted file mode 100644
index 9bd69a01..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_dma.c
+++ /dev/null
@@ -1,905 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_dma.c
-  * @author  MCD Application Team
-  * @brief   DMA HAL module driver.
-  *    
-  *         This file provides firmware functions to manage the following 
-  *         functionalities of the Direct Memory Access (DMA) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and errors functions
-  @verbatim     
-  ==============================================================================      
-                        ##### How to use this driver #####
-  ============================================================================== 
-  [..]
-   (#) Enable and configure the peripheral to be connected to the DMA Channel
-       (except for internal SRAM / FLASH memories: no initialization is 
-       necessary). Please refer to Reference manual for connection between peripherals
-       and DMA requests .
-
-   (#) For a given Channel, program the required configuration through the following parameters:   
-       Transfer Direction, Source and Destination data formats, 
-       Circular or Normal mode, Channel Priority level, Source and Destination Increment mode, 
-       using HAL_DMA_Init() function.
-
-   (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error 
-       detection.
-                    
-   (#) Use HAL_DMA_Abort() function to abort the current transfer
-                   
-     -@-   In Memory-to-Memory transfer mode, Circular mode is not allowed.
-     *** Polling mode IO operation ***
-     =================================   
-    [..] 
-      (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source 
-          address and destination address and the Length of data to be transferred
-      (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this  
-          case a fixed Timeout can be configured by User depending from his application.
-
-     *** Interrupt mode IO operation ***    
-     =================================== 
-    [..]
-      (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
-      (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() 
-      (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of  
-          Source address and destination address and the Length of data to be transferred. 
-          In this case the DMA interrupt is configured 
-      (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
-      (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can 
-          add his own function by customization of function pointer XferCpltCallback and 
-          XferErrorCallback (i.e a member of DMA handle structure). 
-
-     *** DMA HAL driver macros list ***
-     ============================================= 
-     [..]
-       Below the list of most used macros in DMA HAL driver.
-
-     [..] 
-      (@) You can refer to the DMA HAL driver header file for more useful macros  
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-
-/** @defgroup DMA DMA
-  * @brief DMA HAL module driver
-  * @{
-  */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup DMA_Private_Functions DMA Private Functions
-  * @{
-  */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup DMA_Exported_Functions DMA Exported Functions
-  * @{
-  */
-
-/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief   Initialization and de-initialization functions 
- *
-@verbatim   
- ===============================================================================
-             ##### Initialization and de-initialization functions  #####
- ===============================================================================  
-    [..]
-    This section provides functions allowing to initialize the DMA Channel source
-    and destination addresses, incrementation and data sizes, transfer direction, 
-    circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
-    [..]
-    The HAL_DMA_Init() function follows the DMA configuration procedures as described in
-    reference manual.  
-
-@endverbatim
-  * @{
-  */
-  
-/**
-  * @brief  Initialize the DMA according to the specified
-  *         parameters in the DMA_InitTypeDef and initialize the associated handle.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
-{ 
-  uint32_t tmp = 0U;
-  
-  /* Check the DMA handle allocation */
-  if(NULL == hdma)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
-  assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
-  assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
-  assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
-  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
-  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
-  assert_param(IS_DMA_MODE(hdma->Init.Mode));
-  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
-  
-  /* Change DMA peripheral state */
-  hdma->State = HAL_DMA_STATE_BUSY;
-
-  /* Get the CR register value */
-  tmp = hdma->Instance->CCR;
-  
-  /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
-  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
-                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
-                      DMA_CCR_DIR));
-  
-  /* Prepare the DMA Channel configuration */
-  tmp |=  hdma->Init.Direction        |
-          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
-          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
-          hdma->Init.Mode                | hdma->Init.Priority;
-
-  /* Write to DMA Channel CR register */
-  hdma->Instance->CCR = tmp;  
-  
-  /* Initialize DmaBaseAddress and ChannelIndex parameters used 
-     by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
-  DMA_CalcBaseAndBitshift(hdma);
-  
-  /* Clean callbacks */
-  hdma->XferCpltCallback = NULL;
-  hdma->XferHalfCpltCallback = NULL;
-  hdma->XferErrorCallback = NULL;
-  hdma->XferAbortCallback = NULL;
-  
-  /* Initialise the error code */
-  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
-  /* Initialize the DMA state*/
-  hdma->State = HAL_DMA_STATE_READY;
-  
-  /* Allocate lock resource and initialize it */
-  hdma->Lock = HAL_UNLOCKED;
-  
-  return HAL_OK;
-}  
-  
-/**
-  * @brief  DeInitialize the DMA peripheral 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
-{
-  /* Check the DMA handle allocation */
-  if(NULL == hdma)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
-
-  /* Disable the selected DMA Channelx */
-  hdma->Instance->CCR &= ~DMA_CCR_EN;
-
-  /* Reset DMA Channel control register */
-  hdma->Instance->CCR  = 0U;
-
-  /* Reset DMA Channel Number of Data to Transfer register */
-  hdma->Instance->CNDTR = 0U;
-
-  /* Reset DMA Channel peripheral address register */
-  hdma->Instance->CPAR  = 0U;
-  
-  /* Reset DMA Channel memory address register */
-  hdma->Instance->CMAR = 0U;
-
-/* Get DMA Base Address */  
-  DMA_CalcBaseAndBitshift(hdma);
-
-  /* Clear all flags */
-  hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
-
-  /* Initialize the error code */
-  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-
-  /* Initialize the DMA state */
-  hdma->State = HAL_DMA_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hdma);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions 
- *  @brief   I/O operation functions  
- *
-@verbatim   
- ===============================================================================
-                      #####  IO operation functions  #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure the source, destination address and data length and Start DMA transfer
-      (+) Configure the source, destination address and data length and 
-          Start DMA transfer with interrupt
-      (+) Abort DMA transfer
-      (+) Poll for transfer complete
-      (+) Handle DMA interrupt request  
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Start the DMA Transfer.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA Channel.  
-  * @param  SrcAddress The source memory Buffer address
-  * @param  DstAddress The destination memory Buffer address
-  * @param  DataLength The length of data to be transferred from source to destination
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
-	HAL_StatusTypeDef status = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-  
-  /* Process locked */
-  __HAL_LOCK(hdma);
-  
-  if(HAL_DMA_STATE_READY == hdma->State)
-  {
-  	/* Change DMA peripheral state */  
-  	hdma->State = HAL_DMA_STATE_BUSY;
-  	
-  	hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-  	
-  	/* Disable the peripheral */
-  	hdma->Instance->CCR &= ~DMA_CCR_EN;  
-  	
-  	/* Configure the source, destination address and the data length */
-  	DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
-  	
-  	/* Enable the Peripheral */
-  	hdma->Instance->CCR |= DMA_CCR_EN;  
-  }
-  else
-  {
-  	/* Process Unlocked */
-  	__HAL_UNLOCK(hdma);
-  	
-  	/* Remain BUSY */
-  	status = HAL_BUSY;
-  }  
-
-  return status; 
-} 
-
-/**
-  * @brief  Start the DMA Transfer with interrupt enabled.
-  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Channel.  
-  * @param  SrcAddress The source memory Buffer address
-  * @param  DstAddress The destination memory Buffer address
-  * @param  DataLength The length of data to be transferred from source to destination
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
-	HAL_StatusTypeDef status = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
-  
-  /* Process locked */
-  __HAL_LOCK(hdma);
-  
-  if(HAL_DMA_STATE_READY == hdma->State)
-  {
-  	/* Change DMA peripheral state */  
-  	hdma->State = HAL_DMA_STATE_BUSY;
-  	
-  	hdma->ErrorCode = HAL_DMA_ERROR_NONE;
-  	
-  	/* Disable the peripheral */
-  	hdma->Instance->CCR &= ~DMA_CCR_EN;
-  	
-  	/* Configure the source, destination address and the data length */  
-  	DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
-  	
-  	/* Enable the transfer complete, & transfer error interrupts */
-  	/* Half transfer interrupt is optional: enable it only if associated callback is available */
-    if(NULL != hdma->XferHalfCpltCallback )
-    {
-      hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
-    }
-  	else
-  	{
-  		hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE);
-  		hdma->Instance->CCR &= ~DMA_IT_HT;
-  	}
-  	
-  	/* Enable the Peripheral */
-  	hdma->Instance->CCR |= DMA_CCR_EN;
-  }
-  else
-  {
-  	/* Process Unlocked */
-    __HAL_UNLOCK(hdma); 
-  
-    /* Remain BUSY */
-    status = HAL_BUSY;
-  }     
-  
-  return status;    
-} 
-
-/**
-  * @brief  Abort the DMA Transfer.
-  * @param  hdma  pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.                  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
-{
-	/* Disable DMA IT */
-	 hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
-	
-	/* Disable the channel */
-	hdma->Instance->CCR &= ~DMA_CCR_EN;
-	
-	/* Clear all flags */
-	hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex);
-	
-	/* Change the DMA state*/
-	hdma->State = HAL_DMA_STATE_READY; 
-	
-	/* Process Unlocked */
-	__HAL_UNLOCK(hdma);
-	
-	return HAL_OK; 
-}
-
-/**
-  * @brief  Abort the DMA Transfer in Interrupt mode.
-  * @param  hdma  pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Stream.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
-{  
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  if(HAL_DMA_STATE_BUSY != hdma->State)
-  {
-    /* no transfer ongoing */
-    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
-        
-    status = HAL_ERROR;
-  }
-  else
-  { 
-  
-    /* Disable DMA IT */
-    hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
-    
-    /* Disable the channel */
-    hdma->Instance->CCR &= ~DMA_CCR_EN;
-    
-    /* Clear all flags */
-    hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
-    
-    /* Change the DMA state */
-    hdma->State = HAL_DMA_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hdma);
-    
-    /* Call User Abort callback */ 
-    if(hdma->XferAbortCallback != NULL)
-    {
-      hdma->XferAbortCallback(hdma);
-    } 
-  }
-  return status;
-}
-
-/**
-  * @brief  Polling for transfer complete.
-  * @param  hdma    pointer to a DMA_HandleTypeDef structure that contains
-  *                  the configuration information for the specified DMA Channel.
-  * @param  CompleteLevel Specifies the DMA level complete.  
-  * @param  Timeout       Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
-{
-  uint32_t temp;
-  uint32_t tickstart = 0U;
-  
-  if(HAL_DMA_STATE_BUSY != hdma->State)
-  {
-    /* no transfer ongoing */
-    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
-    __HAL_UNLOCK(hdma);
-    return HAL_ERROR;
-  }
-  
-  /* Polling mode not supported in circular mode */
-  if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
-  {
-    hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
-    return HAL_ERROR;
-  }
-  
-  /* Get the level transfer complete flag */
-  if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
-  {
-    /* Transfer Complete flag */
-    temp = DMA_FLAG_TC1 << hdma->ChannelIndex;
-  }
-  else
-  {
-    /* Half Transfer Complete flag */
-    temp = DMA_FLAG_HT1 << hdma->ChannelIndex;
-  }
-
-  /* Get tick */
-  tickstart = HAL_GetTick();
-
-  while(RESET == (hdma->DmaBaseAddress->ISR & temp))
-  {
-    if(RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex)))
-    {      
-      /* When a DMA transfer error occurs */
-      /* A hardware clear of its EN bits is performed */
-      /* Clear all flags */
-      hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
-      
-      /* Update error code */
-      hdma->ErrorCode = HAL_DMA_ERROR_TE;
-
-      /* Change the DMA state */
-      hdma->State= HAL_DMA_STATE_READY;       
-      
-      /* Process Unlocked */
-      __HAL_UNLOCK(hdma);
-      
-      return HAL_ERROR;      
-    }      
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        /* Update error code */
-        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
-        
-        /* Change the DMA state */
-        hdma->State = HAL_DMA_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hdma);
-
-        return HAL_ERROR;
-      }
-    }
-  }
-
-  if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
-  {
-    /* Clear the transfer complete flag */
-    hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex;
-
-    /* The selected Channelx EN bit is cleared (DMA is disabled and 
-    all transfers are complete) */
-    hdma->State = HAL_DMA_STATE_READY;
-  }
-  else
-  { 
-    /* Clear the half transfer complete flag */
-    hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex;
-  }
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(hdma);  
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle DMA interrupt request.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval None
-  */
-void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
-{
-	uint32_t flag_it = hdma->DmaBaseAddress->ISR;
-  uint32_t source_it = hdma->Instance->CCR;
-          
-  /* Half Transfer Complete Interrupt management ******************************/
-  if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT)))
-  {
-  	/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
-  	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-  	{
-  		/* Disable the half transfer interrupt */
-  		hdma->Instance->CCR &= ~DMA_IT_HT;
-  	}
-  	
-  	/* Clear the half transfer complete flag */
-  	hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex;
-  	
-  	/* DMA peripheral state is not updated in Half Transfer */
-  	/* State is updated only in Transfer Complete case */
-  	
-  	if(hdma->XferHalfCpltCallback != NULL)
-  	{
-  		/* Half transfer callback */
-  		hdma->XferHalfCpltCallback(hdma);
-  	}
-  }
-  
-  /* Transfer Complete Interrupt management ***********************************/
-  else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC)))
-  {
-  	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-  	{
-  		/* Disable the transfer complete  & transfer error interrupts */
-  		/* if the DMA mode is not CIRCULAR */
-  		hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE);
-  		
-  		/* Change the DMA state */
-  		hdma->State = HAL_DMA_STATE_READY;
-  	}
-  	
-  	/* Clear the transfer complete flag */
-  	hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex;
-  	
-  	/* Process Unlocked */
-  	__HAL_UNLOCK(hdma);
-  	
-  	if(hdma->XferCpltCallback != NULL)
-  	{
-  		/* Transfer complete callback */
-  		hdma->XferCpltCallback(hdma);
-  	}
-  }
-  
-  /* Transfer Error Interrupt management ***************************************/
-  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
-  {
-  	/* When a DMA transfer error occurs */
-    /* A hardware clear of its EN bits is performed */
-    /* Then, disable all DMA interrupts */
-    hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE);
-    
-    /* Clear all flags */
-    hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex;
-    
-    /* Update error code */
-    hdma->ErrorCode = HAL_DMA_ERROR_TE;
-    
-    /* Change the DMA state */
-    hdma->State = HAL_DMA_STATE_READY;    
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hdma); 
-    
-    if(hdma->XferErrorCallback != NULL)
-    {
-    	/* Transfer error callback */
-    	hdma->XferErrorCallback(hdma);
-    }
-   }
-}  
-
-/**
-  * @brief  Register callbacks
-  * @param  hdma                 pointer to a DMA_HandleTypeDef structure that contains
-  *                               the configuration information for the specified DMA Stream.
-  * @param  CallbackID           User Callback identifer
-  *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
-  * @param  pCallback            pointer to private callback function which has pointer to 
-  *                               a DMA_HandleTypeDef structure as parameter.
-  * @retval HAL status
-  */                          
-HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Process locked */
-  __HAL_LOCK(hdma);
-  
-  if(HAL_DMA_STATE_READY == hdma->State)
-  {
-    switch (CallbackID)
-    {
-     case  HAL_DMA_XFER_CPLT_CB_ID:
-           hdma->XferCpltCallback = pCallback;
-           break;
-       
-     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
-           hdma->XferHalfCpltCallback = pCallback;
-           break;         
-
-     case  HAL_DMA_XFER_ERROR_CB_ID:
-           hdma->XferErrorCallback = pCallback;
-           break;         
-           
-     case  HAL_DMA_XFER_ABORT_CB_ID:
-           hdma->XferAbortCallback = pCallback;
-           break; 
-           
-     default:
-           status = HAL_ERROR;
-           break;                                                            
-    }
-  }
-  else
-  {
-    status = HAL_ERROR;
-  } 
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hdma);
-  
-  return status;
-}
-
-/**
-  * @brief  UnRegister callbacks
-  * @param  hdma                 pointer to a DMA_HandleTypeDef structure that contains
-  *                               the configuration information for the specified DMA Stream.
-  * @param  CallbackID           User Callback identifer
-  *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
-  * @retval HAL status
-  */              
-HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-    /* Process locked */
-  __HAL_LOCK(hdma);
-  
-  if(HAL_DMA_STATE_READY == hdma->State)
-  {
-    switch (CallbackID)
-    {
-     case  HAL_DMA_XFER_CPLT_CB_ID:
-           hdma->XferCpltCallback = NULL;
-           break;
-       
-     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
-           hdma->XferHalfCpltCallback = NULL;
-           break;         
-
-     case  HAL_DMA_XFER_ERROR_CB_ID:
-           hdma->XferErrorCallback = NULL;
-           break;         
-           
-     case  HAL_DMA_XFER_ABORT_CB_ID:
-           hdma->XferAbortCallback = NULL;
-           break; 
-     
-    case   HAL_DMA_XFER_ALL_CB_ID:
-           hdma->XferCpltCallback = NULL;
-           hdma->XferHalfCpltCallback = NULL;
-           hdma->XferErrorCallback = NULL;
-           hdma->XferAbortCallback = NULL;
-           break; 
-     
-    default:
-           status = HAL_ERROR;
-           break;                                                            
-    }
-  }
-  else
-  {
-    status = HAL_ERROR;
-  } 
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hdma);
-  
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
- *  @brief    Peripheral State functions 
- *
-@verbatim   
- ===============================================================================
-                    ##### State and Errors functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Check the DMA state
-      (+) Get error code
-
-@endverbatim
-  * @{
-  */  
-
-/**
-  * @brief  Returns the DMA state.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.  
-  * @retval HAL state
-  */
-HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
-{
-  return hdma->State;
-}
-
-/**
-  * @brief  Return the DMA error code
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA Channel.
-  * @retval DMA Error Code
-  */
-uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
-{
-  return hdma->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup DMA_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Set the DMA Transfer parameters.
-  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Channel.  
-  * @param  SrcAddress The source memory Buffer address
-  * @param  DstAddress The destination memory Buffer address
-  * @param  DataLength The length of data to be transferred from source to destination
-  * @retval HAL status
-  */
-static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
-{
-	/* Clear all flags */
-  hdma->DmaBaseAddress->IFCR  = (DMA_FLAG_GL1 << hdma->ChannelIndex);
-  
-  /* Configure DMA Channel data length */
-  hdma->Instance->CNDTR = DataLength;
-  
-  /* Memory to Peripheral */
-  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
-  {   
-    /* Configure DMA Channel destination address */
-    hdma->Instance->CPAR = DstAddress;
-    
-    /* Configure DMA Channel source address */
-    hdma->Instance->CMAR = SrcAddress;
-  }
-  /* Peripheral to Memory */
-  else
-  {
-    /* Configure DMA Channel source address */
-    hdma->Instance->CPAR = SrcAddress;
-    
-    /* Configure DMA Channel destination address */
-    hdma->Instance->CMAR = DstAddress;
-  }
-}
-
-/**
-  * @brief  set the DMA base address and channel index depending on DMA instance
-  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
-  *                     the configuration information for the specified DMA Stream. 
-  * @retval None
-  */
-static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
-{
-#if defined (DMA2)
-  /* calculation of the channel index */
-  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
-  {
-    /* DMA1 */
-    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
-    hdma->DmaBaseAddress = DMA1;
-  }
-  else 
-  {
-    /* DMA2 */
-    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;
-    hdma->DmaBaseAddress = DMA2;
-  }
-#else
-  /* calculation of the channel index */
-  /* DMA1 */
-  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
-  hdma->DmaBaseAddress = DMA1;
-#endif
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-  
-  /**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_flash.c b/lib/hal-stm32f0/source/stm32f0xx_hal_flash.c
deleted file mode 100644
index 167bb4bb..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_flash.c
+++ /dev/null
@@ -1,706 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_flash.c
-  * @author  MCD Application Team
-  * @brief   FLASH HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the internal FLASH memory:
-  *           + Program operations functions
-  *           + Memory Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-                        ##### FLASH peripheral features #####
-  ==============================================================================
-  [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses 
-       to the Flash memory. It implements the erase and program Flash memory operations 
-       and the read and write protection mechanisms.
-
-  [..] The Flash memory interface accelerates code execution with a system of instruction
-      prefetch. 
-
-  [..] The FLASH main features are:
-      (+) Flash memory read operations
-      (+) Flash memory program/erase operations
-      (+) Read / write protections
-      (+) Prefetch on I-Code
-      (+) Option Bytes programming
-
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..]                             
-      This driver provides functions and macros to configure and program the FLASH 
-      memory of all STM32F0xx devices.
-    
-      (#) FLASH Memory I/O Programming functions: this group includes all needed
-          functions to erase and program the main memory:
-        (++) Lock and Unlock the FLASH interface
-        (++) Erase function: Erase page, erase all pages
-        (++) Program functions: half word, word and doubleword
-      (#) FLASH Option Bytes Programming functions: this group includes all needed
-          functions to manage the Option Bytes:
-        (++) Lock and Unlock the Option Bytes
-        (++) Set/Reset the write protection
-        (++) Set the Read protection Level
-        (++) Program the user Option Bytes
-        (++) Launch the Option Bytes loader
-        (++) Erase Option Bytes
-        (++) Program the data Option Bytes
-        (++) Get the Write protection.
-        (++) Get the user option bytes.
-    
-      (#) Interrupts and flags management functions : this group 
-          includes all needed functions to:
-        (++) Handle FLASH interrupts
-        (++) Wait for last FLASH operation according to its status
-        (++) Get error flag status
-
-  [..] In addition to these function, this driver includes a set of macros allowing
-       to handle the following operations:
-      
-      (+) Set/Get the latency
-      (+) Enable/Disable the prefetch buffer
-      (+) Enable/Disable the FLASH interrupts
-      (+) Monitor the FLASH flags status
-          
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-
-/** @defgroup FLASH FLASH
-  * @brief FLASH HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup FLASH_Private_Constants FLASH Private Constants
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private macro ---------------------------- ---------------------------------*/
-/** @defgroup FLASH_Private_Macros FLASH Private Macros
-  * @{
-  */
- 
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup FLASH_Private_Variables FLASH Private Variables
-  * @{
-  */
-/* Variables used for Erase pages under interruption*/
-FLASH_ProcessTypeDef pFlash;
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup FLASH_Private_Functions FLASH Private Functions
-  * @{
-  */
-static  void   FLASH_Program_HalfWord(uint32_t Address, uint16_t Data);
-static  void   FLASH_SetErrorCode(void);
-extern void    FLASH_PageErase(uint32_t PageAddress);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-/** @defgroup FLASH_Exported_Functions FLASH Exported Functions
-  * @{
-  */
-  
-/** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions 
-  *  @brief   Programming operation functions 
-  *
-@verbatim   
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Program halfword, word or double word at a specified address
-  * @note   The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
-  *         The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
-  *
-  * @note   If an erase and a program operations are requested simultaneously,    
-  *         the erase operation is performed before the program one.
-  *  
-  * @note   FLASH should be previously erased before new programmation (only exception to this 
-  *         is when 0x0000 is programmed)
-  *
-  * @param  TypeProgram   Indicate the way to program at a specified address.
-  *                       This parameter can be a value of @ref FLASH_Type_Program
-  * @param  Address       Specifie the address to be programmed.
-  * @param  Data          Specifie the data to be programmed
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  uint8_t index = 0U;
-  uint8_t nbiterations = 0U;
-  
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
-  assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
-
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
-    {
-      /* Program halfword (16-bit) at a specified address. */
-      nbiterations = 1U;
-    }
-    else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
-    {
-      /* Program word (32-bit = 2*16-bit) at a specified address. */
-      nbiterations = 2U;
-    }
-    else
-    {
-      /* Program double word (64-bit = 4*16-bit) at a specified address. */
-      nbiterations = 4U;
-    }
-
-    for (index = 0U; index < nbiterations; index++)
-    {
-      FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
-
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
-    
-        /* If the program operation is completed, disable the PG Bit */
-        CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
-      /* In case of error, stop programation procedure */
-      if (status != HAL_OK)
-      {
-        break;
-      }
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(&pFlash);
-
-  return status;
-}
-
-/**
-  * @brief  Program halfword, word or double word at a specified address  with interrupt enabled.
-  * @note   The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
-  *         The function HAL_FLASH_Lock() should be called after to lock the FLASH interface
-  *
-  * @note   If an erase and a program operations are requested simultaneously,    
-  *         the erase operation is performed before the program one.
-  *
-  * @param  TypeProgram  Indicate the way to program at a specified address.
-  *                      This parameter can be a value of @ref FLASH_Type_Program
-  * @param  Address      Specifie the address to be programmed.
-  * @param  Data         Specifie the data to be programmed
-  * 
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram));
-  assert_param(IS_FLASH_PROGRAM_ADDRESS(Address));
-
-  /* Enable End of FLASH Operation and Error source interrupts */
-  __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
-  
-  pFlash.Address = Address;
-  pFlash.Data = Data;
-
-  if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
-  {
-    pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD;
-    /* Program halfword (16-bit) at a specified address. */
-    pFlash.DataRemaining = 1U;
-  }
-  else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
-  {
-    pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD;
-    /* Program word (32-bit : 2*16-bit) at a specified address. */
-    pFlash.DataRemaining = 2U;
-  }
-  else
-  {
-    pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD;
-    /* Program double word (64-bit : 4*16-bit) at a specified address. */
-    pFlash.DataRemaining = 4U;
-  }
-
-  /* Program halfword (16-bit) at a specified address. */
-  FLASH_Program_HalfWord(Address, (uint16_t)Data);
-
-  return status;
-}
-
-/**
-  * @brief This function handles FLASH interrupt request.
-  * @retval None
-  */
-void HAL_FLASH_IRQHandler(void)
-{
-  uint32_t addresstmp = 0U;
-  
-  /* Check FLASH operation error flags */
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
-  {
-    /* Return the faulty address */
-    addresstmp = pFlash.Address;
-    /* Reset address */
-    pFlash.Address = 0xFFFFFFFFU;
-  
-    /* Save the Error code */
-    FLASH_SetErrorCode();
-    
-    /* FLASH error interrupt user callback */
-    HAL_FLASH_OperationErrorCallback(addresstmp);
-
-    /* Stop the procedure ongoing */
-    pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-  }
-
-  /* Check FLASH End of Operation flag  */
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
-  {
-    /* Clear FLASH End of Operation pending bit */
-    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
-    
-    /* Process can continue only if no error detected */
-    if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
-    {
-      if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE)
-      {
-        /* Nb of pages to erased can be decreased */
-        pFlash.DataRemaining--;
-
-        /* Check if there are still pages to erase */
-        if(pFlash.DataRemaining != 0U)
-        {
-          addresstmp = pFlash.Address;
-          /*Indicate user which sector has been erased */
-          HAL_FLASH_EndOfOperationCallback(addresstmp);
-
-          /*Increment sector number*/
-          addresstmp = pFlash.Address + FLASH_PAGE_SIZE;
-          pFlash.Address = addresstmp;
-
-          /* If the erase operation is completed, disable the PER Bit */
-          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
-
-          FLASH_PageErase(addresstmp);
-        }
-        else
-        {
-          /* No more pages to Erase, user callback can be called. */
-          /* Reset Sector and stop Erase pages procedure */
-          pFlash.Address = addresstmp = 0xFFFFFFFFU;
-          pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-          /* FLASH EOP interrupt user callback */
-          HAL_FLASH_EndOfOperationCallback(addresstmp);
-        }
-      }
-      else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE)
-      {
-        /* Operation is completed, disable the MER Bit */
-        CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
-
-          /* MassErase ended. Return the selected bank */
-          /* FLASH EOP interrupt user callback */
-          HAL_FLASH_EndOfOperationCallback(0);
-
-          /* Stop Mass Erase procedure*/
-          pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-        }
-      else
-      {
-        /* Nb of 16-bit data to program can be decreased */
-        pFlash.DataRemaining--;
-        
-        /* Check if there are still 16-bit data to program */
-        if(pFlash.DataRemaining != 0U)
-        {
-          /* Increment address to 16-bit */
-          pFlash.Address += 2;
-          addresstmp = pFlash.Address;
-          
-          /* Shift to have next 16-bit data */
-          pFlash.Data = (pFlash.Data >> 16U);
-          
-          /* Operation is completed, disable the PG Bit */
-          CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
-
-          /*Program halfword (16-bit) at a specified address.*/
-          FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data);
-        }
-        else
-        {
-          /* Program ended. Return the selected address */
-          /* FLASH EOP interrupt user callback */
-          if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD)
-          {
-            HAL_FLASH_EndOfOperationCallback(pFlash.Address);
-          }
-          else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD)
-          {
-            HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2U);
-          }
-          else 
-          {
-            HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6U);
-          }
-        
-          /* Reset Address and stop Program procedure */
-          pFlash.Address = 0xFFFFFFFFU;
-          pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-        }
-      }
-    }
-  }
-  
-
-  if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE)
-  {
-    /* Operation is completed, disable the PG, PER and MER Bits */
-    CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_PER | FLASH_CR_MER));
-
-    /* Disable End of FLASH Operation and Error source interrupts */
-    __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(&pFlash);
-  }
-}
-
-/**
-  * @brief  FLASH end of operation interrupt callback
-  * @param  ReturnValue The value saved in this parameter depends on the ongoing procedure
-  *                 - Mass Erase: No return value expected
-  *                 - Pages Erase: Address of the page which has been erased 
-  *                    (if 0xFFFFFFFF, it means that all the selected pages have been erased)
-  *                 - Program: Address which was selected for data program
-  * @retval none
-  */
-__weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(ReturnValue);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_FLASH_EndOfOperationCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  FLASH operation error interrupt callback
-  * @param  ReturnValue The value saved in this parameter depends on the ongoing procedure
-  *                 - Mass Erase: No return value expected
-  *                 - Pages Erase: Address of the page which returned an error
-  *                 - Program: Address which was selected for data program
-  * @retval none
-  */
-__weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(ReturnValue);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_FLASH_OperationErrorCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions 
- *  @brief   management functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the FLASH 
-    memory operations.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Unlock the FLASH control register access
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Unlock(void)
-{
-  if (HAL_IS_BIT_SET(FLASH->CR, FLASH_CR_LOCK))
-  {
-    /* Authorize the FLASH Registers access */
-    WRITE_REG(FLASH->KEYR, FLASH_KEY1);
-    WRITE_REG(FLASH->KEYR, FLASH_KEY2);
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-
-  return HAL_OK; 
-}
-
-/**
-  * @brief  Locks the FLASH control register access
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_Lock(void)
-{
-  /* Set the LOCK Bit to lock the FLASH Registers access */
-  SET_BIT(FLASH->CR, FLASH_CR_LOCK);
-  
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Unlock the FLASH Option Control Registers access.
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void)
-{
-  if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE))
-  {
-    /* Authorizes the Option Byte register programming */
-    WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1);
-    WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2);
-  }
-  else
-  {
-    return HAL_ERROR;
-  }  
-  
-  return HAL_OK;  
-}
-
-/**
-  * @brief  Lock the FLASH Option Control Registers access.
-  * @retval HAL Status 
-  */
-HAL_StatusTypeDef HAL_FLASH_OB_Lock(void)
-{
-  /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */
-  CLEAR_BIT(FLASH->CR, FLASH_CR_OPTWRE);
-  
-  return HAL_OK;  
-}
-  
-/**
-  * @brief  Launch the option byte loading.
-  * @note   This function will reset automatically the MCU.
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASH_OB_Launch(void)
-{
-  /* Set the OBL_Launch bit to launch the option byte loading */
-  SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH);
-  
-  /* Wait for last operation to be completed */
-  return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE));
-}
-
-/**
-  * @}
-  */  
-
-/** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions 
- *  @brief    Peripheral errors functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Errors functions #####
- ===============================================================================  
-    [..]
-    This subsection permit to get in run-time errors of  the FLASH peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Get the specific FLASH error flag.
-  * @retval FLASH_ErrorCode The returned value can be:
-  *            @ref FLASH_Error_Codes
-  */
-uint32_t HAL_FLASH_GetError(void)
-{
-   return pFlash.ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH_Private_Functions
- * @{
- */
-
-/**
-  * @brief  Program a half-word (16-bit) at a specified address.
-  * @param  Address specify the address to be programmed.
-  * @param  Data    specify the data to be programmed.
-  * @retval None
-  */
-static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
-{
-  /* Clean the error context */
-  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-  
-    /* Proceed to program the new data */
-    SET_BIT(FLASH->CR, FLASH_CR_PG);
-
-  /* Write data in the address */
-  *(__IO uint16_t*)Address = Data;
-}
-
-/**
-  * @brief  Wait for a FLASH operation to complete.
-  * @param  Timeout  maximum flash operation timeout
-  * @retval HAL Status
-  */
-HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
-{
-  /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
-     Even if the FLASH operation fails, the BUSY flag will be reset and an error
-     flag will be set */
-     
-  uint32_t tickstart = HAL_GetTick();
-     
-  while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 
-  { 
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  
-  /* Check FLASH End of Operation flag  */
-  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
-  {
-    /* Clear FLASH End of Operation pending bit */
-    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
-  }
-  
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)  || 
-     __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
-  {
-    /*Save the error code*/
-    FLASH_SetErrorCode();
-    return HAL_ERROR;
-  }
-
-  /* There is no error flag set */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Set the specific FLASH error flag.
-  * @retval None
-  */
-static void FLASH_SetErrorCode(void)
-{
-  uint32_t flags = 0U;
-  
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
-    flags |= FLASH_FLAG_WRPERR;
-  }
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
-    flags |= FLASH_FLAG_PGERR;
-  }
-  /* Clear FLASH error pending bits */
-  __HAL_FLASH_CLEAR_FLAG(flags);
-}  
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_flash_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_flash_ex.c
deleted file mode 100644
index 3c2041cf..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_flash_ex.c
+++ /dev/null
@@ -1,1000 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_flash_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended FLASH HAL module driver.
-  *    
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the FLASH peripheral:
-  *           + Extended Initialization/de-initialization functions
-  *           + Extended I/O operation functions
-  *           + Extended Peripheral Control functions 
-  *         
-  @verbatim
-  ==============================================================================
-               ##### Flash peripheral extended features  #####
-  ==============================================================================
-           
-                      ##### How to use this driver #####
-  ==============================================================================
-  [..] This driver provides functions to configure and program the FLASH memory 
-       of all STM32F0xxx devices. It includes
-       
-        (++) Set/Reset the write protection
-        (++) Program the user Option Bytes
-        (++) Get the Read protection Level
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-#ifdef HAL_FLASH_MODULE_ENABLED
-
-/** @addtogroup FLASH
-  * @{
-  */
-/** @addtogroup FLASH_Private_Variables
- * @{
- */
-/* Variables used for Erase pages under interruption*/
-extern FLASH_ProcessTypeDef pFlash;
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/** @defgroup FLASHEx FLASHEx
-  * @brief FLASH HAL Extension module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants
- * @{
- */
-#define FLASH_POSITION_IWDGSW_BIT        8U
-#define FLASH_POSITION_OB_USERDATA0_BIT  16U
-#define FLASH_POSITION_OB_USERDATA1_BIT  24U
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros
-  * @{
-  */
-/**
-  * @}
-  */ 
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
- * @{
- */
-/* Erase operations */
-static void              FLASH_MassErase(void);
-void    FLASH_PageErase(uint32_t PageAddress);
-
-/* Option bytes control */
-static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage);
-static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage);
-static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel);
-static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig);
-static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
-static uint32_t          FLASH_OB_GetWRP(void);
-static uint32_t          FLASH_OB_GetRDP(void);
-static uint8_t           FLASH_OB_GetUser(void);
-
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
-  * @{
-  */
-  
-/** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions
- *  @brief   FLASH Memory Erasing functions
-  *
-@verbatim   
-  ==============================================================================
-                ##### FLASH Erasing Programming functions ##### 
-  ==============================================================================
-
-    [..] The FLASH Memory Erasing functions, includes the following functions:
-    (+) @ref HAL_FLASHEx_Erase: return only when erase has been done
-    (+) @ref HAL_FLASHEx_Erase_IT: end of erase is done when @ref HAL_FLASH_EndOfOperationCallback 
-        is called with parameter 0xFFFFFFFF
-
-    [..] Any operation of erase should follow these steps:
-    (#) Call the @ref HAL_FLASH_Unlock() function to enable the flash control register and 
-        program memory access.
-    (#) Call the desired function to erase page.
-    (#) Call the @ref HAL_FLASH_Lock() to disable the flash program memory access 
-       (recommended to protect the FLASH memory against possible unwanted operation).
-
-@endverbatim
-  * @{
-  */
-  
-
-/**
-  * @brief  Perform a mass erase or erase the specified FLASH memory pages
-  * @note   To correctly run this function, the @ref HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASH_Lock() to disable the flash memory access 
-  *         (recommended to protect the FLASH memory against possible unwanted operation)
-  * @param[in]  pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
-  *         contains the configuration information for the erasing.
-  *
-  * @param[out]  PageError pointer to variable  that
-  *         contains the configuration information on faulty page in case of error
-  *         (0xFFFFFFFF means that all the pages have been correctly erased)
-  *
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  uint32_t address = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
-
-  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
-  {
-      /* Mass Erase requested for Bank1 */
-      /* Wait for last operation to be completed */
-      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
-      {
-        /*Mass erase to be done*/
-        FLASH_MassErase();
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-        
-        /* If the erase operation is completed, disable the MER Bit */
-        CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
-      }
-  }
-  else
-  {
-    /* Page Erase is requested */
-    /* Check the parameters */
-    assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
-    assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
-    
-      /* Page Erase requested on address located on bank1 */
-      /* Wait for last operation to be completed */
-      if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
-      {
-        /*Initialization of PageError variable*/
-        *PageError = 0xFFFFFFFFU;
-        
-        /* Erase page by page to be done*/
-        for(address = pEraseInit->PageAddress;
-            address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
-            address += FLASH_PAGE_SIZE)
-        {
-          FLASH_PageErase(address);
-          
-          /* Wait for last operation to be completed */
-          status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-          
-          /* If the erase operation is completed, disable the PER Bit */
-          CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
-          
-          if (status != HAL_OK)
-          {
-            /* In case of error, stop erase procedure and return the faulty address */
-            *PageError = address;
-            break;
-          }
-        }
-      }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(&pFlash);
-
-  return status;
-}
-
-/**
-  * @brief  Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled
-  * @note   To correctly run this function, the @ref HAL_FLASH_Unlock() function
-  *         must be called before.
-  *         Call the @ref HAL_FLASH_Lock() to disable the flash memory access 
-  *         (recommended to protect the FLASH memory against possible unwanted operation)
-  * @param  pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
-  *         contains the configuration information for the erasing.
-  *
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* If procedure already ongoing, reject the next one */
-  if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
-
-  /* Enable End of FLASH Operation and Error source interrupts */
-  __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
-
-  if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
-  {
-    /*Mass erase to be done*/
-    pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
-        FLASH_MassErase();
-  }
-  else
-  {
-    /* Erase by page to be done*/
-
-    /* Check the parameters */
-    assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
-    assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
-
-    pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE;
-    pFlash.DataRemaining = pEraseInit->NbPages;
-    pFlash.Address = pEraseInit->PageAddress;
-
-    /*Erase 1st page and wait for IT*/
-    FLASH_PageErase(pEraseInit->PageAddress);
-  }
-
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions
- *  @brief   Option Bytes Programming functions
-  *
-@verbatim   
-  ==============================================================================
-                ##### Option Bytes Programming functions ##### 
-  ==============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the FLASH 
-    option bytes operations.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Erases the FLASH option bytes.
-  * @note   This functions erases all option bytes except the Read protection (RDP).
-  *         The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
-  *         The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
-  *         The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
-  *         (system reset will occur)
-  * @retval HAL status
-  */
-
-HAL_StatusTypeDef HAL_FLASHEx_OBErase(void)
-{
-  uint8_t rdptmp = OB_RDP_LEVEL_0;
-  HAL_StatusTypeDef status = HAL_ERROR;
-
-  /* Get the actual read protection Option Byte value */
-  rdptmp = FLASH_OB_GetRDP();
-
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
-  if(status == HAL_OK)
-  {
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* If the previous operation is completed, proceed to erase the option bytes */
-    SET_BIT(FLASH->CR, FLASH_CR_OPTER);
-    SET_BIT(FLASH->CR, FLASH_CR_STRT);
-
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
-    /* If the erase operation is completed, disable the OPTER Bit */
-    CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
-
-    if(status == HAL_OK)
-    {
-      /* Restore the last read protection Option Byte value */
-      status = FLASH_OB_RDP_LevelConfig(rdptmp);
-    }
-  }
-
-  /* Return the erase status */
-  return status;
-}
-
-/**
-  * @brief  Program option bytes
-  * @note   The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
-  *         The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
-  *         The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
-  *         (system reset will occur)
-  *
-  * @param  pOBInit pointer to an FLASH_OBInitStruct structure that
-  *         contains the configuration information for the programming.
-  *
-  * @retval HAL_StatusTypeDef HAL Status
-  */
-HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-
-  /* Process Locked */
-  __HAL_LOCK(&pFlash);
-
-  /* Check the parameters */
-  assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
-
-  /* Write protection configuration */
-  if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
-  {
-    assert_param(IS_WRPSTATE(pOBInit->WRPState));
-    if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
-    {
-      /* Enable of Write protection on the selected page */
-      status = FLASH_OB_EnableWRP(pOBInit->WRPPage);
-    }
-    else
-    {
-      /* Disable of Write protection on the selected page */
-      status = FLASH_OB_DisableWRP(pOBInit->WRPPage);
-    }
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-
-  /* Read protection configuration */
-  if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
-  {
-    status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-
-  /* USER configuration */
-  if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
-  {
-    status = FLASH_OB_UserConfig(pOBInit->USERConfig);
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-
-  /* DATA configuration*/
-  if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA)
-  {
-    status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData);
-    if (status != HAL_OK)
-    {
-      /* Process Unlocked */
-      __HAL_UNLOCK(&pFlash);
-      return status;
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(&pFlash);
-
-  return status;
-}
-
-/**
-  * @brief  Get the Option byte configuration
-  * @param  pOBInit pointer to an FLASH_OBInitStruct structure that
-  *         contains the configuration information for the programming.
-  *
-  * @retval None
-  */
-void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
-{
-  pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER;
-
-  /*Get WRP*/
-  pOBInit->WRPPage = FLASH_OB_GetWRP();
-
-  /*Get RDP Level*/
-  pOBInit->RDPLevel = FLASH_OB_GetRDP();
-
-  /*Get USER*/
-  pOBInit->USERConfig = FLASH_OB_GetUser();
-}
-
-/**
-  * @brief  Get the Option byte user data
-  * @param  DATAAdress Address of the option byte DATA
-  *          This parameter can be one of the following values:
-  *            @arg @ref OB_DATA_ADDRESS_DATA0
-  *            @arg @ref OB_DATA_ADDRESS_DATA1
-  * @retval Value programmed in USER data
-  */
-uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress)
-{
-  uint32_t value = 0U;
-  
-  if (DATAAdress == OB_DATA_ADDRESS_DATA0)
-  {
-    /* Get value programmed in OB USER Data0 */
-    value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT;
-  }
-  else
-  {
-    /* Get value programmed in OB USER Data1 */
-    value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT;
-  }
-  
-  return value;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASHEx_Private_Functions
- * @{
- */
-
-/**
-  * @brief  Full erase of FLASH memory Bank 
-  *
-  * @retval None
-  */
-static void FLASH_MassErase(void)
-{
-  /* Clean the error context */
-  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Only bank1 will be erased*/
-    SET_BIT(FLASH->CR, FLASH_CR_MER);
-    SET_BIT(FLASH->CR, FLASH_CR_STRT);
-}
-
-/**
-  * @brief  Enable the write protection of the desired pages
-  * @note   An option byte erase is done automatically in this function. 
-  * @note   When the memory read protection level is selected (RDP level = 1), 
-  *         it is not possible to program or erase the flash page i if
-  *         debug features are connected or boot code is executed in RAM, even if nWRPi = 1 
-  * 
-  * @param  WriteProtectPage specifies the page(s) to be write protected.
-  *         The value of this parameter depend on device used within the same series 
-  * @retval HAL status 
-  */
-static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint16_t WRP0_Data = 0xFFFFU;
-#if defined(OB_WRP1_WRP1)
-  uint16_t WRP1_Data = 0xFFFFU;
-#endif /* OB_WRP1_WRP1 */
-#if defined(OB_WRP2_WRP2)
-  uint16_t WRP2_Data = 0xFFFFU;
-#endif /* OB_WRP2_WRP2 */
-#if defined(OB_WRP3_WRP3)
-  uint16_t WRP3_Data = 0xFFFFU;
-#endif /* OB_WRP3_WRP3 */
-  
-  /* Check the parameters */
-  assert_param(IS_OB_WRP(WriteProtectPage));
-    
-  /* Get current write protected pages and the new pages to be protected ******/
-  WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage));
-  
-#if defined(OB_WRP_PAGES0TO15MASK)
-  WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
-#elif defined(OB_WRP_PAGES0TO31MASK)
-  WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
-#endif /* OB_WRP_PAGES0TO31MASK */
-  
-#if defined(OB_WRP_PAGES16TO31MASK)
-  WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U);
-#elif defined(OB_WRP_PAGES32TO63MASK)
-  WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U);
-#endif /* OB_WRP_PAGES32TO63MASK */
- 
-#if defined(OB_WRP_PAGES32TO47MASK)
-  WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U);
-#endif /* OB_WRP_PAGES32TO47MASK */
-
-#if defined(OB_WRP_PAGES48TO63MASK)
-  WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); 
-#elif defined(OB_WRP_PAGES48TO127MASK)
-  WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); 
-#endif /* OB_WRP_PAGES48TO63MASK */
-  
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
-  if(status == HAL_OK)
-  { 
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* To be able to write again option byte, need to perform a option byte erase */
-    status = HAL_FLASHEx_OBErase();
-    if (status == HAL_OK)  
-    {
-      /* Enable write protection */
-      SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
-
-#if defined(OB_WRP0_WRP0)
-      if(WRP0_Data != 0xFFU)
-      {
-        OB->WRP0 &= WRP0_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP0_WRP0 */
-
-#if defined(OB_WRP1_WRP1)
-      if((status == HAL_OK) && (WRP1_Data != 0xFFU))
-      {
-        OB->WRP1 &= WRP1_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP1_WRP1 */
-
-#if defined(OB_WRP2_WRP2)
-      if((status == HAL_OK) && (WRP2_Data != 0xFFU))
-      {
-        OB->WRP2 &= WRP2_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP2_WRP2 */
-
-#if defined(OB_WRP3_WRP3)
-      if((status == HAL_OK) && (WRP3_Data != 0xFFU))
-      {
-        OB->WRP3 &= WRP3_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP3_WRP3 */
-
-      /* if the program operation is completed, disable the OPTPG Bit */
-      CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
-    }
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Disable the write protection of the desired pages
-  * @note   An option byte erase is done automatically in this function. 
-  * @note   When the memory read protection level is selected (RDP level = 1), 
-  *         it is not possible to program or erase the flash page i if   
-  *         debug features are connected or boot code is executed in RAM, even if nWRPi = 1 
-  * 
-  * @param  WriteProtectPage specifies the page(s) to be write unprotected.
-  *         The value of this parameter depend on device used within the same series 
-  * @retval HAL status 
-  */
-static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint16_t WRP0_Data = 0xFFFFU;
-#if defined(OB_WRP1_WRP1)
-  uint16_t WRP1_Data = 0xFFFFU;
-#endif /* OB_WRP1_WRP1 */
-#if defined(OB_WRP2_WRP2)
-  uint16_t WRP2_Data = 0xFFFFU;
-#endif /* OB_WRP2_WRP2 */
-#if defined(OB_WRP3_WRP3)
-  uint16_t WRP3_Data = 0xFFFFU;
-#endif /* OB_WRP3_WRP3 */
-  
-  /* Check the parameters */
-  assert_param(IS_OB_WRP(WriteProtectPage));
-
-  /* Get current write protected pages and the new pages to be unprotected ******/
-  WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage);
-
-#if defined(OB_WRP_PAGES0TO15MASK)
-  WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
-#elif defined(OB_WRP_PAGES0TO31MASK)
-  WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
-#endif /* OB_WRP_PAGES0TO31MASK */
-  
-#if defined(OB_WRP_PAGES16TO31MASK)
-  WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U);
-#elif defined(OB_WRP_PAGES32TO63MASK)
-  WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U);
-#endif /* OB_WRP_PAGES32TO63MASK */
- 
-#if defined(OB_WRP_PAGES32TO47MASK)
-  WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U);
-#endif /* OB_WRP_PAGES32TO47MASK */
-
-#if defined(OB_WRP_PAGES48TO63MASK)
-  WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); 
-#elif defined(OB_WRP_PAGES48TO127MASK)
-  WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); 
-#endif /* OB_WRP_PAGES48TO63MASK */
-
-    
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
-  if(status == HAL_OK)
-  { 
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* To be able to write again option byte, need to perform a option byte erase */
-    status = HAL_FLASHEx_OBErase();
-    if (status == HAL_OK)  
-    {
-      SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
-
-#if defined(OB_WRP0_WRP0)
-      if(WRP0_Data != 0xFFU)
-      {
-        OB->WRP0 |= WRP0_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP0_WRP0 */
-
-#if defined(OB_WRP1_WRP1)
-      if((status == HAL_OK) && (WRP1_Data != 0xFFU))
-      {
-        OB->WRP1 |= WRP1_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP1_WRP1 */
-
-#if defined(OB_WRP2_WRP2)
-      if((status == HAL_OK) && (WRP2_Data != 0xFFU))
-      {
-        OB->WRP2 |= WRP2_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP2_WRP2 */
-
-#if defined(OB_WRP3_WRP3)
-      if((status == HAL_OK) && (WRP3_Data != 0xFFU))
-      {
-        OB->WRP3 |= WRP3_Data;
-        
-        /* Wait for last operation to be completed */
-        status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-      }
-#endif /* OB_WRP3_WRP3 */
-
-      /* if the program operation is completed, disable the OPTPG Bit */
-      CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
-    }
-  }
-  return status;
-}
-
-/**
-  * @brief  Set the read protection level.
-  * @param  ReadProtectLevel specifies the read protection level.
-  *         This parameter can be one of the following values:
-  *            @arg @ref OB_RDP_LEVEL_0 No protection
-  *            @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
-  *            @arg @ref OB_RDP_LEVEL_2 Full chip protection
-  * @note   Warning: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  
-  /* Check the parameters */
-  assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel));
-  
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  { 
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-    
-    /* If the previous operation is completed, proceed to erase the option bytes */
-    SET_BIT(FLASH->CR, FLASH_CR_OPTER);
-    SET_BIT(FLASH->CR, FLASH_CR_STRT);
-
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
-    /* If the erase operation is completed, disable the OPTER Bit */
-    CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
-
-    if(status == HAL_OK)
-    {
-      /* Enable the Option Bytes Programming operation */
-      SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
-      
-      WRITE_REG(OB->RDP, ReadProtectLevel);
-      
-      /* Wait for last operation to be completed */
-      status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 
-      
-      /* if the program operation is completed, disable the OPTPG Bit */
-      CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
-    }
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Program the FLASH User Option Byte.    
-  * @note   Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
-  * @param  UserConfig The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nBOOT1(Bit4),
-  *         VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). 
-  *         For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7).
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW)));
-  assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST)));
-  assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST)));
-  assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET)));
-  assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON)));
-  assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET)));
-#if defined(FLASH_OBR_BOOT_SEL)
-  assert_param(IS_OB_BOOT_SEL((UserConfig&OB_BOOT_SEL_SET)));
-  assert_param(IS_OB_BOOT0((UserConfig&OB_BOOT0_SET)));
-#endif /* FLASH_OBR_BOOT_SEL */
-
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {     
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Enable the Option Bytes Programming operation */
-    SET_BIT(FLASH->CR, FLASH_CR_OPTPG); 
- 
-#if defined(FLASH_OBR_BOOT_SEL)
-    OB->USER = UserConfig;
-#else
-    OB->USER = (UserConfig | 0x88U);
-#endif
-
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-
-    /* if the program operation is completed, disable the OPTPG Bit */
-    CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
-  }
-  
-  return status; 
-}
-
-/**
-  * @brief  Programs a half word at a specified Option Byte Data address.
-  * @note   The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
-  *         The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
-  *         The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes 
-  *         (system reset will occur)
-  *         Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
-  * @param  Address specifies the address to be programmed.
-  *         This parameter can be 0x1FFFF804 or 0x1FFFF806. 
-  * @param  Data specifies the data to be programmed.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data)
-{
-  HAL_StatusTypeDef status = HAL_ERROR;
-  
-  /* Check the parameters */
-  assert_param(IS_OB_DATA_ADDRESS(Address));
-  
-  /* Wait for last operation to be completed */
-  status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-  
-  if(status == HAL_OK)
-  {
-    /* Clean the error context */
-    pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Enables the Option Bytes Programming operation */
-    SET_BIT(FLASH->CR, FLASH_CR_OPTPG); 
-    *(__IO uint16_t*)Address = Data;
-    
-    /* Wait for last operation to be completed */
-    status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
-    
-    /* If the program operation is completed, disable the OPTPG Bit */
-    CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
-  }
-  /* Return the Option Byte Data Program Status */
-  return status;
-}
-
-/**
-  * @brief  Return the FLASH Write Protection Option Bytes value.
-  * @retval The FLASH Write Protection Option Bytes value
-  */
-static uint32_t FLASH_OB_GetWRP(void)
-{
-  /* Return the FLASH write protection Register value */
-  return (uint32_t)(READ_REG(FLASH->WRPR));
-}
-
-/**
-  * @brief  Returns the FLASH Read Protection level.
-  * @retval FLASH RDP level
-  *         This parameter can be one of the following values:
-  *            @arg @ref OB_RDP_LEVEL_0 No protection
-  *            @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
-  *            @arg @ref OB_RDP_LEVEL_2 Full chip protection
-  */
-static uint32_t FLASH_OB_GetRDP(void)
-{
-  uint32_t tmp_reg = 0U;
-  
-  /* Read RDP level bits */
-  tmp_reg = READ_BIT(FLASH->OBR, (FLASH_OBR_RDPRT1 | FLASH_OBR_RDPRT2));
-
-  if (tmp_reg == FLASH_OBR_RDPRT1)
-  {
-    return OB_RDP_LEVEL_1;
-  }
-  else if (tmp_reg == FLASH_OBR_RDPRT2)
-  {
-    return OB_RDP_LEVEL_2;
-  }
-  else 
-  {
-    return OB_RDP_LEVEL_0;
-  }
-}
-
-/**
-  * @brief  Return the FLASH User Option Byte value.
-  * @retval  The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nBOOT1(Bit4),
-  *         VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). 
-  *         For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7).
-  */
-static uint8_t FLASH_OB_GetUser(void)
-{
-  /* Return the User Option Byte */
-  return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup FLASH
-  * @{
-  */
-
-/** @addtogroup FLASH_Private_Functions
- * @{
- */
-
-/**
-  * @brief  Erase the specified FLASH memory page
-  * @param  PageAddress FLASH page to erase
-  *         The value of this parameter depend on device used within the same series      
-  * 
-  * @retval None
-  */
-void FLASH_PageErase(uint32_t PageAddress)
-{
-  /* Clean the error context */
-  pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
-
-    /* Proceed to erase the page */
-    SET_BIT(FLASH->CR, FLASH_CR_PER);
-    WRITE_REG(FLASH->AR, PageAddress);
-    SET_BIT(FLASH->CR, FLASH_CR_STRT);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_FLASH_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_gpio.c b/lib/hal-stm32f0/source/stm32f0xx_hal_gpio.c
deleted file mode 100644
index 2890fcca..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_gpio.c
+++ /dev/null
@@ -1,543 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_gpio.c
-  * @author  MCD Application Team
-  * @brief   GPIO HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *         
-  @verbatim
-  ==============================================================================
-                    ##### GPIO Peripheral features #####
-  ==============================================================================         
-  [..] 
-    (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually
-  configured by software in several modes:
-        (++) Input mode
-        (++) Analog mode
-        (++) Output mode
-        (++) Alternate function mode
-        (++) External interrupt/event lines
- 
-    (+) During and just after reset, the alternate functions and external interrupt
-  lines are not active and the I/O ports are configured in input floating mode.
-  
-    (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be
-  activated or not.
-           
-    (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull
-  type and the IO speed can be selected depending on the VDD value.
-       
-    (+) The microcontroller IO pins are connected to onboard peripherals/modules through a
-        multiplexer that allows only one peripheral alternate function (AF) connected
-  to an IO pin at a time. In this way, there can be no conflict between peripherals 
-  sharing the same IO pin. 
-  
-    (+) All ports have external interrupt/event capability. To use external interrupt
-  lines, the port must be configured in input mode. All available GPIO pins are 
-  connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
-  
-    (+) The external interrupt/event controller consists of up to 28 edge detectors
-        (16 lines are connected to GPIO) for generating event/interrupt requests (each
-        input line can be independently configured to select the type (interrupt or event)
-        and the corresponding trigger event (rising or falling or both). Each line can
-        also be masked independently.
-   
-            ##### How to use this driver #####
-  ==============================================================================  
-  [..]
-   (#) Enable the GPIO AHB clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE(). 
-                                    
-   (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
-       (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
-       (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef 
-            structure.
-       (++) In case of Output or alternate function mode selection: the speed is 
-             configured through "Speed" member from GPIO_InitTypeDef structure.
-        (++) In alternate mode is selection, the alternate function connected to the IO
-             is configured through "Alternate" member from GPIO_InitTypeDef structure.
-       (++) Analog mode is required when a pin is to be used as ADC channel 
-            or DAC output.
-       (++) In case of external interrupt/event selection the "Mode" member from 
-            GPIO_InitTypeDef structure select the type (interrupt or event) and 
-            the corresponding trigger event (rising or falling or both).
-  
-   (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority 
-       mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
-       HAL_NVIC_EnableIRQ().
-  
-   (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also 
-       recommended to use it to unconfigure pin which was used as an external interrupt 
-       or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG 
-       registers.
-  
-   (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
-  
-   (#) To set/reset the level of a pin configured in output mode use 
-       HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
-  
-   (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
-  
-   (#) During and just after reset, the alternate functions are not 
-       active and the GPIO pins are configured in input floating mode (except JTAG
-       pins).
-  
-   (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose 
-       (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has 
-       priority over the GPIO function.
-  
-   (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as 
-        general purpose PF0 and PF1, respectively, when the HSE oscillator is off.
-       The HSE has priority over the GPIO function.
-  
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup GPIO GPIO
-  * @brief GPIO HAL module driver
-  * @{
-  */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private defines -----------------------------------------------------------*/
-/** @defgroup GPIO_Private_Defines GPIO Private Defines
-  * @{
-  */
-#define GPIO_MODE             (0x00000003U)
-#define EXTI_MODE             (0x10000000U)
-#define GPIO_MODE_IT          (0x00010000U)
-#define GPIO_MODE_EVT         (0x00020000U)
-#define RISING_EDGE           (0x00100000U)
-#define FALLING_EDGE          (0x00200000U)
-#define GPIO_OUTPUT_TYPE      (0x00000010U)
-
-#define GPIO_NUMBER           (16U)
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup GPIO_Exported_Functions GPIO Exported Functions
-  * @{
-  */
-
-/** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init.
-  * @param  GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family
-  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
-  *         the configuration information for the specified GPIO peripheral.
-  * @retval None
-  */
-void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
-{ 
-  uint32_t position = 0x00U;
-  uint32_t iocurrent = 0x00U;
-  uint32_t temp = 0x00U;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
-  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
-  assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); 
-
-  /* Configure the port pins */
-  while (((GPIO_Init->Pin) >> position) != RESET)
-  {
-    /* Get current io position */
-    iocurrent = (GPIO_Init->Pin) & (1U << position);
-    
-    if(iocurrent)
-    {
-      /*--------------------- GPIO Mode Configuration ------------------------*/
-      /* In case of Alternate function mode selection */
-      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) 
-      {
-        /* Check the Alternate function parameters */
-        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
-        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
-        
-        /* Configure Alternate function mapped with the current IO */ 
-        temp = GPIOx->AFR[position >> 3];
-        CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;      
-        SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));       
-        GPIOx->AFR[position >> 3U] = temp;
-      }
-
-      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
-      temp = GPIOx->MODER;
-      CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2U));   
-      SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
-      GPIOx->MODER = temp;
-
-      /* In case of Output or Alternate function mode selection */
-      if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
-          (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
-      {
-        /* Check the Speed parameter */
-        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
-        /* Configure the IO Speed */
-        temp = GPIOx->OSPEEDR; 
-        CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
-        SET_BIT(temp, GPIO_Init->Speed << (position * 2U));
-        GPIOx->OSPEEDR = temp;
-
-        /* Configure the IO Output Type */
-        temp = GPIOx->OTYPER;
-        CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
-        SET_BIT(temp, ((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
-        GPIOx->OTYPER = temp;
-      }
-
-      /* Activate the Pull-up or Pull down resistor for the current IO */
-      temp = GPIOx->PUPDR;
-      CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2U));
-      SET_BIT(temp, (GPIO_Init->Pull) << (position * 2U));
-      GPIOx->PUPDR = temp;
-
-      /*--------------------- EXTI Mode Configuration ------------------------*/
-      /* Configure the External Interrupt or event for the current IO */
-      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 
-      {
-        /* Enable SYSCFG Clock */
-        __HAL_RCC_SYSCFG_CLK_ENABLE();
-  
-        temp = SYSCFG->EXTICR[position >> 2];
-        CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
-        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
-        SYSCFG->EXTICR[position >> 2] = temp;
-                  
-        /* Clear EXTI line configuration */
-        temp = EXTI->IMR;
-        CLEAR_BIT(temp, (uint32_t)iocurrent);
-        if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
-        {
-          SET_BIT(temp, iocurrent); 
-        }
-        EXTI->IMR = temp;
-
-        temp = EXTI->EMR;
-        CLEAR_BIT(temp, (uint32_t)iocurrent);      
-        if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
-        { 
-          SET_BIT(temp, iocurrent); 
-        }
-        EXTI->EMR = temp;
-  
-        /* Clear Rising Falling edge configuration */
-        temp = EXTI->RTSR;
-        CLEAR_BIT(temp, (uint32_t)iocurrent); 
-        if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
-        {
-          SET_BIT(temp, iocurrent); 
-        }
-        EXTI->RTSR = temp;
-
-        temp = EXTI->FTSR;
-        CLEAR_BIT(temp, (uint32_t)iocurrent); 
-        if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
-        {
-          SET_BIT(temp, iocurrent); 
-        }
-        EXTI->FTSR = temp;
-      }
-    }
-    
-    position++;
-  } 
-}
-
-/**
-  * @brief  De-initialize the GPIOx peripheral registers to their default reset values.
-  * @param  GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family
-  * @param  GPIO_Pin specifies the port bit to be written.
-  *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
-  * @retval None
-  */
-void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
-{
-  uint32_t position = 0x00U;
-  uint32_t iocurrent = 0x00U;
-  uint32_t tmp = 0x00U;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-  assert_param(IS_GPIO_PIN(GPIO_Pin));
-
-  /* Configure the port pins */
-  while ((GPIO_Pin >> position) != RESET)
-  {
-    /* Get current io position */
-    iocurrent = GPIO_Pin & (1U << position);
-
-    if (iocurrent)
-    {
-      /*------------------------- GPIO Mode Configuration --------------------*/
-      /* Configure IO Direction in Input Floting Mode */
-      CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2U)); 
-  
-      /* Configure the default Alternate Function in current IO */ 
-      CLEAR_BIT(GPIOx->AFR[position >> 3U], 0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
-  
-      /* Configure the default value for IO Speed */
-      CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
-                  
-      /* Configure the default value IO Output Type */
-      CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
-  
-      /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
-      CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2U));
-
-      /*------------------------- EXTI Mode Configuration --------------------*/
-      /* Clear the External Interrupt or Event for the current IO */
-      
-      tmp = SYSCFG->EXTICR[position >> 2U];
-      tmp &= ((0x0FU) << (4U * (position & 0x03U)));
-      if(tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))))
-      {
-        tmp = (0x0FU) << (4U * (position & 0x03U));
-        CLEAR_BIT(SYSCFG->EXTICR[position >> 2U], tmp);
-        
-        /* Clear EXTI line configuration */
-        CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
-        CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
-        
-        /* Clear Rising Falling edge configuration */
-        CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
-        CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
-      }
-    }
-    
-    position++;
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup GPIO_Exported_Functions_Group2 IO operation functions 
- *  @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
- *
-@verbatim   
- ===============================================================================
-                       ##### IO operation functions #####
- ===============================================================================  
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Read the specified input port pin.
-  * @param  GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family
-  * @param  GPIO_Pin specifies the port bit to read.
-  *         This parameter can be GPIO_PIN_x where x can be (0..15).
-  * @retval The input port pin value.
-  */
-GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
-  GPIO_PinState bitstatus;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN(GPIO_Pin));
-
-  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
-  {
-    bitstatus = GPIO_PIN_SET;
-  }
-  else
-  {
-    bitstatus = GPIO_PIN_RESET;
-  }
-  return bitstatus;
-  }
-
-/**
-  * @brief  Set or clear the selected data port bit.
-  * @note   This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify
-  *         accesses. In this way, there is no risk of an IRQ occurring between
-  *         the read and the modify access.
-  *
-  * @param  GPIOx where x can be (A..H) to select the GPIO peripheral for STM32F0 family
-  * @param  GPIO_Pin specifies the port bit to be written.
-  *          This parameter can be one of GPIO_PIN_x where x can be (0..15).
-  * @param  PinState specifies the value to be written to the selected bit.
-  *          This parameter can be one of the GPIO_PinState enum values:
-  *            @arg GPIO_PIN_RESET: to clear the port pin
-  *            @arg GPIO_PIN_SET: to set the port pin
-  * @retval None
-  */
-void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
-{
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN(GPIO_Pin));
-  assert_param(IS_GPIO_PIN_ACTION(PinState));
-
-  if (PinState != GPIO_PIN_RESET)
-  {
-    GPIOx->BSRR = (uint32_t)GPIO_Pin;
-  }
-  else
-  {
-    GPIOx->BRR = (uint32_t)GPIO_Pin;
-  }
-}
-  
-/**
-  * @brief  Toggle the specified GPIO pin.
-  * @param  GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family
-  * @param  GPIO_Pin specifies the pin to be toggled.
-  * @retval None
-  */
-void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
-  /* Check the parameters */
-  assert_param(IS_GPIO_PIN(GPIO_Pin));
-
-  GPIOx->ODR ^= GPIO_Pin;
-}
-
-/**
-* @brief  Locks GPIO Pins configuration registers.
-* @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
-*         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
-* @note   The configuration of the locked GPIO pins can no longer be modified
-*         until the next reset.
-  * @param  GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family
-  * @param  GPIO_Pin specifies the port bits to be locked.
-*         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
-* @retval None
-*/
-HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
-{
-  __IO uint32_t tmp = GPIO_LCKR_LCKK;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
-  assert_param(IS_GPIO_PIN(GPIO_Pin));
-
-  /* Apply lock key write sequence */
-  SET_BIT(tmp, GPIO_Pin);
-  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
-  GPIOx->LCKR = tmp;
-  /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
-  GPIOx->LCKR = GPIO_Pin;
-  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
-  GPIOx->LCKR = tmp;
-  /* Read LCKK bit*/
-  tmp = GPIOx->LCKR;
-
-  if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
-  {
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Handle EXTI interrupt request.
-  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
-  * @retval None
-  */
-void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
-{
-  /* EXTI line interrupt detected */
-  if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) 
-  { 
-    __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
-    HAL_GPIO_EXTI_Callback(GPIO_Pin);
-  }
-}
-
-/**
-  * @brief  EXTI line detection callback.
-  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
-  * @retval None
-  */
-__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(GPIO_Pin);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-            the HAL_GPIO_EXTI_Callback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-#endif /* HAL_GPIO_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_i2c.c b/lib/hal-stm32f0/source/stm32f0xx_hal_i2c.c
deleted file mode 100644
index c64e0f00..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_i2c.c
+++ /dev/null
@@ -1,4868 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_i2c.c
-  * @author  MCD Application Team
-  * @brief   I2C HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Inter Integrated Circuit (I2C) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The I2C HAL driver can be used as follows:
-
-    (#) Declare a I2C_HandleTypeDef handle structure, for example:
-        I2C_HandleTypeDef  hi2c;
-
-    (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
-        (##) Enable the I2Cx interface clock
-        (##) I2C pins configuration
-            (+++) Enable the clock for the I2C GPIOs
-            (+++) Configure I2C pins as alternate function open-drain
-        (##) NVIC configuration if you need to use interrupt process
-            (+++) Configure the I2Cx interrupt priority
-            (+++) Enable the NVIC I2C IRQ Channel
-        (##) DMA Configuration if you need to use DMA process
-            (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
-            (+++) Enable the DMAx interface clock using
-            (+++) Configure the DMA handle parameters
-            (+++) Configure the DMA Tx or Rx channel
-            (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
-                  the DMA Tx or Rx channel
-
-    (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
-        Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
-
-    (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
-        (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
-
-    (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
-
-    (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
-
-    *** Polling mode IO operation ***
-    =================================
-    [..]
-      (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
-      (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
-      (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
-      (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
-
-    *** Polling mode IO MEM operation ***
-    =====================================
-    [..]
-      (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
-      (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
-
-
-    *** Interrupt mode IO operation ***
-    ===================================
-    [..]
-      (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
-      (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
-      (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
-      (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
-      (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
-      (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
-      (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
-      (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-      (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
-           This action will inform Master to generate a Stop condition to discard the communication.
-
-
-    *** Interrupt mode IO sequential operation ***
-    ==============================================
-    [..]
-      (@) These interfaces allow to manage a sequential transfer with a repeated start condition
-          when a direction change during transfer
-    [..]
-      (+) A specific option field manage the different steps of a sequential transfer
-      (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
-      (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
-      (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
-                            and data to transfer without a final stop condition
-      (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
-                            and data to transfer without a final stop condition, an then permit a call the same master sequential interface
-                            several times (like HAL_I2C_Master_Sequential_Transmit_IT() then HAL_I2C_Master_Sequential_Transmit_IT())
-      (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
-                            and with new data to transfer if the direction change or manage only the new data to transfer
-                            if no direction change and without a final stop condition in both cases
-      (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
-                            and with new data to transfer if the direction change or manage only the new data to transfer
-                            if no direction change and with a final stop condition in both cases
-
-      (+) Differents sequential I2C interfaces are listed below:
-      (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
-      (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
-      (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
-      (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
-      (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
-      (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
-           add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
-      (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
-      (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
-      (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
-      (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
-      (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
-      (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-      (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
-           This action will inform Master to generate a Stop condition to discard the communication.
-
-    *** Interrupt mode IO MEM operation ***
-    =======================================
-    [..]
-      (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
-          HAL_I2C_Mem_Write_IT()
-      (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
-      (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
-          HAL_I2C_Mem_Read_IT()
-      (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-
-    *** DMA mode IO operation ***
-    ==============================
-    [..]
-      (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Master_Transmit_DMA()
-      (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
-      (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Master_Receive_DMA()
-      (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
-      (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Slave_Transmit_DMA()
-      (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
-      (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
-          HAL_I2C_Slave_Receive_DMA()
-      (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-      (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
-      (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
-      (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
-           This action will inform Master to generate a Stop condition to discard the communication.
-
-    *** DMA mode IO MEM operation ***
-    =================================
-    [..]
-      (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
-          HAL_I2C_Mem_Write_DMA()
-      (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
-      (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
-          HAL_I2C_Mem_Read_DMA()
-      (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
-      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_I2C_ErrorCallback()
-
-
-     *** I2C HAL driver macros list ***
-     ==================================
-     [..]
-       Below the list of most used macros in I2C HAL driver.
-
-      (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
-      (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
-      (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode
-      (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
-      (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
-      (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
-      (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
-
-     [..]
-       (@) You can refer to the I2C HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup I2C I2C
-  * @brief I2C HAL module driver
-  * @{
-  */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-
-/** @defgroup I2C_Private_Define I2C Private Define
-  * @{
-  */
-#define TIMING_CLEAR_MASK   (0xF0FFFFFFU)  /*!< I2C TIMING clear register Mask */
-#define I2C_TIMEOUT_ADDR    (10000U)       /*!< 10 s  */
-#define I2C_TIMEOUT_BUSY    (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_DIR     (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_RXNE    (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_STOPF   (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_TC      (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_TCR     (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_TXIS    (25U)          /*!< 25 ms */
-#define I2C_TIMEOUT_FLAG    (25U)          /*!< 25 ms */
-
-#define MAX_NBYTE_SIZE      255U
-#define SlaveAddr_SHIFT     7U
-#define SlaveAddr_MSK       0x06U
-
-/* Private define for @ref PreviousState usage */
-#define I2C_STATE_MSK             ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits            */
-#define I2C_STATE_NONE            ((uint32_t)(HAL_I2C_MODE_NONE))                                                        /*!< Default Value                                          */
-#define I2C_STATE_MASTER_BUSY_TX  ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER))            /*!< Master Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_MASTER_BUSY_RX  ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER))            /*!< Master Busy RX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_SLAVE_BUSY_TX   ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE))             /*!< Slave Busy TX, combinaison of State LSB and Mode enum  */
-#define I2C_STATE_SLAVE_BUSY_RX   ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE))             /*!< Slave Busy RX, combinaison of State LSB and Mode enum  */
-#define I2C_STATE_MEM_BUSY_TX     ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM))               /*!< Memory Busy TX, combinaison of State LSB and Mode enum */
-#define I2C_STATE_MEM_BUSY_RX     ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM))               /*!< Memory Busy RX, combinaison of State LSB and Mode enum */
-
-
-/* Private define to centralize the enable/disable of Interrupts */
-#define I2C_XFER_TX_IT          (0x00000001U)
-#define I2C_XFER_RX_IT          (0x00000002U)
-#define I2C_XFER_LISTEN_IT      (0x00000004U)
-
-#define I2C_XFER_ERROR_IT       (0x00000011U)
-#define I2C_XFER_CPLT_IT        (0x00000012U)
-#define I2C_XFER_RELOAD_IT      (0x00000012U)
-
-/* Private define Sequential Transfer Options default/reset value */
-#define I2C_NO_OPTION_FRAME     (0xFFFF0000U)
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-#define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_I2C_STATE_BUSY_TX)   ? \
-                                            ((uint32_t)((__HANDLE__)->hdmatx->Instance->CNDTR)) : \
-                                            ((uint32_t)((__HANDLE__)->hdmarx->Instance->CNDTR)))
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/** @defgroup I2C_Private_Functions I2C Private Functions
-  * @{
-  */
-/* Private functions to handle DMA transfer */
-static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
-static void I2C_DMAError(DMA_HandleTypeDef *hdma);
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
-
-/* Private functions to handle IT transfer */
-static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c);
-static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c);
-static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
-static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode);
-
-/* Private functions to handle IT transfer */
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
-
-/* Private functions for I2C transfer IRQ handler */
-static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
-
-/* Private functions to handle flags during polling transfer */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
-
-/* Private functions to centralize the enable/disable of Interrupts */
-static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
-static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
-
-/* Private functions to flush TXDR register */
-static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c);
-
-/* Private functions to handle  start, restart or stop a transfer */
-static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup I2C_Exported_Functions I2C Exported Functions
-  * @{
-  */
-
-/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and
-          deinitialize the I2Cx peripheral:
-
-      (+) User must Implement HAL_I2C_MspInit() function in which he configures
-          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
-
-      (+) Call the function HAL_I2C_Init() to configure the selected device with
-          the selected configuration:
-        (++) Clock Timing
-        (++) Own Address 1
-        (++) Addressing mode (Master, Slave)
-        (++) Dual Addressing mode
-        (++) Own Address 2
-        (++) Own Address 2 Mask
-        (++) General call mode
-        (++) Nostretch mode
-
-      (+) Call the function HAL_I2C_DeInit() to restore the default configuration
-          of the selected I2Cx peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the I2C according to the specified parameters
-  *         in the I2C_InitTypeDef and initialize the associated handle.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the I2C handle allocation */
-  if (hi2c == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
-  assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
-  assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
-  assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
-  assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));
-  assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
-  assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
-
-  if (hi2c->State == HAL_I2C_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hi2c->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
-    HAL_I2C_MspInit(hi2c);
-  }
-
-  hi2c->State = HAL_I2C_STATE_BUSY;
-
-  /* Disable the selected I2C peripheral */
-  __HAL_I2C_DISABLE(hi2c);
-
-  /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
-  /* Configure I2Cx: Frequency range */
-  hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
-
-  /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
-  /* Disable Own Address1 before set the Own Address1 configuration */
-  hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
-
-  /* Configure I2Cx: Own Address1 and ack own address1 mode */
-  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
-  {
-    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
-  }
-  else /* I2C_ADDRESSINGMODE_10BIT */
-  {
-    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
-  }
-
-  /*---------------------------- I2Cx CR2 Configuration ----------------------*/
-  /* Configure I2Cx: Addressing Master mode */
-  if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
-  {
-    hi2c->Instance->CR2 = (I2C_CR2_ADD10);
-  }
-  /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
-  hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
-
-  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
-  /* Disable Own Address2 before set the Own Address2 configuration */
-  hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
-
-  /* Configure I2Cx: Dual mode and Own Address2 */
-  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
-
-  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
-  /* Configure I2Cx: Generalcall and NoStretch mode */
-  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
-
-  /* Enable the selected I2C peripheral */
-  __HAL_I2C_ENABLE(hi2c);
-
-  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-  hi2c->State = HAL_I2C_STATE_READY;
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitialize the I2C peripheral.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the I2C handle allocation */
-  if (hi2c == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-
-  hi2c->State = HAL_I2C_STATE_BUSY;
-
-  /* Disable the I2C Peripheral Clock */
-  __HAL_I2C_DISABLE(hi2c);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_I2C_MspDeInit(hi2c);
-
-  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-  hi2c->State = HAL_I2C_STATE_RESET;
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the I2C MSP.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the I2C MSP.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
- *  @brief   Data transfers functions
- *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to manage the I2C data
-    transfers.
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode : The communication is performed in the polling mode.
-            The status of all data processing is returned by the same function
-            after finishing transfer.
-       (++) No-Blocking mode : The communication is performed using Interrupts
-            or DMA. These functions return the status of the transfer startup.
-            The end of the data processing will be indicated through the
-            dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
-            using DMA mode.
-
-    (#) Blocking mode functions are :
-        (++) HAL_I2C_Master_Transmit()
-        (++) HAL_I2C_Master_Receive()
-        (++) HAL_I2C_Slave_Transmit()
-        (++) HAL_I2C_Slave_Receive()
-        (++) HAL_I2C_Mem_Write()
-        (++) HAL_I2C_Mem_Read()
-        (++) HAL_I2C_IsDeviceReady()
-
-    (#) No-Blocking mode functions with Interrupt are :
-        (++) HAL_I2C_Master_Transmit_IT()
-        (++) HAL_I2C_Master_Receive_IT()
-        (++) HAL_I2C_Slave_Transmit_IT()
-        (++) HAL_I2C_Slave_Receive_IT()
-        (++) HAL_I2C_Mem_Write_IT()
-        (++) HAL_I2C_Mem_Read_IT()
-
-    (#) No-Blocking mode functions with DMA are :
-        (++) HAL_I2C_Master_Transmit_DMA()
-        (++) HAL_I2C_Master_Receive_DMA()
-        (++) HAL_I2C_Slave_Transmit_DMA()
-        (++) HAL_I2C_Slave_Receive_DMA()
-        (++) HAL_I2C_Mem_Write_DMA()
-        (++) HAL_I2C_Mem_Read_DMA()
-
-    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
-        (++) HAL_I2C_MemTxCpltCallback()
-        (++) HAL_I2C_MemRxCpltCallback()
-        (++) HAL_I2C_MasterTxCpltCallback()
-        (++) HAL_I2C_MasterRxCpltCallback()
-        (++) HAL_I2C_SlaveTxCpltCallback()
-        (++) HAL_I2C_SlaveRxCpltCallback()
-        (++) HAL_I2C_ErrorCallback()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Transmits in master mode an amount of data in blocking mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until TXIS flag is set */
-      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-      hi2c->XferSize--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receives in master mode an amount of data in blocking mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until RXNE flag is set */
-      if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmits in slave mode an amount of data in blocking mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Wait until ADDR flag is set */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-    /* If 10bit addressing mode is selected */
-    if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
-    {
-      /* Wait until ADDR flag is set */
-      if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
-      {
-        /* Disable Address Acknowledge */
-        hi2c->Instance->CR2 |= I2C_CR2_NACK;
-        return HAL_TIMEOUT;
-      }
-
-      /* Clear ADDR flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-    }
-
-    /* Wait until DIR flag is set Transmitter mode */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until TXIS flag is set */
-      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        /* Disable Address Acknowledge */
-        hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-    }
-
-    /* Wait until STOP flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Normal use case for Transmitter mode */
-        /* A NACK is generated to confirm the end of transfer */
-        hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Wait until BUSY flag is reset */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Disable Address Acknowledge */
-    hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in slave mode an amount of data in blocking mode
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Wait until ADDR flag is set */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-    /* Wait until DIR flag is reset Receiver mode */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    while (hi2c->XferCount > 0U)
-    {
-      /* Wait until RXNE flag is set */
-      if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        /* Disable Address Acknowledge */
-        hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-        /* Store Last receive data if any */
-        if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
-        {
-          /* Read data from RXDR */
-          (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-          hi2c->XferCount--;
-        }
-
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
-        {
-          return HAL_TIMEOUT;
-        }
-        else
-        {
-          return HAL_ERROR;
-        }
-      }
-
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferCount--;
-    }
-
-    /* Wait until STOP flag is set */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Wait until BUSY flag is reset */
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Disable Address Acknowledge */
-      hi2c->Instance->CR2 |= I2C_CR2_NACK;
-      return HAL_TIMEOUT;
-    }
-
-    /* Disable Address Acknowledge */
-    hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in master mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in master mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in slave mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in slave mode an amount of data in non-blocking mode with Interrupt
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in master mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    if (hi2c->XferSize > 0U)
-    {
-      /* Set the I2C DMA transfer complete callback */
-      hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
-
-      /* Set the DMA error callback */
-      hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
-      /* Set the unused DMA callbacks to NULL */
-      hi2c->hdmatx->XferHalfCpltCallback = NULL;
-      hi2c->hdmatx->XferAbortCallback = NULL;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-      /* Send Slave Address */
-      /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);
-
-      /* Update XferCount value */
-      hi2c->XferCount -= hi2c->XferSize;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR and NACK interrupts */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-      /* Enable DMA Request */
-      hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-    }
-    else
-    {
-      /* Update Transfer ISR function pointer */
-      hi2c->XferISR = I2C_Master_ISR_IT;
-
-      /* Send Slave Address */
-      /* Set NBYTES to write and generate START condition */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-      /* possible to enable all of these */
-      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in master mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
-{
-  uint32_t xfermode = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    if (hi2c->XferSize > 0U)
-    {
-      /* Set the I2C DMA transfer complete callback */
-      hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
-
-      /* Set the DMA error callback */
-      hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
-      /* Set the unused DMA callbacks to NULL */
-      hi2c->hdmarx->XferHalfCpltCallback = NULL;
-      hi2c->hdmarx->XferAbortCallback = NULL;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
-
-      /* Send Slave Address */
-      /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-      /* Update XferCount value */
-      hi2c->XferCount -= hi2c->XferSize;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR and NACK interrupts */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-      /* Enable DMA Request */
-      hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-    }
-    else
-    {
-      /* Update Transfer ISR function pointer */
-      hi2c->XferISR = I2C_Master_ISR_IT;
-
-      /* Send Slave Address */
-      /* Set NBYTES to read and generate START condition */
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Note : The I2C interrupts must be enabled after unlocking current process
-                to avoid the risk of I2C interrupt handle execution before current
-                process unlock */
-      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-      /* possible to enable all of these */
-      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-    }
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in slave mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_DMA;
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmatx->XferHalfCpltCallback = NULL;
-    hi2c->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR, STOP, NACK, ADDR interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in slave mode an amount of data in non-blocking mode with DMA
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Slave_ISR_DMA;
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmarx->XferHalfCpltCallback = NULL;
-    hi2c->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR, STOP, NACK, ADDR interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @brief  Write an amount of data in blocking mode to a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-    }
-
-    do
-    {
-      /* Wait until TXIS flag is set */
-      if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-      {
-        if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-        {
-          return HAL_ERROR;
-        }
-        else
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-      hi2c->XferSize--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-
-    }
-    while (hi2c->XferCount > 0U);
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is reset */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Read an amount of data in blocking mode from a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr  = pData;
-    hi2c->XferCount = Size;
-    hi2c->XferISR   = NULL;
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
-    }
-
-    do
-    {
-      /* Wait until RXNE flag is set */
-      if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-      {
-        /* Wait until TCR flag is set */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        if (hi2c->XferCount > MAX_NBYTE_SIZE)
-        {
-          hi2c->XferSize = MAX_NBYTE_SIZE;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          hi2c->XferSize = hi2c->XferCount;
-          I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-    while (hi2c->XferCount > 0U);
-
-    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-    /* Wait until STOPF flag is reset */
-    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode  = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @brief  Write an amount of data in non-blocking mode with Interrupt to a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Read an amount of data in non-blocking mode with Interrupt from a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    /* possible to enable all of these */
-    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @brief  Write an amount of data in non-blocking mode with DMA to a specific memory address
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmatx->XferHalfCpltCallback = NULL;
-    hi2c->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
-
-    /* Update XferCount value */
-    hi2c->XferCount -= hi2c->XferSize;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR and NACK interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Reads an amount of data in non-blocking mode with DMA from a specific memory address.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be read
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
-{
-  uint32_t tickstart = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Init tickstart for timeout management*/
-    tickstart = HAL_GetTick();
-
-    hi2c->State       = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode        = HAL_I2C_MODE_MEM;
-    hi2c->ErrorCode   = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->XferISR     = I2C_Master_ISR_DMA;
-
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = I2C_AUTOEND_MODE;
-    }
-
-    /* Send Slave Address and Memory Address */
-    if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_ERROR;
-      }
-      else
-      {
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Set the I2C DMA transfer complete callback */
-    hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
-
-    /* Set the DMA error callback */
-    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
-
-    /* Set the unused DMA callbacks to NULL */
-    hi2c->hdmarx->XferHalfCpltCallback = NULL;
-    hi2c->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
-
-    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);
-
-    /* Update XferCount value */
-    hi2c->XferCount -= hi2c->XferSize;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Enable DMA Request */
-    hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    /* Enable ERR and NACK interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Checks if target device is ready for communication.
-  * @note   This function is used with Memory devices
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  Trials Number of trials
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  __IO uint32_t I2C_Trials = 0U;
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    do
-    {
-      /* Generate Start */
-      hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress);
-
-      /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-      /* Wait until STOPF flag is set or a NACK flag is set*/
-      tickstart = HAL_GetTick();
-      while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT))
-      {
-        if (Timeout != HAL_MAX_DELAY)
-        {
-          if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-          {
-            /* Device is ready */
-            hi2c->State = HAL_I2C_STATE_READY;
-            /* Process Unlocked */
-            __HAL_UNLOCK(hi2c);
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-
-      /* Check if the NACKF flag has not been set */
-      if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)
-      {
-        /* Wait until STOPF flag is reset */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-        /* Device is ready */
-        hi2c->State = HAL_I2C_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-
-        return HAL_OK;
-      }
-      else
-      {
-        /* Wait until STOPF flag is reset */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear NACK Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-        /* Clear STOP Flag, auto generated with autoend*/
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-      }
-
-      /* Check if the maximum allowed number of trials has been reached */
-      if (I2C_Trials++ == Trials)
-      {
-        /* Generate Stop */
-        hi2c->Instance->CR2 |= I2C_CR2_STOP;
-
-        /* Wait until STOPF flag is reset */
-        if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-      }
-    }
-    while (I2C_Trials < Trials);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_TIMEOUT;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  uint32_t xfermode = 0U;
-  uint32_t xferrequest = I2C_GENERATE_START_WRITE;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    /* If size > MAX_NBYTE_SIZE, use reload mode */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = hi2c->XferOptions;
-    }
-
-    /* If transfer direction not change, do not generate Restart Condition */
-    /* Mean Previous state is same as current state */
-    if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
-    {
-      xferrequest = I2C_NO_STARTSTOP;
-    }
-
-    /* Send Slave Address and set NBYTES to write */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  uint32_t xfermode = 0U;
-  uint32_t xferrequest = I2C_GENERATE_START_READ;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX;
-    hi2c->Mode      = HAL_I2C_MODE_MASTER;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Master_ISR_IT;
-
-    /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-      xfermode = I2C_RELOAD_MODE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-      xfermode = hi2c->XferOptions;
-    }
-
-    /* If transfer direction not change, do not generate Restart Condition */
-    /* Mean Previous state is same as current state */
-    if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
-    {
-      xferrequest = I2C_NO_STARTSTOP;
-    }
-
-    /* Send Slave Address and set NBYTES to read */
-    I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT);
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
-    /* and then toggle the HAL slave RX state to TX state */
-    if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
-    {
-      /* Disable associated Interrupts */
-      I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_TX_LISTEN;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE)
-    {
-      /* Clear ADDR flag after prepare the transfer parameters */
-      /* This action will generate an acknowledge to the Master */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-    to avoid the risk of I2C interrupt handle execution before current
-    process unlock */
-    /* REnable ADDR interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
-  * @note   This interface allow to manage repeated start condition when a direction change during transfer
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT);
-
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
-    /* and then toggle the HAL slave TX state to RX state */
-    if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
-    {
-      /* Disable associated Interrupts */
-      I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-    }
-
-    hi2c->State     = HAL_I2C_STATE_BUSY_RX_LISTEN;
-    hi2c->Mode      = HAL_I2C_MODE_SLAVE;
-    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-
-    /* Enable Address Acknowledge */
-    hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hi2c->pBuffPtr    = pData;
-    hi2c->XferCount   = Size;
-    hi2c->XferSize    = hi2c->XferCount;
-    hi2c->XferOptions = XferOptions;
-    hi2c->XferISR     = I2C_Slave_ISR_IT;
-
-    if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT)
-    {
-      /* Clear ADDR flag after prepare the transfer parameters */
-      /* This action will generate an acknowledge to the Master */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-    to avoid the risk of I2C interrupt handle execution before current
-    process unlock */
-    /* REnable ADDR interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Enable the Address listen mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
-{
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    hi2c->State = HAL_I2C_STATE_LISTEN;
-    hi2c->XferISR = I2C_Slave_ISR_IT;
-
-    /* Enable the Address Match interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Disable the Address listen mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
-{
-  /* Declaration of tmp to prevent undefined behavior of volatile usage */
-  uint32_t tmp;
-
-  /* Disable Address listen mode only if a transfer is not ongoing */
-  if (hi2c->State == HAL_I2C_STATE_LISTEN)
-  {
-    tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
-    hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode = HAL_I2C_MODE_NONE;
-    hi2c->XferISR = NULL;
-
-    /* Disable the Address Match interrupt */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Abort a master I2C IT or DMA process communication with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
-{
-  if (hi2c->Mode == HAL_I2C_MODE_MASTER)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    /* Set State at HAL_I2C_STATE_ABORT */
-    hi2c->State = HAL_I2C_STATE_ABORT;
-
-    /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */
-    /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
-    I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Note : The I2C interrupts must be enabled after unlocking current process
-              to avoid the risk of I2C interrupt handle execution before current
-              process unlock */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Wrong usage of abort function */
-    /* This function should be used only in case of abort monitored by master device */
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-
-/**
-  * @brief  This function handles I2C event interrupt request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
-  /* Get current IT Flags and IT sources value */
-  uint32_t itflags   = READ_REG(hi2c->Instance->ISR);
-  uint32_t itsources = READ_REG(hi2c->Instance->CR1);
-
-  /* I2C events treatment -------------------------------------*/
-  if (hi2c->XferISR != NULL)
-  {
-    hi2c->XferISR(hi2c, itflags, itsources);
-  }
-}
-
-/**
-  * @brief  This function handles I2C error interrupt request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
-{
-  uint32_t itflags   = READ_REG(hi2c->Instance->ISR);
-  uint32_t itsources = READ_REG(hi2c->Instance->CR1);
-
-  /* I2C Bus error interrupt occurred ------------------------------------*/
-  if (((itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
-
-    /* Clear BERR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
-  }
-
-  /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
-  if (((itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
-
-    /* Clear OVR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
-  }
-
-  /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
-  if (((itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERRI) != RESET))
-  {
-    hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
-
-    /* Clear ARLO flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
-  }
-
-  /* Call the Error Callback in case of Error detected */
-  if ((hi2c->ErrorCode & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) !=  HAL_I2C_ERROR_NONE)
-  {
-    I2C_ITError(hi2c, hi2c->ErrorCode);
-  }
-}
-
-/**
-  * @brief  Master Tx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Master Rx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
-   */
-}
-
-/** @brief  Slave Tx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Rx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Address Match callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION
-  * @param  AddrMatchCode Address Match Code
-  * @retval None
-  */
-__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-  UNUSED(TransferDirection);
-  UNUSED(AddrMatchCode);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_AddrCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Listen Complete callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_ListenCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Memory Tx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MemTxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Memory Rx Transfer completed callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_MemRxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  I2C error callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_ErrorCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  I2C abort callback.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval None
-  */
-__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2c);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_I2C_AbortCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
- *  @brief   Peripheral State, Mode and Error functions
- *
-@verbatim
- ===============================================================================
-            ##### Peripheral State, Mode and Error functions #####
- ===============================================================================
-    [..]
-    This subsection permit to get in run-time the status of the peripheral
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the I2C handle state.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @retval HAL state
-  */
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
-{
-  /* Return I2C handle state */
-  return hi2c->State;
-}
-
-/**
-  * @brief  Returns the I2C Master, Slave, Memory or no mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *         the configuration information for I2C module
-  * @retval HAL mode
-  */
-HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
-{
-  return hi2c->Mode;
-}
-
-/**
-* @brief  Return the I2C error code.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *              the configuration information for the specified I2C.
-* @retval I2C Error Code
-*/
-uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
-{
-  return hi2c->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup I2C_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  uint16_t devaddress = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Clear NACK Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Set corresponding Error Code */
-    /* No need to generate STOP, it is automatically done */
-    /* Error callback will be send during stop flag treatment */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-
-    /* Flush TX register */
-    I2C_Flush_TXDR(hi2c);
-  }
-  else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET))
-  {
-    /* Read data from RXDR */
-    (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-    hi2c->XferSize--;
-    hi2c->XferCount--;
-  }
-  else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET))
-  {
-    /* Write data to TXDR */
-    hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-    hi2c->XferSize--;
-    hi2c->XferCount--;
-  }
-  else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
-  {
-    if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U))
-    {
-      devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
-
-      if (hi2c->XferCount > MAX_NBYTE_SIZE)
-      {
-        hi2c->XferSize = MAX_NBYTE_SIZE;
-        I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
-      }
-      else
-      {
-        hi2c->XferSize = hi2c->XferCount;
-        if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
-        {
-          I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP);
-        }
-        else
-        {
-          I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
-        }
-      }
-    }
-    else
-    {
-      /* Call TxCpltCallback() if no stop mode is set */
-      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
-      {
-        /* Call I2C Master Sequential complete process */
-        I2C_ITMasterSequentialCplt(hi2c);
-      }
-      else
-      {
-        /* Wrong size Status regarding TCR flag event */
-        /* Call the corresponding callback to inform upper layer of End of Transfer */
-        I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
-      }
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_TC) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
-  {
-    if (hi2c->XferCount == 0U)
-    {
-      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
-      {
-        /* Generate a stop condition in case of no transfer option */
-        if (hi2c->XferOptions == I2C_NO_OPTION_FRAME)
-        {
-          /* Generate Stop */
-          hi2c->Instance->CR2 |= I2C_CR2_STOP;
-        }
-        else
-        {
-          /* Call I2C Master Sequential complete process */
-          I2C_ITMasterSequentialCplt(hi2c);
-        }
-      }
-    }
-    else
-    {
-      /* Wrong size Status regarding TC flag event */
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
-    }
-  }
-
-  if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Master complete process */
-    I2C_ITMasterCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  /* Process locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Check that I2C transfer finished */
-    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
-    /* Mean XferCount == 0*/
-    /* So clear Flag NACKF only */
-    if (hi2c->XferCount == 0U)
-    {
-      if (((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_LAST_FRAME)) && \
-          (hi2c->State == HAL_I2C_STATE_LISTEN))
-      {
-        /* Call I2C Listen complete process */
-        I2C_ITListenCplt(hi2c, ITFlags);
-      }
-      else if ((hi2c->XferOptions != I2C_NO_OPTION_FRAME) && (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN))
-      {
-        /* Clear NACK Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-        /* Flush TX register */
-        I2C_Flush_TXDR(hi2c);
-
-        /* Last Byte is Transmitted */
-        /* Call I2C Slave Sequential complete process */
-        I2C_ITSlaveSequentialCplt(hi2c);
-      }
-      else
-      {
-        /* Clear NACK Flag */
-        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-      }
-    }
-    else
-    {
-      /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
-      /* Clear NACK Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET))
-  {
-    if (hi2c->XferCount > 0U)
-    {
-      /* Read data from RXDR */
-      (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-    }
-
-    if ((hi2c->XferCount == 0U) && \
-        (hi2c->XferOptions != I2C_NO_OPTION_FRAME))
-    {
-      /* Call I2C Slave Sequential complete process */
-      I2C_ITSlaveSequentialCplt(hi2c);
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET))
-  {
-    I2C_ITAddrCplt(hi2c, ITFlags);
-  }
-  else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET))
-  {
-    /* Write data to TXDR only if XferCount not reach "0" */
-    /* A TXIS flag can be set, during STOP treatment      */
-    /* Check if all Datas have already been sent */
-    /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
-    if (hi2c->XferCount > 0U)
-    {
-      /* Write data to TXDR */
-      hi2c->Instance->TXDR = (*hi2c->pBuffPtr++);
-      hi2c->XferCount--;
-      hi2c->XferSize--;
-    }
-    else
-    {
-      if ((hi2c->XferOptions == I2C_NEXT_FRAME) || (hi2c->XferOptions == I2C_FIRST_FRAME))
-      {
-        /* Last Byte is Transmitted */
-        /* Call I2C Slave Sequential complete process */
-        I2C_ITSlaveSequentialCplt(hi2c);
-      }
-    }
-  }
-
-  /* Check if STOPF is set */
-  if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Slave complete process */
-    I2C_ITSlaveCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  uint16_t devaddress = 0U;
-  uint32_t xfermode = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Clear NACK Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Set corresponding Error Code */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-
-    /* No need to generate STOP, it is automatically done */
-    /* But enable STOP interrupt, to treat it */
-    /* Error callback will be send during stop flag treatment */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-
-    /* Flush TX register */
-    I2C_Flush_TXDR(hi2c);
-  }
-  else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET))
-  {
-    /* Disable TC interrupt */
-    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI);
-
-    if (hi2c->XferCount != 0U)
-    {
-      /* Recover Slave address */
-      devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
-
-      /* Prepare the new XferSize to transfer */
-      if (hi2c->XferCount > MAX_NBYTE_SIZE)
-      {
-        hi2c->XferSize = MAX_NBYTE_SIZE;
-        xfermode = I2C_RELOAD_MODE;
-      }
-      else
-      {
-        hi2c->XferSize = hi2c->XferCount;
-        xfermode = I2C_AUTOEND_MODE;
-      }
-
-      /* Set the new XferSize in Nbytes register */
-      I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);
-
-      /* Update XferCount value */
-      hi2c->XferCount -= hi2c->XferSize;
-
-      /* Enable DMA Request */
-      if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-      {
-        hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
-      }
-      else
-      {
-        hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
-      }
-    }
-    else
-    {
-      /* Wrong size Status regarding TCR flag event */
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Master complete process */
-    I2C_ITMasterCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  ITFlags Interrupt flags to handle.
-  * @param  ITSources Interrupt sources enabled.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
-{
-  /* Process locked */
-  __HAL_LOCK(hi2c);
-
-  if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET))
-  {
-    /* Check that I2C transfer finished */
-    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
-    /* Mean XferCount == 0 */
-    /* So clear Flag NACKF only */
-    if (I2C_GET_DMA_REMAIN_DATA(hi2c) == 0U)
-    {
-      /* Clear NACK Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-    }
-    else
-    {
-      /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
-      /* Clear NACK Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-  else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET))
-  {
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-  }
-  else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
-  {
-    /* Call I2C Slave complete process */
-    I2C_ITSlaveCplt(hi2c, ITFlags);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Master sends target device address followed by internal memory address for write request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
-  I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
-
-  /* Wait until TXIS flag is set */
-  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-  {
-    if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* If Memory address size is 8Bit */
-  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
-  {
-    /* Send Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-  /* If Memory address size is 16Bit */
-  else
-  {
-    /* Send MSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
-
-    /* Wait until TXIS flag is set */
-    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Send LSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-
-  /* Wait until TCR flag is set */
-  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)
-  {
-    return HAL_TIMEOUT;
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Master sends target device address followed by internal memory address for read request.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  MemAddress Internal memory address
-  * @param  MemAddSize Size of internal memory address
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
-{
-  I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
-
-  /* Wait until TXIS flag is set */
-  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-  {
-    if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* If Memory address size is 8Bit */
-  if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
-  {
-    /* Send Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-  /* If Memory address size is 16Bit */
-  else
-  {
-    /* Send MSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);
-
-    /* Wait until TXIS flag is set */
-    if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
-      {
-        return HAL_ERROR;
-      }
-      else
-      {
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Send LSB of Memory Address */
-    hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
-  }
-
-  /* Wait until TC flag is set */
-  if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)
-  {
-    return HAL_TIMEOUT;
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  I2C Address complete process callback.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  uint8_t transferdirection = 0U;
-  uint16_t slaveaddrcode = 0U;
-  uint16_t ownadd1code = 0U;
-  uint16_t ownadd2code = 0U;
-
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(ITFlags);
-
-  /* In case of Listen state, need to inform upper layer of address match code event */
-  if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN)
-  {
-    transferdirection = I2C_GET_DIR(hi2c);
-    slaveaddrcode     = I2C_GET_ADDR_MATCH(hi2c);
-    ownadd1code       = I2C_GET_OWN_ADDRESS1(hi2c);
-    ownadd2code       = I2C_GET_OWN_ADDRESS2(hi2c);
-
-    /* If 10bits addressing mode is selected */
-    if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
-    {
-      if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK))
-      {
-        slaveaddrcode = ownadd1code;
-        hi2c->AddrEventCount++;
-        if (hi2c->AddrEventCount == 2U)
-        {
-          /* Reset Address Event counter */
-          hi2c->AddrEventCount = 0U;
-
-          /* Clear ADDR flag */
-          __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2c);
-
-          /* Call Slave Addr callback */
-          HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
-        }
-      }
-      else
-      {
-        slaveaddrcode = ownadd2code;
-
-        /* Disable ADDR Interrupts */
-        I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-
-        /* Call Slave Addr callback */
-        HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
-      }
-    }
-    /* else 7 bits addressing mode is selected */
-    else
-    {
-      /* Disable ADDR Interrupts */
-      I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Call Slave Addr callback */
-      HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
-    }
-  }
-  /* Else clear address flag only */
-  else
-  {
-    /* Clear ADDR flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Master sequential complete process.
-  * @param  hi2c I2C handle.
-  * @retval None
-  */
-static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c)
-{
-  /* Reset I2C handle mode */
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  /* No Generate Stop, to permit restart mode */
-  /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */
-  if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
-  {
-    hi2c->State         = HAL_I2C_STATE_READY;
-    hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
-    hi2c->XferISR       = NULL;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_MasterTxCpltCallback(hi2c);
-  }
-  /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
-  else
-  {
-    hi2c->State         = HAL_I2C_STATE_READY;
-    hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-    hi2c->XferISR       = NULL;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_MasterRxCpltCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Slave sequential complete process.
-  * @param  hi2c I2C handle.
-  * @retval None
-  */
-static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c)
-{
-  /* Reset I2C handle mode */
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-
-  if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
-  {
-    /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */
-    hi2c->State         = HAL_I2C_STATE_LISTEN;
-    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Tx complete callback to inform upper layer of the end of transmit process */
-    HAL_I2C_SlaveTxCpltCallback(hi2c);
-  }
-
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
-  {
-    /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */
-    hi2c->State         = HAL_I2C_STATE_LISTEN;
-    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
-
-    /* Disable Interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Rx complete callback to inform upper layer of the end of receive process */
-    HAL_I2C_SlaveRxCpltCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Master complete process.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  /* Clear STOP Flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-  /* Clear Configuration Register 2 */
-  I2C_RESET_CR2(hi2c);
-
-  /* Reset handle parameters */
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->XferISR       = NULL;
-  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
-
-  if ((ITFlags & I2C_FLAG_AF) != RESET)
-  {
-    /* Clear NACK Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Set acknowledge error code */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-  }
-
-  /* Flush TX register */
-  I2C_Flush_TXDR(hi2c);
-
-  /* Disable Interrupts */
-  I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT);
-
-  /* Call the corresponding callback to inform upper layer of End of Transfer */
-  if ((hi2c->ErrorCode != HAL_I2C_ERROR_NONE) || (hi2c->State == HAL_I2C_STATE_ABORT))
-  {
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    I2C_ITError(hi2c, hi2c->ErrorCode);
-  }
-  /* hi2c->State == HAL_I2C_STATE_BUSY_TX */
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    if (hi2c->Mode == HAL_I2C_MODE_MEM)
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      HAL_I2C_MemTxCpltCallback(hi2c);
-    }
-    else
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      /* Call the corresponding callback to inform upper layer of End of Transfer */
-      HAL_I2C_MasterTxCpltCallback(hi2c);
-    }
-  }
-  /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    if (hi2c->Mode == HAL_I2C_MODE_MEM)
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      HAL_I2C_MemRxCpltCallback(hi2c);
-    }
-    else
-    {
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      HAL_I2C_MasterRxCpltCallback(hi2c);
-    }
-  }
-}
-
-/**
-  * @brief  I2C Slave complete process.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  /* Clear STOP Flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-  /* Clear ADDR flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
-
-  /* Disable all interrupts */
-  I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT);
-
-  /* Disable Address Acknowledge */
-  hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-  /* Clear Configuration Register 2 */
-  I2C_RESET_CR2(hi2c);
-
-  /* Flush TX register */
-  I2C_Flush_TXDR(hi2c);
-
-  /* If a DMA is ongoing, Update handle size context */
-  if (((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) ||
-      ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN))
-  {
-    hi2c->XferCount = I2C_GET_DMA_REMAIN_DATA(hi2c);
-  }
-
-  /* All data are not transferred, so set error code accordingly */
-  if (hi2c->XferCount != 0U)
-  {
-    /* Set ErrorCode corresponding to a Non-Acknowledge */
-    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-  }
-
-  /* Store Last receive data if any */
-  if (((ITFlags & I2C_FLAG_RXNE) != RESET))
-  {
-    /* Read data from RXDR */
-    (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-
-    if ((hi2c->XferSize > 0U))
-    {
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-  hi2c->XferISR = NULL;
-
-  if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
-  {
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    I2C_ITError(hi2c, hi2c->ErrorCode);
-
-    /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-    if (hi2c->State == HAL_I2C_STATE_LISTEN)
-    {
-      /* Call I2C Listen complete process */
-      I2C_ITListenCplt(hi2c, ITFlags);
-    }
-  }
-  else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
-  {
-    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-    HAL_I2C_ListenCpltCallback(hi2c);
-  }
-  /* Call the corresponding callback to inform upper layer of End of Transfer */
-  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Slave Rx Complete callback */
-    HAL_I2C_SlaveRxCpltCallback(hi2c);
-  }
-  else
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the Slave Tx Complete callback */
-    HAL_I2C_SlaveTxCpltCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Listen complete process.
-  * @param  hi2c I2C handle.
-  * @param  ITFlags Interrupt flags to handle.
-  * @retval None
-  */
-static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
-{
-  /* Reset handle parameters */
-  hi2c->XferOptions = I2C_NO_OPTION_FRAME;
-  hi2c->PreviousState = I2C_STATE_NONE;
-  hi2c->State = HAL_I2C_STATE_READY;
-  hi2c->Mode = HAL_I2C_MODE_NONE;
-  hi2c->XferISR = NULL;
-
-  /* Store Last receive data if any */
-  if (((ITFlags & I2C_FLAG_RXNE) != RESET))
-  {
-    /* Read data from RXDR */
-    (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR;
-
-    if ((hi2c->XferSize > 0U))
-    {
-      hi2c->XferSize--;
-      hi2c->XferCount--;
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
-    }
-  }
-
-  /* Disable all Interrupts*/
-  I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);
-
-  /* Clear NACK Flag */
-  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2c);
-
-  /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-  HAL_I2C_ListenCpltCallback(hi2c);
-}
-
-/**
-  * @brief  I2C interrupts error process.
-  * @param  hi2c I2C handle.
-  * @param  ErrorCode Error code to handle.
-  * @retval None
-  */
-static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
-{
-  /* Reset handle parameters */
-  hi2c->Mode          = HAL_I2C_MODE_NONE;
-  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
-  hi2c->XferCount     = 0U;
-
-  /* Set new error code */
-  hi2c->ErrorCode |= ErrorCode;
-
-  /* Disable Interrupts */
-  if ((hi2c->State == HAL_I2C_STATE_LISTEN)         ||
-      (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) ||
-      (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
-  {
-    /* Disable all interrupts, except interrupts related to LISTEN state */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT);
-
-    /* keep HAL_I2C_STATE_LISTEN if set */
-    hi2c->State         = HAL_I2C_STATE_LISTEN;
-    hi2c->PreviousState = I2C_STATE_NONE;
-    hi2c->XferISR       = I2C_Slave_ISR_IT;
-  }
-  else
-  {
-    /* Disable all interrupts */
-    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);
-
-    /* If state is an abort treatment on goind, don't change state */
-    /* This change will be do later */
-    if (hi2c->State != HAL_I2C_STATE_ABORT)
-    {
-      /* Set HAL_I2C_STATE_READY */
-      hi2c->State         = HAL_I2C_STATE_READY;
-    }
-    hi2c->PreviousState = I2C_STATE_NONE;
-    hi2c->XferISR       = NULL;
-  }
-
-  /* Abort DMA TX transfer if any */
-  if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)
-  {
-    hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
-
-    /* Set the I2C DMA Abort callback :
-       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
-    hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Abort DMA TX */
-    if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
-    {
-      /* Call Directly XferAbortCallback function in case of error */
-      hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
-    }
-  }
-  /* Abort DMA RX transfer if any */
-  else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)
-  {
-    hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
-
-    /* Set the I2C DMA Abort callback :
-       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
-    hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Abort DMA RX */
-    if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
-    {
-      /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
-      hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
-    }
-  }
-  else if (hi2c->State == HAL_I2C_STATE_ABORT)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_AbortCpltCallback(hi2c);
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_ErrorCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  I2C Tx data register flush process.
-  * @param  hi2c I2C handle.
-  * @retval None
-  */
-static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
-{
-  /* If a pending TXIS flag is set */
-  /* Write a dummy data in TXDR to clear it */
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)
-  {
-    hi2c->Instance->TXDR = 0x00U;
-  }
-
-  /* Flush TX register if not empty */
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
-  {
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);
-  }
-}
-
-/**
-  * @brief  DMA I2C master transmit process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable DMA Request */
-  hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
-
-  /* If last transfer, enable STOP interrupt */
-  if (hi2c->XferCount == 0U)
-  {
-    /* Enable STOP interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-  }
-  /* else prepare a new DMA transfer and enable TCReload interrupt */
-  else
-  {
-    /* Update Buffer pointer */
-    hi2c->pBuffPtr += hi2c->XferSize;
-
-    /* Set the XferSize to transfer */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-    }
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
-
-    /* Enable TC interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);
-  }
-}
-
-/**
-  * @brief  DMA I2C slave transmit process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdma);
-
-  /* No specific action, Master fully manage the generation of STOP condition */
-  /* Mean that this generation can arrive at any time, at the end or during DMA process */
-  /* So STOP condition should be manage through Interrupt treatment */
-}
-
-/**
-  * @brief DMA I2C master receive process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable DMA Request */
-  hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
-
-  /* If last transfer, enable STOP interrupt */
-  if (hi2c->XferCount == 0U)
-  {
-    /* Enable STOP interrupt */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
-  }
-  /* else prepare a new DMA transfer and enable TCReload interrupt */
-  else
-  {
-    /* Update Buffer pointer */
-    hi2c->pBuffPtr += hi2c->XferSize;
-
-    /* Set the XferSize to transfer */
-    if (hi2c->XferCount > MAX_NBYTE_SIZE)
-    {
-      hi2c->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hi2c->XferSize = hi2c->XferCount;
-    }
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
-    /* Enable TC interrupts */
-    I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);
-  }
-}
-
-/**
-  * @brief  DMA I2C slave receive process complete callback.
-  * @param  hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hdma);
-
-  /* No specific action, Master fully manage the generation of STOP condition */
-  /* Mean that this generation can arrive at any time, at the end or during DMA process */
-  /* So STOP condition should be manage through Interrupt treatment */
-}
-
-/**
-  * @brief  DMA I2C communication error callback.
-  * @param hdma DMA handle
-  * @retval None
-  */
-static void I2C_DMAError(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable Acknowledge */
-  hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-  /* Call the corresponding callback to inform upper layer of End of Transfer */
-  I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);
-}
-
-/**
-  * @brief DMA I2C communication abort callback
-  *        (To be called at end of DMA Abort procedure).
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
-{
-  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable Acknowledge */
-  hi2c->Instance->CR2 |= I2C_CR2_NACK;
-
-  /* Reset AbortCpltCallback */
-  hi2c->hdmatx->XferAbortCallback = NULL;
-  hi2c->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if come from abort from user */
-  if (hi2c->State == HAL_I2C_STATE_ABORT)
-  {
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_AbortCpltCallback(hi2c);
-  }
-  else
-  {
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    HAL_I2C_ErrorCallback(hi2c);
-  }
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Flag Specifies the I2C flag to check.
-  * @param  Status The new Flag status (SET or RESET).
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
-  {
-    /* Check for the Timeout */
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-      {
-        hi2c->State = HAL_I2C_STATE_READY;
-        hi2c->Mode = HAL_I2C_MODE_NONE;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout for specific usage of TXIS flag.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-
-    /* Check for the Timeout */
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-      {
-        hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-        hi2c->State = HAL_I2C_STATE_READY;
-        hi2c->Mode = HAL_I2C_MODE_NONE;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hi2c);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout for specific usage of STOP flag.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-
-    /* Check for the Timeout */
-    if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-    {
-      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-      hi2c->State = HAL_I2C_STATE_READY;
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      return HAL_TIMEOUT;
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2C Communication Timeout for specific usage of RXNE flag.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
-  {
-    /* Check if a NACK is detected */
-    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
-    {
-      return HAL_ERROR;
-    }
-
-    /* Check if a STOPF is detected */
-    if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
-    {
-      /* Clear STOP Flag */
-      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-      /* Clear Configuration Register 2 */
-      I2C_RESET_CR2(hi2c);
-
-      hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
-      hi2c->State = HAL_I2C_STATE_READY;
-      hi2c->Mode = HAL_I2C_MODE_NONE;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      return HAL_ERROR;
-    }
-
-    /* Check for the Timeout */
-    if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-    {
-      hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
-      hi2c->State = HAL_I2C_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hi2c);
-
-      return HAL_TIMEOUT;
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles Acknowledge failed detection during an I2C Communication.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart Tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
-{
-  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
-  {
-    /* Wait until STOP Flag is reset */
-    /* AutoEnd should be initiate after AF */
-    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
-    {
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
-      {
-        if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
-        {
-          hi2c->State = HAL_I2C_STATE_READY;
-          hi2c->Mode = HAL_I2C_MODE_NONE;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2c);
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Clear NACKF Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
-
-    /* Clear STOP Flag */
-    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
-
-    /* Flush TX register */
-    I2C_Flush_TXDR(hi2c);
-
-    /* Clear Configuration Register 2 */
-    I2C_RESET_CR2(hi2c);
-
-    hi2c->ErrorCode = HAL_I2C_ERROR_AF;
-    hi2c->State = HAL_I2C_STATE_READY;
-    hi2c->Mode = HAL_I2C_MODE_NONE;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_ERROR;
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
-  * @param  hi2c I2C handle.
-  * @param  DevAddress Specifies the slave address to be programmed.
-  * @param  Size Specifies the number of bytes to be programmed.
-  *   This parameter must be a value between 0 and 255.
-  * @param  Mode New state of the I2C START condition generation.
-  *   This parameter can be one of the following values:
-  *     @arg @ref I2C_RELOAD_MODE Enable Reload mode .
-  *     @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode.
-  *     @arg @ref I2C_SOFTEND_MODE Enable Software end mode.
-  * @param  Request New state of the I2C START condition generation.
-  *   This parameter can be one of the following values:
-  *     @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition.
-  *     @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0).
-  *     @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
-  *     @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
-  * @retval None
-  */
-static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_TRANSFER_MODE(Mode));
-  assert_param(IS_TRANSFER_REQUEST(Request));
-
-  /* Get the CR2 register value */
-  tmpreg = hi2c->Instance->CR2;
-
-  /* clear tmpreg specific bits */
-  tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
-
-  /* update tmpreg */
-  tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16) & I2C_CR2_NBYTES) | \
-                       (uint32_t)Mode | (uint32_t)Request);
-
-  /* update CR2 register */
-  hi2c->Instance->CR2 = tmpreg;
-}
-
-/**
-  * @brief  Manage the enabling of Interrupts.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if ((hi2c->XferISR == I2C_Master_ISR_DMA) || \
-      (hi2c->XferISR == I2C_Slave_ISR_DMA))
-  {
-    if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
-    {
-      /* Enable ERR, STOP, NACK and ADDR interrupts */
-      tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
-    {
-      /* Enable ERR and NACK interrupts */
-      tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
-    {
-      /* Enable STOP interrupts */
-      tmpisr |= I2C_IT_STOPI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
-    {
-      /* Enable TC interrupts */
-      tmpisr |= I2C_IT_TCI;
-    }
-  }
-  else
-  {
-    if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
-    {
-      /* Enable ERR, STOP, NACK, and ADDR interrupts */
-      tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)
-    {
-      /* Enable ERR, TC, STOP, NACK and RXI interrupts */
-      tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)
-    {
-      /* Enable ERR, TC, STOP, NACK and TXI interrupts */
-      tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI;
-    }
-
-    if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
-    {
-      /* Enable STOP interrupts */
-      tmpisr |= I2C_IT_STOPI;
-    }
-  }
-
-  /* Enable interrupts only at the end */
-  /* to avoid the risk of I2C interrupt handle execution before */
-  /* all interrupts requested done */
-  __HAL_I2C_ENABLE_IT(hi2c, tmpisr);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Manage the disabling of Interrupts.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2C.
-  * @param  InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)
-  {
-    /* Disable TC and TXI interrupts */
-    tmpisr |= I2C_IT_TCI | I2C_IT_TXI;
-
-    if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN)
-    {
-      /* Disable NACK and STOP interrupts */
-      tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-  }
-
-  if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)
-  {
-    /* Disable TC and RXI interrupts */
-    tmpisr |= I2C_IT_TCI | I2C_IT_RXI;
-
-    if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN)
-    {
-      /* Disable NACK and STOP interrupts */
-      tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-    }
-  }
-
-  if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)
-  {
-    /* Disable ADDR, NACK and STOP interrupts */
-    tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
-  }
-
-  if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
-  {
-    /* Enable ERR and NACK interrupts */
-    tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
-  }
-
-  if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
-  {
-    /* Enable STOP interrupts */
-    tmpisr |= I2C_IT_STOPI;
-  }
-
-  if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
-  {
-    /* Enable TC interrupts */
-    tmpisr |= I2C_IT_TCI;
-  }
-
-  /* Disable interrupts only at the end */
-  /* to avoid a breaking situation like at "t" time */
-  /* all disable interrupts request are not done */
-  __HAL_I2C_DISABLE_IT(hi2c, tmpisr);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_I2C_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_i2c_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_i2c_ex.c
deleted file mode 100644
index 6c24c54b..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_i2c_ex.c
+++ /dev/null
@@ -1,347 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_i2c_ex.c
-  * @author  MCD Application Team
-  * @brief   I2C Extended HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of I2C Extended peripheral:
-  *           + Extended features functions
-  *
-  @verbatim
-  ==============================================================================
-               ##### I2C peripheral Extended features  #####
-  ==============================================================================
-
-  [..] Comparing to other previous devices, the I2C interface for STM32F0xx
-       devices contains the following additional features
-
-       (+) Possibility to disable or enable Analog Noise Filter
-       (+) Use of a configured Digital Noise Filter
-       (+) Disable or enable wakeup from Stop mode
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..] This driver provides functions to configure Noise Filter and Wake Up Feature
-    (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
-    (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
-    (#) Configure the enable or disable of I2C Wake Up Mode using the functions :
-          (++) HAL_I2CEx_EnableWakeUp()
-          (++) HAL_I2CEx_DisableWakeUp()
-    (#) Configure the enable or disable of fast mode plus driving capability using the functions :
-          (++) HAL_I2CEx_EnableFastModePlus()
-          (++) HAL_I2CEx_DisableFastModePlus()
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup I2CEx I2CEx
-  * @brief I2C Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_I2C_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
-  * @{
-  */
-
-/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
-  * @brief    Extended features functions
- *
-@verbatim
- ===============================================================================
-                      ##### Extended features functions #####
- ===============================================================================
-    [..] This section provides functions allowing to:
-      (+) Configure Noise Filters
-      (+) Configure Wake Up Feature
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configure I2C Analog noise filter.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @param  AnalogFilter New state of the Analog filter.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Reset I2Cx ANOFF bit */
-    hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
-
-    /* Set analog filter bit*/
-    hi2c->Instance->CR1 |= AnalogFilter;
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Configure I2C Digital noise filter.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @param  DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
-  assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Get the old register value */
-    tmpreg = hi2c->Instance->CR1;
-
-    /* Reset I2Cx DNF bits [11:8] */
-    tmpreg &= ~(I2C_CR1_DNF);
-
-    /* Set I2Cx DNF coefficient */
-    tmpreg |= DigitalFilter << 8U;
-
-    /* Store the new register value */
-    hi2c->Instance->CR1 = tmpreg;
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-#if defined(I2C_CR1_WUPEN)
-
-/**
-  * @brief  Enable I2C wakeup from stop mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Enable wakeup from stop mode */
-    hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Disable I2C wakeup from stop mode.
-  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
-  *                the configuration information for the specified I2Cx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c)
-{
-  /* Check the parameters */
-  assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
-
-  if (hi2c->State == HAL_I2C_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_BUSY;
-
-    /* Disable the selected I2C peripheral */
-    __HAL_I2C_DISABLE(hi2c);
-
-    /* Enable wakeup from stop mode */
-    hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
-
-    __HAL_I2C_ENABLE(hi2c);
-
-    hi2c->State = HAL_I2C_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2c);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-#endif
-
-/**
-  * @brief Enable the I2C fast mode plus driving capability.
-  * @param ConfigFastModePlus Selects the pin.
-  *   This parameter can be one of the @ref I2CEx_FastModePlus values
-  * @note  For I2C1, fast mode plus driving capability can be enabled on all selected
-  *        I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
-  *        on each one of the following pins PB6, PB7, PB8 and PB9.
-  * @note  For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
-  *        can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
-  * @note  For all I2C2 pins fast mode plus driving capability can be enabled
-  *        only by using I2C_FASTMODEPLUS_I2C2 parameter.
-  * @retval None
-  */
-void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
-{
-  /* Check the parameter */
-  assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
-
-  /* Enable SYSCFG clock */
-  __HAL_RCC_SYSCFG_CLK_ENABLE();
-
-  /* Enable fast mode plus driving capability for selected pin */
-  SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
-}
-
-/**
-  * @brief Disable the I2C fast mode plus driving capability.
-  * @param ConfigFastModePlus Selects the pin.
-  *   This parameter can be one of the @ref I2CEx_FastModePlus values
-  * @note  For I2C1, fast mode plus driving capability can be disabled on all selected
-  *        I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
-  *        on each one of the following pins PB6, PB7, PB8 and PB9.
-  * @note  For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
-  *        can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
-  * @note  For all I2C2 pins fast mode plus driving capability can be disabled
-  *        only by using I2C_FASTMODEPLUS_I2C2 parameter.
-  * @retval None
-  */
-void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
-{
-  /* Check the parameter */
-  assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
-
-  /* Enable SYSCFG clock */
-  __HAL_RCC_SYSCFG_CLK_ENABLE();
-
-  /* Disable fast mode plus driving capability for selected pin */
-  CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_I2C_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_i2s.c b/lib/hal-stm32f0/source/stm32f0xx_hal_i2s.c
deleted file mode 100644
index d0fe3dad..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_i2s.c
+++ /dev/null
@@ -1,1411 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_i2s.c
-  * @author  MCD Application Team
-  * @brief   I2S HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Integrated Interchip Sound (I2S) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  @verbatim
- ===============================================================================
-                  ##### How to use this driver #####
- ===============================================================================
- [..]
-    The I2S HAL driver can be used as follow:
-    
-    (#) Declare a I2S_HandleTypeDef handle structure.
-    (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
-        (##) Enable the SPIx interface clock.                      
-        (##) I2S pins configuration:
-            (+++) Enable the clock for the I2S GPIOs.
-            (+++) Configure these I2S pins as alternate function pull-up.
-        (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
-             and HAL_I2S_Receive_IT() APIs).
-            (+++) Configure the I2Sx interrupt priority.
-            (+++) Enable the NVIC I2S IRQ handle.
-        (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
-             and HAL_I2S_Receive_DMA() APIs:
-            (+++) Declare a DMA handle structure for the Tx/Rx Channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.                
-            (+++) Configure the DMA Tx/Rx Channel.
-            (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the 
-                  DMA Tx/Rx Channel.
-
-   (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
-       using HAL_I2S_Init() function.
-
-   -@- The specific I2S interrupts (Transmission complete interrupt, 
-       RXNE interrupt and Error Interrupts) will be managed using the macros
-       __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
-   -@- Make sure that either:
-       (+@) External clock source is configured after setting correctly 
-            the define constant EXTERNAL_CLOCK_VALUE in the stm32f0xx_hal_conf.h file. 
-
-    (#) Three mode of operations are available within this driver :     
-
-   *** Polling mode IO operation ***
-   =================================
-   [..]    
-     (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() 
-     (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
-   
-   *** Interrupt mode IO operation ***
-   ===================================
-   [..]    
-     (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() 
-     (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback 
-     (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxCpltCallback
-     (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() 
-     (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback 
-     (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxCpltCallback
-     (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_ErrorCallback
-
-   *** DMA mode IO operation ***
-   ==============================
-   [..] 
-     (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() 
-     (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback 
-     (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_TxCpltCallback
-     (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() 
-     (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback 
-     (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_RxCpltCallback
-     (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can 
-         add his own code by customization of function pointer HAL_I2S_ErrorCallback
-     (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
-     (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
-     (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
-
-   *** I2S HAL driver macros list ***
-   =============================================
-   [..]
-     Below the list of most used macros in I2S HAL driver.
-       
-      (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) 
-      (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
-      (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
-      (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
-      (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
-
-    [..]
-      (@) You can refer to the I2S HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#ifdef HAL_I2S_MODULE_ENABLED
-
-#if defined(STM32F031x6) || defined(STM32F038xx) || \
-    defined(STM32F051x8) || defined(STM32F058xx) || \
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F042x6) || defined(STM32F048xx) || \
-    defined(STM32F091xC) || defined(STM32F098xx)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup I2S I2S
-  * @brief I2S HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup I2S_Private_Functions I2S Private Functions
-  * @{
-  */
-static void               I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
-static void               I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); 
-static void               I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
-static void               I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
-static void               I2S_DMAError(DMA_HandleTypeDef *hdma);
-static void               I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
-static void               I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
-static HAL_StatusTypeDef  I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup I2S_Exported_Functions I2S Exported Functions
-  * @{
-  */
-
-/** @defgroup  I2S_Exported_Functions_Group1 Initialization and de-initialization functions 
-  *  @brief    Initialization and Configuration functions 
-  *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and 
-          de-initialiaze the I2Sx peripheral in simplex mode:
-
-      (+) User must Implement HAL_I2S_MspInit() function in which he configures 
-          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
-
-      (+) Call the function HAL_I2S_Init() to configure the selected device with 
-          the selected configuration:
-        (++) Mode
-        (++) Standard 
-        (++) Data Format
-        (++) MCLK Output
-        (++) Audio frequency
-        (++) Polarity
-
-     (+) Call the function HAL_I2S_DeInit() to restore the default configuration 
-         of the selected I2Sx periperal. 
-  @endverbatim
-  * @{
-  */
-
-/**
-  * @brief Initializes the I2S according to the specified parameters 
-  *         in the I2S_InitTypeDef and create the associated handle.
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
-{
-  uint32_t tmpreg = 0U, i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;
-  uint32_t tmp = 0U, i2sclk = 0U;
-  
-  /* Check the I2S handle allocation */
-  if(hi2s == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the I2S parameters */
-  assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
-  assert_param(IS_I2S_MODE(hi2s->Init.Mode));
-  assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
-  assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
-  assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
-  assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
-  assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
-  
-  if(hi2s->State == HAL_I2S_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hi2s->Lock = HAL_UNLOCKED;
-    
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
-    HAL_I2S_MspInit(hi2s);
-  }
-  
-  hi2s->State = HAL_I2S_STATE_BUSY;
-  
-  /*----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------*/
-  /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
-  hi2s->Instance->I2SCFGR &= (uint16_t)(~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
-                                          SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
-                                          SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD)); 
-  hi2s->Instance->I2SPR = 0x0002U;
-  
-  /* Get the I2SCFGR register value */
-  tmpreg = hi2s->Instance->I2SCFGR;
-  
-  /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
-  if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
-  {
-    i2sodd = (uint16_t)0U;
-    i2sdiv = (uint16_t)2U;   
-  }
-  /* If the requested audio frequency is not the default, compute the prescaler */
-  else
-  {
-    /* Check the frame length (For the Prescaler computing) *******************/
-    if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
-    {
-      /* Packet length is 16 bits */
-      packetlength = 1U;
-    }
-    else
-    {
-      /* Packet length is 32 bits */
-      packetlength = 2U;
-    }
-
-    /* Get I2S source Clock frequency  ****************************************/
-    i2sclk = HAL_RCC_GetSysClockFreq();
-    
-    /* Compute the Real divider depending on the MCLK output state, with a floating point */
-    if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
-    {
-      /* MCLK output is enabled */
-      tmp = (uint32_t)(((((i2sclk / 256U) * 10U) / hi2s->Init.AudioFreq)) + 5U);
-    }
-    else
-    {
-      /* MCLK output is disabled */
-      tmp = (uint32_t)(((((i2sclk / (32U * packetlength)) *10U ) / hi2s->Init.AudioFreq)) + 5U);
-    }
-
-    /* Remove the flatting point */
-    tmp = tmp / 10U;  
-
-    /* Check the parity of the divider */
-    i2sodd = (uint32_t)(tmp & 1U);
-
-    /* Compute the i2sdiv prescaler */
-    i2sdiv = (uint32_t)((tmp - i2sodd) / 2U);
-
-    /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
-    i2sodd = (uint32_t) (i2sodd << 8U);
-  }
-
-  /* Test if the divider is 1 or 0 or greater than 0xFF */
-  if((i2sdiv < 2U) || (i2sdiv > 0xFFU))
-  {
-    /* Set the default values */
-    i2sdiv = 2U;
-    i2sodd = 0U;
-  }
-  
-  /* Write to SPIx I2SPR register the computed value */
-  hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
-  
-  /* Configure the I2S with the I2S_InitStruct values */
-  tmpreg |= (uint32_t)(SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode | hi2s->Init.Standard | hi2s->Init.DataFormat | hi2s->Init.CPOL);
-  
-  /* Write to SPIx I2SCFGR */  
-  hi2s->Instance->I2SCFGR = tmpreg;
-  
-  hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-  hi2s->State= HAL_I2S_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief DeInitializes the I2S peripheral 
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
-{
-  /* Check the I2S handle allocation */
-  if(hi2s == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
-
-  hi2s->State = HAL_I2S_STATE_BUSY;
-  
-  /* Disable the I2S Peripheral Clock */
-  __HAL_I2S_DISABLE(hi2s);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
-  HAL_I2S_MspDeInit(hi2s);
-  
-  hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-  hi2s->State = HAL_I2S_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hi2s);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief I2S MSP Init
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_MspInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief I2S MSP DeInit
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_MspDeInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Exported_Functions_Group2 IO operation functions 
-  *  @brief Data transfers functions 
-  *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to manage the I2S data 
-    transfers.
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode : The communication is performed in the polling mode. 
-            The status of all data processing is returned by the same function 
-            after finishing transfer.  
-       (++) No-Blocking mode : The communication is performed using Interrupts 
-            or DMA. These functions return the status of the transfer startup.
-            The end of the data processing will be indicated through the 
-            dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when 
-            using DMA mode.
-
-    (#) Blocking mode functions are :
-        (++) HAL_I2S_Transmit()
-        (++) HAL_I2S_Receive()
-        
-    (#) No-Blocking mode functions with Interrupt are :
-        (++) HAL_I2S_Transmit_IT()
-        (++) HAL_I2S_Receive_IT()
-
-    (#) No-Blocking mode functions with DMA are :
-        (++) HAL_I2S_Transmit_DMA()
-        (++) HAL_I2S_Receive_DMA()
-
-    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
-        (++) HAL_I2S_TxCpltCallback()
-        (++) HAL_I2S_RxCpltCallback()
-        (++) HAL_I2S_ErrorCallback()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Transmit an amount of data in blocking mode
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData a 16-bit pointer to data buffer.
-  * @param Size number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @param  Timeout Timeout duration
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  if((pData == NULL ) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;                                    
-  }
-  
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  { 
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->TxXferSize = (Size << 1U);
-      hi2s->TxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->TxXferSize = Size;
-      hi2s->TxXferCount = Size;
-    }
-     
-    /* Set state and reset error code */
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-    hi2s->State = HAL_I2S_STATE_BUSY_TX;
-    hi2s->pTxBuffPtr = pData;
-      
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-    
-    while(hi2s->TxXferCount > 0U)
-    {
-      /* Wait until TXE flag is set */
-      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
-      hi2s->TxXferCount--;   
-    } 
-
-    /* Wait until TXE flag is set, to confirm the end of the transcation */
-    if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    } 
-    /* Wait until Busy flag is reset */
-    if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    hi2s->State = HAL_I2S_STATE_READY; 
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in blocking mode 
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData a 16-bit pointer to data buffer.
-  * @param Size number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @param Timeout Timeout duration
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
-  *       in continouse way and as the I2S is not disabled at the end of the I2S transaction.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  if((pData == NULL ) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;
-  }
-  
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  { 
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->RxXferSize = (Size << 1U);
-      hi2s->RxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->RxXferSize = Size;
-      hi2s->RxXferCount = Size;
-    }
-        
-    /* Set state and reset error code */
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-    hi2s->State = HAL_I2S_STATE_BUSY_RX;
-    hi2s->pRxBuffPtr = pData;
-    
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-     
-    /* Receive data */
-    while(hi2s->RxXferCount > 0U)
-    {
-      /* Wait until RXNE flag is set */
-      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      
-      (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
-      hi2s->RxXferCount--;
-    }
-    
-    hi2s->State = HAL_I2S_STATE_READY; 
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Transmit an amount of data in non-blocking mode with Interrupt
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData a 16-bit pointer to data buffer.
-  * @param Size number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-  if((pData == NULL) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;
-  }
-  
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-    
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {
-    hi2s->pTxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_TX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->TxXferSize = (Size << 1U);
-      hi2s->TxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->TxXferSize = Size;
-      hi2s->TxXferCount = Size;
-    }
-
-    /* Enable TXE and ERR interrupt */
-    __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
-
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in non-blocking mode with Interrupt
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData a 16-bit pointer to the Receive data buffer.
-  * @param Size number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation 
-  * between Master and Slave otherwise the I2S interrupt should be optimized. 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-    if((pData == NULL) || (Size == 0U)) 
-    {
-      return  HAL_ERROR;
-    }
-
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {
-    hi2s->pRxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_RX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->RxXferSize = (Size << 1U);
-      hi2s->RxXferCount = (Size << 1U);
-    }  
-    else
-    {
-      hi2s->RxXferSize = Size;
-      hi2s->RxXferCount = Size;
-    }
-    
-    /* Enable TXE and ERR interrupt */
-    __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
-    
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY; 
-  } 
-}
-
-/**
-  * @brief Transmit an amount of data in non-blocking mode with DMA
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData a 16-bit pointer to the Transmit data buffer.
-  * @param Size number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-  if((pData == NULL) || (Size == 0U)) 
-  {
-    return  HAL_ERROR;
-  }
-
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {  
-    hi2s->pTxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_TX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->TxXferSize = (Size << 1U);
-      hi2s->TxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->TxXferSize = Size;
-      hi2s->TxXferCount = Size;
-    }
-
-    /* Set the I2S Tx DMA Half transfert complete callback */
-    hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
-
-    /* Set the I2S Tx DMA transfert complete callback */
-    hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
-
-    /* Set the DMA error callback */
-    hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
-
-    /* Enable the Tx DMA Channel */
-    HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
-
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-    /* Check if the I2S Tx request is already enabled */ 
-    if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN)
-    {
-      /* Enable Tx DMA Request */  
-      hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in non-blocking mode with DMA 
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param pData a 16-bit pointer to the Receive data buffer.
-  * @param Size number of data sample to be sent:
-  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
-  *       configuration phase, the Size parameter means the number of 16-bit data length 
-  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected 
-  *       the Size parameter means the number of 16-bit data length. 
-  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization 
-  *       between Master and Slave(example: audio streaming).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
-{
-  if((pData == NULL) || (Size == 0U))
-  {
-    return  HAL_ERROR;
-  }
-
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-
-  if(hi2s->State == HAL_I2S_STATE_READY)
-  {
-    hi2s->pRxBuffPtr = pData;
-    hi2s->State = HAL_I2S_STATE_BUSY_RX;
-    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
-
-    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
-      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
-    {
-      hi2s->RxXferSize = (Size << 1U);
-      hi2s->RxXferCount = (Size << 1U);
-    }
-    else
-    {
-      hi2s->RxXferSize = Size;
-      hi2s->RxXferCount = Size;
-    }
-    
-    
-    /* Set the I2S Rx DMA Half transfert complete callback */
-    hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
-    
-    /* Set the I2S Rx DMA transfert complete callback */
-    hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
-    
-    /* Set the DMA error callback */
-    hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
-    
-    /* Check if Master Receiver mode is selected */
-    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
-    {
-      /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
-      access to the SPI_SR register. */ 
-      __HAL_I2S_CLEAR_OVRFLAG(hi2s);
-    }
-    
-    /* Enable the Rx DMA Channel */
-    HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
-    
-    /* Check if the I2S is already enabled */ 
-    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
-    {
-      /* Enable I2S peripheral */
-      __HAL_I2S_ENABLE(hi2s);
-    }
-
-     /* Check if the I2S Rx request is already enabled */ 
-    if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN)
-    {
-      /* Enable Rx DMA Request */  
-      hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hi2s);
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Pauses the audio stream playing from the Media.
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
-{
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
-  {
-    /* Disable the I2S DMA Tx request */
-    hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
-  }
-  else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
-  {
-    /* Disable the I2S DMA Rx request */
-    hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
-  }
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2s);
-  
-  return HAL_OK; 
-}
-
-/**
-  * @brief Resumes the audio stream playing from the Media.
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
-{
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
-  {
-    /* Enable the I2S DMA Tx request */
-    hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
-  }
-  else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
-  {
-    /* Enable the I2S DMA Rx request */
-    hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
-  }
-  
-  /* If the I2S peripheral is still not enabled, enable it */
-  if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0U)
-  {
-    /* Enable I2S peripheral */    
-    __HAL_I2S_ENABLE(hi2s);
-  }
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2s);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief Resumes the audio stream playing from the Media.
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
-{
-  /* Process Locked */
-  __HAL_LOCK(hi2s);
-  
-  /* Disable the I2S Tx/Rx DMA requests */
-  hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
-  hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
-  
-  /* Abort the I2S DMA tx channel */
-  if(hi2s->hdmatx != NULL)
-  {
-    /* Disable the I2S DMA channel */
-    __HAL_DMA_DISABLE(hi2s->hdmatx);
-    HAL_DMA_Abort(hi2s->hdmatx);
-  }
-  /* Abort the I2S DMA rx channel */
-  if(hi2s->hdmarx != NULL)
-  {
-    /* Disable the I2S DMA channel */
-    __HAL_DMA_DISABLE(hi2s->hdmarx);
-    HAL_DMA_Abort(hi2s->hdmarx);
-  }
-
-  /* Disable I2S peripheral */
-  __HAL_I2S_DISABLE(hi2s);
-  
-  hi2s->State = HAL_I2S_STATE_READY;
-  
-  /* Process Unlocked */
-  __HAL_UNLOCK(hi2s);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles I2S interrupt request.
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
-{  
-  uint32_t i2ssr = hi2s->Instance->SR;
-  
-  /* I2S in mode Receiver ------------------------------------------------*/
-  if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
-     ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
-  {
-    I2S_Receive_IT(hi2s);
-    return;
-  }
-  
-  /* I2S in mode Tramitter -----------------------------------------------*/
-  if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
-  {     
-    I2S_Transmit_IT(hi2s);
-    return;
-  } 
-  
-  /* I2S Overrun error interrupt occured ---------------------------------*/
-  if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
-  {
-    /* Disable RXNE and ERR interrupt */
-    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
-    
-    /* Set the I2S State ready */
-    hi2s->State = HAL_I2S_STATE_READY; 
-    
-    /* Set the error code and execute error callback*/
-    hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
-    HAL_I2S_ErrorCallback(hi2s);
-  } 
-  
-  /* I2S Underrun error interrupt occured --------------------------------*/
-  if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
-  {
-    /* Disable TXE and ERR interrupt */
-    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
-    
-    /* Set the I2S State ready */
-    hi2s->State = HAL_I2S_STATE_READY; 
-    
-    /* Set the error code and execute error callback*/
-    hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
-    HAL_I2S_ErrorCallback(hi2s);
-  }
-}
-
-/**
-  * @brief Tx Transfer Half completed callbacks
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief Tx Transfer completed callbacks
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_TxCpltCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief Rx Transfer half completed callbacks
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-__weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_RxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief Rx Transfer completed callbacks
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_RxCpltCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief I2S error callbacks
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
- __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hi2s);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_I2S_ErrorCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions 
-  *  @brief   Peripheral State functions 
-  *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral State and Errors functions #####
- ===============================================================================  
-    [..]
-    This subsection permits to get in run-time the status of the peripheral 
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the I2S state
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval HAL state
-  */
-HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
-{
-  return hi2s->State;
-}
-
-/**
-  * @brief  Return the I2S error code
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval I2S Error Code
-  */
-uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
-{
-  return hi2s->ErrorCode;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup I2S_Private_Functions I2S Private Functions
-  * @{
-  */
-/**
-  * @brief DMA I2S transmit process complete callback 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-  
-  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-  {
-    /* Disable Tx DMA Request */
-    hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
-
-    hi2s->TxXferCount = 0U;
-    hi2s->State = HAL_I2S_STATE_READY;
-  }
-  HAL_I2S_TxCpltCallback(hi2s);
-}
-
-/**
-  * @brief DMA I2S transmit process half complete callback 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
-  HAL_I2S_TxHalfCpltCallback(hi2s);
-}
-
-/**
-  * @brief DMA I2S receive process complete callback 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
-  {
-    /* Disable Rx DMA Request */
-    hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
-    hi2s->RxXferCount = 0;
-    hi2s->State = HAL_I2S_STATE_READY;
-  }
-  HAL_I2S_RxCpltCallback(hi2s); 
-}
-
-/**
-  * @brief DMA I2S receive process half complete callback 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
-
-  HAL_I2S_RxHalfCpltCallback(hi2s); 
-}
-
-/**
-  * @brief DMA I2S communication error callback 
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void I2S_DMAError(DMA_HandleTypeDef *hdma)
-{
-  I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  
-  /* Disable Rx and Tx DMA Request */
-  hi2s->Instance->CR2 &= (uint16_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
-  hi2s->TxXferCount = 0U;
-  hi2s->RxXferCount = 0U;
-  
-  hi2s->State= HAL_I2S_STATE_READY;
-  
-  /* Set the error code and execute error callback*/
-  hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
-  HAL_I2S_ErrorCallback(hi2s);
-}
-
-/**
-  * @brief Transmit an amount of data in non-blocking mode with Interrupt
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @retval None
-  */
-static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
-{
-  /* Transmit data */
-  hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
-  hi2s->TxXferCount--;
-    
-  if(hi2s->TxXferCount == 0)
-  {
-    /* Disable TXE and ERR interrupt */
-    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
-
-    hi2s->State = HAL_I2S_STATE_READY;
-    HAL_I2S_TxCpltCallback(hi2s);
-  }
-}
-
-/**
-* @brief Receive an amount of data in non-blocking mode with Interrupt
-* @param hi2s I2S handle
-  * @retval None
-*/
-static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
-{
-  /* Receive data */    
-  (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
-  hi2s->RxXferCount--;
-  
-  if(hi2s->RxXferCount == 0U)
-  {
-    /* Disable RXNE and ERR interrupt */
-    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
-
-    hi2s->State = HAL_I2S_STATE_READY;     
-    HAL_I2S_RxCpltCallback(hi2s); 
-  }
-}
-
-
-/**
-  * @brief This function handles I2S Communication Timeout.
-  * @param  hi2s pointer to a I2S_HandleTypeDef structure that contains
-  *         the configuration information for I2S module
-  * @param Flag Flag checked
-  * @param State Value of the flag expected
-  * @param Timeout Duration of the timeout
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-  
-  /* Wait until flag is set */
-  if(State == RESET)
-  {
-    while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
-    {
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-        {
-          /* Set the I2S State ready */
-          hi2s->State= HAL_I2S_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2s);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  else
-  {
-    while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
-    {
-      if(Timeout != HAL_MAX_DELAY)
-      {
-        if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-        {
-          /* Set the I2S State ready */
-          hi2s->State= HAL_I2S_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hi2s);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(STM32F031x6) || defined(STM32F038xx) || */
-       /* defined(STM32F051x8) || defined(STM32F058xx) || */
-       /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */
-       /* defined(STM32F042x6) || defined(STM32F048xx) || */
-       /* defined(STM32F091xC) || defined(STM32F098xx) */
-
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_irda.c b/lib/hal-stm32f0/source/stm32f0xx_hal_irda.c
deleted file mode 100644
index 606972ce..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_irda.c
+++ /dev/null
@@ -1,2379 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_irda.c
-  * @author  MCD Application Team
-  * @brief   IRDA HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the IrDA (Infrared Data Association) Peripheral
-  *          (IRDA)
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  *           + Peripheral Control functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    The IRDA HAL driver can be used as follows:
-
-    (#) Declare a IRDA_HandleTypeDef handle structure (eg. IRDA_HandleTypeDef hirda).
-    (#) Initialize the IRDA low level resources by implementing the HAL_IRDA_MspInit() API
-        in setting the associated USART or UART in IRDA mode:
-        (++) Enable the USARTx/UARTx interface clock.
-        (++) USARTx/UARTx pins configuration:
-            (+++) Enable the clock for the USARTx/UARTx GPIOs.
-            (+++) Configure these USARTx/UARTx pins (TX as alternate function pull-up, RX as alternate function Input).
-        (++) NVIC configuration if you need to use interrupt process (HAL_IRDA_Transmit_IT()
-             and HAL_IRDA_Receive_IT() APIs): 
-            (+++) Configure the USARTx/UARTx interrupt priority.
-            (+++) Enable the NVIC USARTx/UARTx IRQ handle.            
-            (+++) The specific IRDA interrupts (Transmission complete interrupt,
-                  RXNE interrupt and Error Interrupts) will be managed using the macros
-                  __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
-                
-        (++) DMA Configuration if you need to use DMA process (HAL_IRDA_Transmit_DMA()
-             and HAL_IRDA_Receive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the IRDA DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-    (#) Program the Baud Rate, Word Length and Parity and Mode(Receiver/Transmitter),
-        the normal or low power mode and the clock prescaler in the hirda handle Init structure.
-
-    (#) Initialize the IRDA registers by calling the HAL_IRDA_Init() API:
-        (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-             by calling the customized HAL_IRDA_MspInit() API.
-        
-         -@@- The specific IRDA interrupts (Transmission complete interrupt,
-             RXNE interrupt and Error Interrupts) will be managed using the macros
-             __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
-
-    (#) Three operation modes are available within this driver :
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]
-       (+) Send an amount of data in blocking mode using HAL_IRDA_Transmit()
-       (+) Receive an amount of data in blocking mode using HAL_IRDA_Receive()
-
-     *** Interrupt mode IO operation ***
-     ===================================
-     [..]
-       (+) Send an amount of data in non-blocking mode using HAL_IRDA_Transmit_IT()
-       (+) At transmission end of transfer HAL_IRDA_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode using HAL_IRDA_Receive_IT()
-       (+) At reception end of transfer HAL_IRDA_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_RxCpltCallback()
-       (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_ErrorCallback()
-
-     *** DMA mode IO operation ***
-     ==============================
-     [..]
-       (+) Send an amount of data in non-blocking mode (DMA) using HAL_IRDA_Transmit_DMA()
-       (+) At transmission half of transfer HAL_IRDA_TxHalfCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_TxHalfCpltCallback()
-       (+) At transmission end of transfer HAL_IRDA_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode (DMA) using HAL_IRDA_Receive_DMA()
-       (+) At reception half of transfer HAL_IRDA_RxHalfCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_RxHalfCpltCallback()
-       (+) At reception end of transfer HAL_IRDA_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_RxCpltCallback()
-       (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_IRDA_ErrorCallback()
-
-     *** IRDA HAL driver macros list ***
-     ====================================
-     [..]
-       Below the list of most used macros in IRDA HAL driver.
-
-       (+) __HAL_IRDA_ENABLE: Enable the IRDA peripheral
-       (+) __HAL_IRDA_DISABLE: Disable the IRDA peripheral
-       (+) __HAL_IRDA_GET_FLAG : Check whether the specified IRDA flag is set or not
-       (+) __HAL_IRDA_CLEAR_FLAG : Clear the specified IRDA pending flag
-       (+) __HAL_IRDA_ENABLE_IT: Enable the specified IRDA interrupt
-       (+) __HAL_IRDA_DISABLE_IT: Disable the specified IRDA interrupt
-       (+) __HAL_IRDA_GET_IT_SOURCE: Check whether or not the specified IRDA interrupt is enabled
-
-     [..]
-       (@) You can refer to the IRDA HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup IRDA IRDA
-  * @brief HAL IRDA module driver
-  * @{
-  */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup IRDA_Private_Constants IRDA Private Constants
-  * @{
-  */
-#define IRDA_TEACK_REACK_TIMEOUT            1000U                                  /*!< IRDA TX or RX enable acknowledge time-out value  */
-#define IRDA_CR1_FIELDS  ((uint32_t)(USART_CR1_M | USART_CR1_PCE \
-                                   | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE))  /*!< UART or USART CR1 fields of parameters set by IRDA_SetConfig API */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup IRDA_Private_Functions
-  * @{
-  */
-static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda);
-static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda);
-static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAError(DMA_HandleTypeDef *hdma);
-static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup IRDA_Exported_Functions IRDA Exported Functions
-  * @{
-  */
-
-/** @defgroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions
-  *
-@verbatim
-  ==============================================================================
-              ##### Initialization and Configuration functions #####
-  ==============================================================================
-  [..]
-  This subsection provides a set of functions allowing to initialize the USARTx
-  in asynchronous IRDA mode.
-  (+) For the asynchronous mode only these parameters can be configured:
-      (++) Baud Rate
-      (++) Word Length
-      (++) Parity
-      (++) Power mode
-      (++) Prescaler setting
-      (++) Receiver/transmitter modes
-
-  [..]
-  The HAL_IRDA_Init() API follows the USART asynchronous configuration procedures
-  (details for the procedures are available in reference manual).
-
-@endverbatim
-  * @{
-  */
-
-/*
-  Additional Table:  If the parity is enabled, then the MSB bit of the data written
-                     in the data register is transmitted but is changed by the parity bit.
-                     According to device capability (support or not of 7-bit word length),
-                     frame length is either defined by the M bit (8-bits or 9-bits)
-                     or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
-                     Possible IRDA frame formats are as listed in the following table:
-
-    Table 1. IRDA frame format.             
-    +-----------------------------------------------------------------------+
-    |       M bit       |  PCE bit  |             IRDA frame                |
-    |-------------------|-----------|---------------------------------------|
-    |         0         |     0     |    | SB |    8-bit data   | STB |     |
-    |-------------------|-----------|---------------------------------------|
-    |         0         |     1     |    | SB | 7-bit data | PB | STB |     |
-    |-------------------|-----------|---------------------------------------|
-    |         1         |     0     |    | SB |    9-bit data   | STB |     |
-    |-------------------|-----------|---------------------------------------|
-    |         1         |     1     |    | SB | 8-bit data | PB | STB |     |
-    +-----------------------------------------------------------------------+
-    |  M1 bit |  M0 bit |  PCE bit  |             IRDA frame                |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |     0     |    | SB |    8 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    0    |     1     |    | SB | 7 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |     0     |    | SB |    9 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    0    |    1    |     1     |    | SB | 8 bit data | PB | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |     0     |    | SB |    7 bit data   | STB |     |
-    |---------|---------|-----------|---------------------------------------|
-    |    1    |    0    |     1     |    | SB | 6 bit data | PB | STB |     |
-    +-----------------------------------------------------------------------+
-
-*/
-
-/**
-  * @brief Initialize the IRDA mode according to the specified
-  *        parameters in the IRDA_InitTypeDef and initialize the associated handle.
-  * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
-{
-  /* Check the IRDA handle allocation */
-  if(hirda == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART/UART associated to the IRDA handle */
-  assert_param(IS_IRDA_INSTANCE(hirda->Instance));
-
-  if(hirda->gState == HAL_IRDA_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hirda->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_IRDA_MspInit(hirda);
-  }
-
-  hirda->gState = HAL_IRDA_STATE_BUSY;
-
-  /* Disable the Peripheral to update the configuration registers */
-  __HAL_IRDA_DISABLE(hirda);
-
-  /* Set the IRDA Communication parameters */
-  if (IRDA_SetConfig(hirda) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In IRDA mode, the following bits must be kept cleared:
-  - LINEN, STOP and CLKEN bits in the USART_CR2 register,
-  - SCEN and HDSEL bits in the USART_CR3 register.*/
-  CLEAR_BIT(hirda->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
-  CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
-
-  /* set the UART/USART in IRDA mode */
-  hirda->Instance->CR3 |= USART_CR3_IREN;
-
-  /* Enable the Peripheral */
-  __HAL_IRDA_ENABLE(hirda);
-
-  /* TEACK and/or REACK to check before moving hirda->gState and hirda->RxState to Ready */
-  return (IRDA_CheckIdleState(hirda));
-}
-
-/**
-  * @brief DeInitialize the IRDA peripheral.
-  * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
-{
-  /* Check the IRDA handle allocation */
-  if(hirda == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART/UART associated to the IRDA handle */
-  assert_param(IS_IRDA_INSTANCE(hirda->Instance));
-
-  hirda->gState = HAL_IRDA_STATE_BUSY;
-
-  /* DeInit the low level hardware */
-  HAL_IRDA_MspDeInit(hirda);
-  /* Disable the Peripheral */
-  __HAL_IRDA_DISABLE(hirda);
-
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-  hirda->gState    = HAL_IRDA_STATE_RESET;
-  hirda->RxState   = HAL_IRDA_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the IRDA MSP.
-  * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_IRDA_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the IRDA MSP.
-  * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_IRDA_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Exported_Functions_Group2 IO operation functions
-  *  @brief   IRDA Transmit and Receive functions
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-  [..]
-    This subsection provides a set of functions allowing to manage the IRDA data transfers.
-
-  [..]
-    IrDA is a half duplex communication protocol. If the Transmitter is busy, any data
-    on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver
-    is busy, data on the TX from the USART to IrDA will not be encoded by IrDA.
-    While receiving data, transmission should be avoided as the data to be transmitted
-    could be corrupted.
-
-    (#) There are two mode of transfer:
-        (++) Blocking mode: the communication is performed in polling mode.
-             The HAL status of all data processing is returned by the same function
-             after finishing transfer.
-        (++) Non-Blocking mode: the communication is performed using Interrupts
-             or DMA, these API's return the HAL status.
-             The end of the data processing will be indicated through the
-             dedicated IRDA IRQ when using Interrupt mode or the DMA IRQ when
-             using DMA mode.
-             The HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxCpltCallback() user callbacks
-             will be executed respectively at the end of the Transmit or Receive process
-             The HAL_IRDA_ErrorCallback() user callback will be executed when a communication error is detected
-
-    (#) Blocking mode APIs are :
-        (++) HAL_IRDA_Transmit()
-        (++) HAL_IRDA_Receive()
-
-    (#) Non Blocking mode APIs with Interrupt are :
-        (++) HAL_IRDA_Transmit_IT()
-        (++) HAL_IRDA_Receive_IT()
-        (++) HAL_IRDA_IRQHandler()
-
-    (#) Non Blocking mode functions with DMA are :
-        (++) HAL_IRDA_Transmit_DMA()
-        (++) HAL_IRDA_Receive_DMA()
-        (++) HAL_IRDA_DMAPause()
-        (++) HAL_IRDA_DMAResume()
-        (++) HAL_IRDA_DMAStop()
-
-    (#) A set of Transfer Complete Callbacks are provided in Non Blocking mode:
-        (++) HAL_IRDA_TxHalfCpltCallback()
-        (++) HAL_IRDA_TxCpltCallback()
-        (++) HAL_IRDA_RxHalfCpltCallback()
-        (++) HAL_IRDA_RxCpltCallback()
-        (++) HAL_IRDA_ErrorCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (++) HAL_IRDA_Abort()
-        (++) HAL_IRDA_AbortTransmit()
-        (++) HAL_IRDA_AbortReceive()
-        (++) HAL_IRDA_Abort_IT()
-        (++) HAL_IRDA_AbortTransmit_IT()
-        (++) HAL_IRDA_AbortReceive_IT()
-
-    (#) For Abort services based on interrupts (HAL_IRDA_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
-        (++) HAL_IRDA_AbortCpltCallback()
-        (++) HAL_IRDA_AbortTransmitCpltCallback()
-        (++) HAL_IRDA_AbortReceiveCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-       (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-            to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-            Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-            and HAL_IRDA_ErrorCallback() user callback is executed. Transfer is kept ongoing on IRDA side.
-            If user wants to abort it, Abort services should be called by user.
-       (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-            This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
-            Error code is set to allow user to identify error type, and HAL_IRDA_ErrorCallback() user callback is executed.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Send an amount of data in blocking mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be sent.
-  * @param  Timeout Specify timeout value.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint32_t tickstart = 0U;
-
-  /* Check that a Tx process is not already ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    hirda->TxXferSize = Size;
-    hirda->TxXferCount = Size;
-    while(hirda->TxXferCount > 0U)
-    {
-      hirda->TxXferCount--;
-
-      if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData;
-        hirda->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        pData += 2;
-      }
-      else
-      {
-        hirda->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-      }
-    }
-
-    if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* At end of Tx process, restore hirda->gState to Ready */
-    hirda->gState = HAL_IRDA_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in blocking mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be received.
-  * @param  Timeout Specify timeout value.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint16_t uhMask;
-  uint32_t tickstart = 0;
-
-  /* Check that a Rx process is not already ongoing */
-  if(hirda->RxState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    hirda->RxXferSize = Size;
-    hirda->RxXferCount = Size;
-
-    /* Computation of the mask to apply to RDR register
-       of the UART associated to the IRDA */
-    IRDA_MASK_COMPUTATION(hirda);
-    uhMask = hirda->Mask;
-
-    /* Check data remaining to be received */
-    while(hirda->RxXferCount > 0U)
-    {
-      hirda->RxXferCount--;
-
-      if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData ;
-        *tmp = (uint16_t)(hirda->Instance->RDR & uhMask);
-        pData +=2;
-      }
-      else
-      {
-        *pData++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of Rx process, restore hirda->RxState to Ready */
-    hirda->RxState = HAL_IRDA_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->pTxBuffPtr = pData;
-    hirda->TxXferSize = Size;
-    hirda->TxXferCount = Size;
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the IRDA Transmit Data Register Empty Interrupt */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hirda->RxState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->pRxBuffPtr = pData;
-    hirda->RxXferSize = Size;
-    hirda->RxXferCount = Size;
-
-    /* Computation of the mask to apply to the RDR register
-       of the UART associated to the IRDA */
-    IRDA_MASK_COMPUTATION(hirda);
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the IRDA Parity Error and Data Register not empty Interrupts */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE| USART_CR1_RXNEIE);
-
-    /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in DMA mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy into TDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->pTxBuffPtr = pData;
-    hirda->TxXferSize = Size;
-    hirda->TxXferCount = Size;
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-    /* Set the IRDA DMA transfer complete callback */
-    hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt;
-
-    /* Set the IRDA DMA half transfer complete callback */
-    hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt;
-
-    /* Set the DMA error callback */
-    hirda->hdmatx->XferErrorCallback = IRDA_DMAError;
-
-    /* Set the DMA abort callback */
-    hirda->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the IRDA transmit DMA channel */
-    HAL_DMA_Start_IT(hirda->hdmatx, (uint32_t)hirda->pTxBuffPtr, (uint32_t)&hirda->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_TCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in DMA mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  pData Pointer to data buffer.
-  * @param  Size Amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled by DMA from halfword frontier). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hirda->RxState == HAL_IRDA_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy from RDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((hirda->Init.WordLength == UART_WORDLENGTH_9B) && (hirda->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hirda);
-
-    hirda->pRxBuffPtr = pData;
-    hirda->RxXferSize = Size;
-
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-    /* Set the IRDA DMA transfer complete callback */
-    hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt;
-
-    /* Set the IRDA DMA half transfer complete callback */
-    hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt;
-
-    /* Set the DMA error callback */
-    hirda->hdmarx->XferErrorCallback = IRDA_DMAError;
-
-    /* Set the DMA abort callback */
-    hirda->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->RDR, (uint32_t)hirda->pRxBuffPtr, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
-
-    /* Enable the UART Parity Error Interrupt */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the USART CR3 register */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-
-/**
-  * @brief  Pause the DMA Transfer.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda)
-{
-  /* Process Locked */
-  __HAL_LOCK(hirda);
-
-  if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
-  {
-    /* Disable the IRDA DMA Tx request */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-  }
-  if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-  {
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the IRDA DMA Rx request */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Resume the DMA Transfer.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda)
-{
-  /* Process Locked */
-  __HAL_LOCK(hirda);
-
-  if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-  {
-    /* Enable the IRDA DMA Tx request */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-  }
-  if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-  {
-    /* Clear the Overrun flag before resuming the Rx transfer*/
-    __HAL_IRDA_CLEAR_OREFLAG(hirda);
-
-    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the IRDA DMA Rx request */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the DMA Transfer.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL IRDA API under callbacks HAL_IRDA_TxCpltCallback() / HAL_IRDA_RxCpltCallback() /
-     HAL_IRDA_TxHalfCpltCallback() / HAL_IRDA_RxHalfCpltCallback():
-     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
-     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
-     the stream and the corresponding call back is executed. */
-
-  /* Stop IRDA DMA Tx request if ongoing */
-  if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel */
-    if(hirda->hdmatx != NULL)
-    {
-      HAL_DMA_Abort(hirda->hdmatx);
-    }
-
-    IRDA_EndTxTransfer(hirda);
-  }
-
-  /* Stop IRDA DMA Rx request if ongoing */
-  if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel */
-    if(hirda->hdmarx != NULL)
-    {
-      HAL_DMA_Abort(hirda->hdmarx);
-    }
-
-    IRDA_EndRxTransfer(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the IRDA DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmatx);
-    }
-  }
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  hirda->TxXferCount = 0U; 
-  hirda->RxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->gState and hirda->RxState to Ready */
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (blocking mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the IRDA DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmatx);
-    }
-  }
-
-  /* Reset Tx transfer counter */
-  hirda->TxXferCount = 0U; 
-
-  /* Restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (blocking mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hirda->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hirda->hdmarx);
-    }
-  }
-
-  /* Reset Rx transfer counter */
-  hirda->RxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->RxState to Ready */
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t abortcplt = 1U;
-  
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to IRDA Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(hirda->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if IRDA DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-    {
-      hirda->hdmatx->XferAbortCallback = IRDA_DMATxAbortCallback;
-    }
-    else
-    {
-      hirda->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(hirda->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if IRDA DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-    {
-      hirda->hdmarx->XferAbortCallback = IRDA_DMARxAbortCallback;
-    }
-    else
-    {
-      hirda->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the IRDA DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at UART level */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* IRDA Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
-      {
-        hirda->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* IRDA Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
-      {
-        hirda->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1;
-      }
-      else
-      {
-        abortcplt = 0;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1U)
-  {
-    /* Reset Tx and Rx transfer counters */
-    hirda->TxXferCount = 0U; 
-    hirda->RxXferCount = 0U;
-
-    /* Reset errorCode */
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-    /* Restore hirda->gState and hirda->RxState to Ready */
-    hirda->gState  = HAL_IRDA_STATE_READY;
-    hirda->RxState = HAL_IRDA_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_IRDA_AbortCpltCallback(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the IRDA DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmatx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-      hirda->hdmatx->XferAbortCallback = IRDA_DMATxOnlyAbortCallback;
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
-      {
-        /* Call Directly hirda->hdmatx->XferAbortCallback function in case of error */
-        hirda->hdmatx->XferAbortCallback(hirda->hdmatx);
-      }
-    }
-    else
-    {
-      /* Reset Tx transfer counter */
-      hirda->TxXferCount = 0U; 
-
-      /* Restore hirda->gState to Ready */
-      hirda->gState = HAL_IRDA_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_IRDA_AbortTransmitCpltCallback(hirda);
-    }
-  }
-  else
-  {
-    /* Reset Tx transfer counter */
-    hirda->TxXferCount = 0U; 
-
-    /* Restore hirda->gState to Ready */
-    hirda->gState = HAL_IRDA_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_IRDA_AbortTransmitCpltCallback(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (Interrupt mode).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable IRDA Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the IRDA DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hirda->hdmarx != NULL)
-    {
-      /* Set the IRDA DMA Abort callback : 
-         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
-      hirda->hdmarx->XferAbortCallback = IRDA_DMARxOnlyAbortCallback;
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
-      {
-        /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
-        hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
-      }
-    }
-    else
-    {
-      /* Reset Rx transfer counter */
-      hirda->RxXferCount = 0U; 
-
-      /* Clear the Error flags in the ICR register */
-      __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-      /* Restore hirda->RxState to Ready */
-      hirda->RxState = HAL_IRDA_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_IRDA_AbortReceiveCpltCallback(hirda);
-    }
-  }
-  else
-  {
-    /* Reset Rx transfer counter */
-    hirda->RxXferCount = 0U; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-    /* Restore hirda->RxState to Ready */
-    hirda->RxState = HAL_IRDA_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_IRDA_AbortReceiveCpltCallback(hirda);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle IRDA interrupt request.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t isrflags   = READ_REG(hirda->Instance->ISR);
-  uint32_t cr1its     = READ_REG(hirda->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-  if (errorflags == RESET)
-  {
-    /* IRDA in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      IRDA_Receive_IT(hirda);
-      return;
-    }
-  }  
-
-  /* If some errors occur */
-  cr3its = READ_REG(hirda->Instance->CR3);
-  if(   (errorflags != RESET) 
-     && (    ((cr3its & USART_CR3_EIE) != RESET)
-          || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
-  {
-    /* IRDA parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_PEF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_PE;
-    }
-
-    /* IRDA frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_FEF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_FE;
-    }
-
-    /* IRDA noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_NEF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_NE;
-    }
-
-    /* IRDA Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);
-
-      hirda->ErrorCode |= HAL_IRDA_ERROR_ORE;
-    }
-
-    /* Call IRDA Error Call back function if need be --------------------------*/
-    if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE)
-    {
-      /* IRDA in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        IRDA_Receive_IT(hirda);
-      }
-
-      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-         consider error as blocking */
-      if (((hirda->ErrorCode & HAL_IRDA_ERROR_ORE) != RESET) ||
-          (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the IRDA state ready to be able to start again the process,
-           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        IRDA_EndRxTransfer(hirda);
-
-        /* Disable the IRDA DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-          /* Abort the IRDA DMA Rx channel */
-          if(hirda->hdmarx != NULL)
-          {
-            /* Set the IRDA DMA Abort callback : 
-               will lead to call HAL_IRDA_ErrorCallback() at end of DMA abort procedure */
-            hirda->hdmarx->XferAbortCallback = IRDA_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
-            {
-              /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
-              hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_IRDA_ErrorCallback(hirda);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_IRDA_ErrorCallback(hirda);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_IRDA_ErrorCallback(hirda);
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-  /* IRDA in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    IRDA_Transmit_IT(hirda);
-    return;
-  }
-
-  /* IRDA in mode Transmitter (transmission end) -----------------------------*/
-  if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
-  {
-    IRDA_EndTransmit_IT(hirda);
-    return;
-  }
-
-}
-
-/**
-  * @brief  Tx Transfer completed callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Tx Half Transfer completed callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified USART module.
-  * @retval None
-  */
-__weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Transfer completed callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Half Transfer complete callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA error callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA Abort Complete callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA Abort Complete callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_AbortTransmitCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  IRDA Abort Receive Complete callback.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hirda);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_IRDA_AbortReceiveCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Exported_Functions_Group3 Peripheral State and Error functions
-  *  @brief   IRDA State and Errors functions
-  *
-@verbatim
-  ==============================================================================
-            ##### Peripheral State and Error functions #####
-  ==============================================================================
-  [..]
-    This subsection provides a set of functions allowing to return the State of IrDA
-    communication process and also return Peripheral Errors occurred during communication process
-     (+) HAL_IRDA_GetState() API can be helpful to check in run-time the state
-         of the IRDA peripheral handle.
-     (+) HAL_IRDA_GetError() checks in run-time errors that could occur during
-         communication.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the IRDA handle state.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL state
-  */
-HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda)
-{
-  /* Return IRDA handle state */
-  uint32_t temp1= 0x00U, temp2 = 0x00U;
-  temp1 = hirda->gState;
-  temp2 = hirda->RxState;
-
-  return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
-}
-
-/**
-  * @brief  Return the IRDA handle error code.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval IRDA Error Code
-  */
-uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda)
-{
-  return hirda->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup IRDA_Private_Functions IRDA Private Functions
-  * @{
-  */
-
-/**
-  * @brief  Configure the IRDA peripheral.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t tmpreg                     = 0x00000000U;
-  IRDA_ClockSourceTypeDef clocksource = IRDA_CLOCKSOURCE_UNDEFINED;
-  HAL_StatusTypeDef ret               = HAL_OK;
-
-  /* Check the communication parameters */
-  assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate));
-  assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength));
-  assert_param(IS_IRDA_PARITY(hirda->Init.Parity));
-  assert_param(IS_IRDA_TX_RX_MODE(hirda->Init.Mode));
-  assert_param(IS_IRDA_PRESCALER(hirda->Init.Prescaler));
-  assert_param(IS_IRDA_POWERMODE(hirda->Init.PowerMode));
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-  /* Configure the IRDA Word Length, Parity and transfer Mode:
-     Set the M bits according to hirda->Init.WordLength value
-     Set PCE and PS bits according to hirda->Init.Parity value
-     Set TE and RE bits according to hirda->Init.Mode value */
-  tmpreg = (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode ;
-
-  MODIFY_REG(hirda->Instance->CR1, IRDA_CR1_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.PowerMode);
-
-  /*-------------------------- USART GTPR Configuration ----------------------*/
-  MODIFY_REG(hirda->Instance->GTPR, USART_GTPR_PSC, hirda->Init.Prescaler);
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  IRDA_GETCLOCKSOURCE(hirda, clocksource);
-  switch (clocksource)
-  {
-    case IRDA_CLOCKSOURCE_PCLK1:
-      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_HSI:
-      hirda->Instance->BRR = (uint16_t)((HSI_VALUE + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_SYSCLK:
-      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_LSE:
-      hirda->Instance->BRR = (uint16_t)((LSE_VALUE  + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
-      break;
-    case IRDA_CLOCKSOURCE_UNDEFINED:
-    default:
-      ret = HAL_ERROR;
-      break;
-  }
-
-  return ret;
-}
-
-/**
-  * @brief  Check the IRDA Idle State.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda)
-{
-  uint32_t tickstart = 0U;
-
-  /* Initialize the IRDA ErrorCode */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
-     Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature. 
-  */
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-  if (IS_UART_WAKEUP_FROMSTOP_INSTANCE(hirda->Instance))
-  {
-    /* Check if the Transmitter is enabled */
-    if((hirda->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-    {
-      /* Wait until TEACK flag is set */
-      if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_TEACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-
-  /* Check if the Receiver is enabled */
-    if((hirda->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-    {
-      /* Wait until REACK flag is set */
-      if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_REACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-  /* Initialize the IRDA state*/
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle IRDA Communication Timeout.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @param  Flag Specifies the IRDA flag to check.
-  * @param  Status the new flag status (SET or RESET). The function is locked in a while loop as long as the flag remains set to Status.
-  * @param  Tickstart Tick start value
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_IRDA_GET_FLAG(hirda, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-        hirda->gState  = HAL_IRDA_STATE_READY;
-        hirda->RxState = HAL_IRDA_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  End ongoing Tx transfer on IRDA peripheral (following error detection or Transmit completion).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* At end of Tx process, restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-}
-
-
-/**
-  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval None
-  */
-static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Rx process, restore hirda->RxState to Ready */
-  hirda->RxState = HAL_IRDA_STATE_READY;
-}
-
-
-/**
-  * @brief  DMA IRDA transmit process complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    hirda->TxXferCount = 0U;
-
-    /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-       in the IRDA CR3 register */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-    /* Enable the IRDA Transmit Complete Interrupt */
-    SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-  }
-  /* DMA Circular mode */
-  else
-  {
-    HAL_IRDA_TxCpltCallback(hirda);
-  }
-
-}
-
-/**
-  * @brief  DMA IRDA transmit process half complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  HAL_IRDA_TxHalfCpltCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA receive process complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    hirda->RxXferCount = 0U;
-
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
-       in the IRDA CR3 register */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-    /* At end of Rx process, restore hirda->RxState to Ready */
-    hirda->RxState = HAL_IRDA_STATE_READY;
-  }
-
-  HAL_IRDA_RxCpltCallback(hirda);
-}
-
-/**
-  * @brief DMA IRDA receive process half complete callback.
-  * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  HAL_IRDA_RxHalfCpltCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA communication error callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void IRDA_DMAError(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  /* Stop IRDA DMA Tx request if ongoing */
-  if (  (hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-      &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)) )
-  {
-    hirda->TxXferCount = 0U;
-    IRDA_EndTxTransfer(hirda);
-  }
-
-  /* Stop IRDA DMA Rx request if ongoing */
-  if (  (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-      &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)) )
-  {
-    hirda->RxXferCount = 0;
-    IRDA_EndRxTransfer(hirda);
-  }
-
-  hirda->ErrorCode |= HAL_IRDA_ERROR_DMA;
-  HAL_IRDA_ErrorCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-  hirda->RxXferCount = 0U;
-  hirda->TxXferCount = 0U;
-
-  HAL_IRDA_ErrorCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
-  
-  hirda->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hirda->hdmarx != NULL)
-  {
-    if(hirda->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hirda->TxXferCount = 0U;
-  hirda->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->gState and hirda->RxState to Ready */
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortCpltCallback(hirda);
-}
-
-
-/**
-  * @brief  DMA IRDA Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
-  
-  hirda->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hirda->hdmatx != NULL)
-  {
-    if(hirda->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hirda->TxXferCount = 0U;
-  hirda->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->gState and hirda->RxState to Ready */
-  hirda->gState  = HAL_IRDA_STATE_READY;
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortCpltCallback(hirda);
-}
-
-
-/**
-  * @brief  DMA IRDA Tx communication abort callback, when initiated by user by a call to
-  *         HAL_IRDA_AbortTransmit_IT API (Abort only Tx transfer)
-  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
-  *         and leads to user Tx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
-
-  hirda->TxXferCount = 0U;
-
-  /* Restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortTransmitCpltCallback(hirda);
-}
-
-/**
-  * @brief  DMA IRDA Rx communication abort callback, when initiated by user by a call to
-  *         HAL_IRDA_AbortReceive_IT API (Abort only Rx transfer)
-  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
-  *         and leads to user Rx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  hirda->RxXferCount = 0U;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
-
-  /* Restore hirda->RxState to Ready */
-  hirda->RxState = HAL_IRDA_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_IRDA_AbortReceiveCpltCallback(hirda);
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_IRDA_Transmit_IT().
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
-{
-  uint16_t* tmp;
-
-  /* Check that a Tx process is ongoing */
-  if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-  {
-    if(hirda->TxXferCount == 0U)
-    {
-      /* Disable the IRDA Transmit Data Register Empty Interrupt */
-      CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
-
-      /* Enable the IRDA Transmit Complete Interrupt */
-      SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-
-      return HAL_OK;
-    }
-    else
-    {
-      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-      {
-        tmp = (uint16_t*) hirda->pTxBuffPtr;
-        hirda->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        hirda->pTxBuffPtr += 2U;
-      }
-      else
-      {
-        hirda->Instance->TDR = (uint8_t)(*hirda->pTxBuffPtr++ & (uint8_t)0xFFU);
-      }
-      hirda->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Wrap up transmission in non-blocking mode.
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda)
-{
-  /* Disable the IRDA Transmit Complete Interrupt */
-  CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-
-  /* Tx process is ended, restore hirda->gState to Ready */
-  hirda->gState = HAL_IRDA_STATE_READY;
-
-  HAL_IRDA_TxCpltCallback(hirda);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_IRDA_Receive_IT()
-  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
-  *               the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
-{
-  uint16_t* tmp;
-  uint16_t  uhMask = hirda->Mask;
-  uint16_t  uhdata;
-
-  /* Check that a Rx process is ongoing */
-  if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-  {
-    uhdata = (uint16_t) READ_REG(hirda->Instance->RDR);
-    if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-    {
-      tmp = (uint16_t*) hirda->pRxBuffPtr ;
-      *tmp = (uint16_t)(uhdata & uhMask);
-      hirda->pRxBuffPtr +=2U;
-    }
-    else
-    {
-      *hirda->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
-    }
-
-    if(--hirda->RxXferCount == 0U)
-    {
-      /* Disable the IRDA Parity Error Interrupt and RXNE interrupt */
-      CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore hirda->RxState to Ready */
-      hirda->RxState = HAL_IRDA_STATE_READY;
-
-      HAL_IRDA_RxCpltCallback(hirda);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
-
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_IRDA_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_iwdg.c b/lib/hal-stm32f0/source/stm32f0xx_hal_iwdg.c
deleted file mode 100644
index 1899f1f8..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_iwdg.c
+++ /dev/null
@@ -1,280 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_iwdg.c
-  * @author  MCD Application Team
-  * @brief   IWDG HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Independent Watchdog (IWDG) peripheral:
-  *           + Initialization and Start functions
-  *           + IO operation functions
-  *
-  @verbatim
-  ==============================================================================
-                    ##### IWDG Generic features #####
-  ==============================================================================
-  [..]
-    (+) The IWDG can be started by either software or hardware (configurable
-        through option byte).
-
-    (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
-        if the main clock fails.
-
-    (+) Once the IWDG is started, the LSI is forced ON and both can not be 
-        disabled. The counter starts counting down from the reset value (0xFFF).
-        When it reaches the end of count value (0x000) a reset signal is 
-        generated (IWDG reset).
-
-    (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, 
-        the IWDG_RLR value is reloaded in the counter and the watchdog reset is
-        prevented.
-
-    (+) The IWDG is implemented in the VDD voltage domain that is still functional
-        in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
-        IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
-        reset occurs.
-
-    (+) Debug mode : When the microcontroller enters debug mode (core halted),
-        the IWDG counter either continues to work normally or stops, depending 
-        on DBG_IWDG_STOP configuration bit in DBG module, accessible through
-        __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
-
-    [..] Min-max timeout value @40KHz (LSI): ~0.1ms / ~26.2s
-         The IWDG timeout may vary due to LSI frequency dispersion. STM32F0xx
-         devices provide the capability to measure the LSI frequency (LSI clock
-         connected internally to TIM16 CH1 input capture). The measured value
-         can be used to have an IWDG timeout with an acceptable accuracy.
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    (#) Use IWDG using HAL_IWDG_Init() function to :
-      (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI 
-           clock is forced ON and IWDG counter starts downcounting.
-      (++) Enable write access to configuration register: IWDG_PR, IWDG_RLR & 
-           IWDG_WINR.
-      (++) Configure the IWDG prescaler and counter reload value. This reload 
-           value will be loaded in the IWDG counter each time the watchdog is 
-           reloaded, then the IWDG will start counting down from this value.
-      (++) wait for status flags to be reset"
-      (++) Depending on window parameter:
-        (+++) If Window Init parameter is same as Window register value, 
-             nothing more is done but reload counter value in order to exit 
-             function withy exact time base.
-        (+++) Else modify Window register. This will automatically reload
-             watchdog counter.
-
-    (#) Then the application program must refresh the IWDG counter at regular
-        intervals during normal operation to prevent an MCU reset, using
-        HAL_IWDG_Refresh() function.
-
-     *** IWDG HAL driver macros list ***
-     ====================================
-     [..]
-       Below the list of most used macros in IWDG HAL driver:
-      (+) __HAL_IWDG_START: Enable the IWDG peripheral
-      (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
-          the reload register
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
-/** @addtogroup IWDG
-  * @brief IWDG HAL module driver.
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup IWDG_Private_Defines IWDG Private Defines
-  * @{
-  */
-/* Status register need 5 RC LSI divided by prescaler clock to be updated. With 
-   higher prescaler (256), and according to LSI variation, we need to wait at 
-   least 6 cycles so 39 ms. */
-#define HAL_IWDG_DEFAULT_TIMEOUT            39U
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @addtogroup IWDG_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup IWDG_Exported_Functions_Group1
- *  @brief    Initialization and Start functions.
- *
-@verbatim
- ===============================================================================
-          ##### Initialization and Start functions #####
- ===============================================================================
- [..]  This section provides functions allowing to:
-      (+) Initialize the IWDG according to the specified parameters in the 
-          IWDG_InitTypeDef of associated handle.
-      (+) Manage Window option.
-      (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog 
-          is reloaded in order to exit function with correct time base.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the IWDG according to the specified parameters in the 
-  *         IWDG_InitTypeDef and start watchdog. Before exiting function, 
-  *         watchdog is refreshed in order to have correct time base.
-  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified IWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
-{
-  uint32_t tickstart;
-
-  /* Check the IWDG handle allocation */
-  if(hiwdg == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
-  assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
-  assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
-  assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
-
-  /* Enable IWDG. LSI is turned on automaticaly */
-  __HAL_IWDG_START(hiwdg);
-
-  /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
-  0x5555 in KR */
-  IWDG_ENABLE_WRITE_ACCESS(hiwdg);
-
-  /* Write to IWDG registers the Prescaler & Reload values to work with */
-  hiwdg->Instance->PR = hiwdg->Init.Prescaler;
-  hiwdg->Instance->RLR = hiwdg->Init.Reload;
-
-  /* Check pending flag, if previous update not done, return timeout */
-  tickstart = HAL_GetTick();
-
-   /* Wait for register to be updated */
-  while(hiwdg->Instance->SR != RESET)
-  {
-    if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT)
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* If window parameter is different than current value, modify window 
-  register */
-  if(hiwdg->Instance->WINR != hiwdg->Init.Window)
-  {
-    /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
-    even if window feature is disabled, Watchdog will be reloaded by writing 
-    windows register */
-    hiwdg->Instance->WINR = hiwdg->Init.Window;
-  }
-  else
-  {
-    /* Reload IWDG counter with value defined in the reload register */
-    __HAL_IWDG_RELOAD_COUNTER(hiwdg);
-  }
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup IWDG_Exported_Functions_Group2
- *  @brief   IO operation functions
- *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
- [..]  This section provides functions allowing to:
-      (+) Refresh the IWDG.
-
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief  Refresh the IWDG.
-  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified IWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
-{
-  /* Reload IWDG counter with value defined in the reload register */
-  __HAL_IWDG_RELOAD_COUNTER(hiwdg);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_IWDG_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_pcd.c b/lib/hal-stm32f0/source/stm32f0xx_hal_pcd.c
deleted file mode 100644
index a802483a..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_pcd.c
+++ /dev/null
@@ -1,1404 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_pcd.c
-  * @author  MCD Application Team
-  * @brief   PCD HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the USB Peripheral Controller:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions 
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-                    ##### How to use this driver #####
-  ==============================================================================
-    [..]
-      The PCD HAL driver can be used as follows:
-
-     (#) Declare a PCD_HandleTypeDef handle structure, for example:
-         PCD_HandleTypeDef  hpcd;
-        
-     (#) Fill parameters of Init structure in HCD handle
-  
-     (#) Call HAL_PCD_Init() API to initialize the HCD peripheral (Core, Device core, ...) 
-
-     (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API:
-         (##) Enable the PCD/USB Low Level interface clock using 
-              (+++) __HAL_RCC_USB_CLK_ENABLE);
-           
-         (##) Initialize the related GPIO clocks
-         (##) Configure PCD pin-out
-         (##) Configure PCD NVIC interrupt
-    
-     (#)Associate the Upper USB device stack to the HAL PCD Driver:
-         (##) hpcd.pData = pdev;
-
-     (#)Enable HCD transmission and reception:
-         (##) HAL_PCD_Start();
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_PCD_MODULE_ENABLED
-
-#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6)
-
-/** @defgroup PCD PCD
-  * @brief PCD HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-
-/** @defgroup PCD_Private_Define PCD Private Define
-  * @{
-  */
-#define BTABLE_ADDRESS                  (0x000)  
-/**
-  * @}
-  */ 
-  
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup PCD_Private_Functions PCD Private Functions
-  * @{
-  */
-static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd);
-void PCD_WritePMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
-/**
-  * @}
-  */ 
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup PCD_Exported_Functions PCD Exported Functions
-  * @{
-  */
-
-/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim
- ===============================================================================
-            ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the PCD according to the specified
-  *         parameters in the PCD_InitTypeDef and create the associated handle.
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
-{ 
-  uint32_t i = 0U;
-
-  uint32_t wInterrupt_Mask = 0U;
-  
-  /* Check the PCD handle allocation */
-  if(hpcd == NULL)
-  {
-    return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
-
-  if(hpcd->State == HAL_PCD_STATE_RESET)
-  {  
-    /* Allocate lock resource and initialize it */
-    hpcd->Lock = HAL_UNLOCKED;
-  
-    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
-    HAL_PCD_MspInit(hpcd);
-  }
-
-  hpcd->State = HAL_PCD_STATE_BUSY;
- 
- /* Init endpoints structures */
- for (i = 0U; i < hpcd->Init.dev_endpoints ; i++)
- {
-   /* Init ep structure */
-   hpcd->IN_ep[i].is_in = 1U;
-   hpcd->IN_ep[i].num = i;
-   /* Control until ep is actvated */
-   hpcd->IN_ep[i].type = PCD_EP_TYPE_CTRL;
-   hpcd->IN_ep[i].maxpacket =  0U;
-   hpcd->IN_ep[i].xfer_buff = 0U;
-   hpcd->IN_ep[i].xfer_len = 0U;
- }
- 
- for (i = 0U; i < hpcd->Init.dev_endpoints ; i++)
- {
-   hpcd->OUT_ep[i].is_in = 0U;
-   hpcd->OUT_ep[i].num = i;
-   /* Control until ep is activated */
-   hpcd->OUT_ep[i].type = PCD_EP_TYPE_CTRL;
-   hpcd->OUT_ep[i].maxpacket = 0U;
-   hpcd->OUT_ep[i].xfer_buff = 0U;
-   hpcd->OUT_ep[i].xfer_len = 0U;
- }
-  
- /* Init Device */
- /*CNTR_FRES = 1*/
- hpcd->Instance->CNTR = USB_CNTR_FRES;
- 
- /*CNTR_FRES = 0*/
- hpcd->Instance->CNTR = 0;
- 
- /*Clear pending interrupts*/
- hpcd->Instance->ISTR = 0;
- 
-  /*Set Btable Adress*/
- hpcd->Instance->BTABLE = BTABLE_ADDRESS;
-  
-  /*set wInterrupt_Mask global variable*/
- wInterrupt_Mask = USB_CNTR_CTRM  | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
-   | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM;
-  
-  /*Set interrupt mask*/
-  hpcd->Instance->CNTR = wInterrupt_Mask;
-  
-  hpcd->USB_Address = 0U;
-  hpcd->State= HAL_PCD_STATE_READY;
-
- return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the PCD peripheral 
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
-{
-  /* Check the PCD handle allocation */
-  if(hpcd == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  hpcd->State = HAL_PCD_STATE_BUSY;
-  
-  /* Stop Device */
-  HAL_PCD_Stop(hpcd);
-    
-  /* DeInit the low level hardware */
-  HAL_PCD_MspDeInit(hpcd);
-  
-  hpcd->State = HAL_PCD_STATE_RESET; 
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the PCD MSP.
-  * @param  hpcd PCD handle
-  * @retval None
-  */
-__weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes PCD MSP.
-  * @param  hpcd PCD handle
-  * @retval None
-  */
-__weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup PCD_Exported_Functions_Group2 IO operation functions 
- *  @brief   Data transfers functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to manage the PCD data 
-    transfers.
-
-@endverbatim
-  * @{
-  */
-  
-/**
-  * @brief  Start the USB device.
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
-{ 
-  /* Enabling DP Pull-Down bit to Connect internal pull-up on USB DP line */
-  hpcd->Instance->BCDR |= USB_BCDR_DPPU;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the USB device.
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
-{ 
-  __HAL_LOCK(hpcd); 
-  
-    /* disable all interrupts and force USB reset */
-  hpcd->Instance->CNTR = USB_CNTR_FRES;
-  
-  /* clear interrupt status register */
-  hpcd->Instance->ISTR = 0;
-  
-  /* switch-off device */
-  hpcd->Instance->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN);
-  
-  __HAL_UNLOCK(hpcd); 
-  return HAL_OK;
-}
-
-/**
-  * @brief  This function handles PCD interrupt request.
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
-{
-  uint32_t wInterrupt_Mask = 0U;
-  
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_CTR))
-  {
-    /* servicing of the endpoint correct transfer interrupt */
-    /* clear of the CTR flag into the sub */
-    PCD_EP_ISR_Handler(hpcd);
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_RESET))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
-    HAL_PCD_ResetCallback(hpcd);
-    HAL_PCD_SetAddress(hpcd, 0U);
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_PMAOVR))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);    
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ERR))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); 
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP))
-  {
-    
-    hpcd->Instance->CNTR &= (uint16_t)(~(USB_CNTR_LPMODE));
-
-    /*set wInterrupt_Mask global variable*/
-    wInterrupt_Mask = USB_CNTR_CTRM  | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \
-      | USB_CNTR_ESOFM | USB_CNTR_RESETM;
-    
-    /*Set interrupt mask*/
-    hpcd->Instance->CNTR = wInterrupt_Mask;
-    
-    HAL_PCD_ResumeCallback(hpcd);
-    
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);     
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SUSP))
-  {    
-    /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);  
-    
-    /* Force low-power mode in the macrocell */
-    hpcd->Instance->CNTR |= USB_CNTR_FSUSP;
-    hpcd->Instance->CNTR |= USB_CNTR_LPMODE;
-
-    if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP) == 0)
-    {
-      HAL_PCD_SuspendCallback(hpcd);
-    }
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SOF))
-  {
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); 
-    HAL_PCD_SOFCallback(hpcd);
-  }
-
-  if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ESOF))
-  {
-    /* clear ESOF flag in ISTR */
-    __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); 
-  }
-}
-
-/**
-  * @brief  Data out stage callbacks
-  * @param  hpcd PCD handle
-  * @param  epnum endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataOutStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Data IN stage callbacks
-  * @param  hpcd PCD handle
-  * @param  epnum endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DataInStageCallback could be implemented in the user file
-   */ 
-}
-/**
-  * @brief  Setup stage callback
-  * @param  hpcd PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_SetupStageCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  USB Start Of Frame callbacks
-  * @param  hpcd PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_SOFCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  USB Reset callbacks
-  * @param  hpcd PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_ResetCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Suspend event callbacks
-  * @param  hpcd PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_SuspendCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Resume event callbacks
-  * @param  hpcd PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_ResumeCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Incomplete ISO OUT callbacks
-  * @param  hpcd PCD handle
-  * @param  epnum endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_ISOOUTIncompleteCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Incomplete ISO IN  callbacks
-  * @param  hpcd PCD handle
-  * @param  epnum endpoint number
-  * @retval None
-  */
- __weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-  UNUSED(epnum);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_ISOINIncompleteCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Connection event callbacks
-  * @param  hpcd PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_ConnectCallback could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  Disconnection event callbacks
-  * @param  hpcd PCD handle
-  * @retval None
-  */
- __weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hpcd);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PCD_DisconnectCallback could be implemented in the user file
-   */ 
-}
-/**
-  * @}
-  */
-    
-/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions 
- *  @brief   management functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the PCD data 
-    transfers.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Connect the USB device 
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
-{
-  __HAL_LOCK(hpcd); 
-  
-  /* Enabling DP Pull-Down bit to Connect internal pull-up on USB DP line */
-  hpcd->Instance->BCDR |= USB_BCDR_DPPU;
-  
-  __HAL_UNLOCK(hpcd); 
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disconnect the USB device 
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
-{
-  __HAL_LOCK(hpcd); 
-  
-  /* Disable DP Pull-Down bit*/
-   hpcd->Instance->BCDR &= (uint16_t)(~(USB_BCDR_DPPU));
-  
-  __HAL_UNLOCK(hpcd); 
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the USB Device address 
-  * @param  hpcd PCD handle
-  * @param  address new device address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
-{
-   __HAL_LOCK(hpcd); 
-
-   if(address == 0U) 
-   {
-     /* set device address and enable function */
-     hpcd->Instance->DADDR = USB_DADDR_EF;
-   }
-   else /* USB Address will be applied later */
-   {
-     hpcd->USB_Address = address;
-   }
-
-  __HAL_UNLOCK(hpcd);   
-  return HAL_OK;
-}
-/**
-  * @brief  Open and configure an endpoint
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @param  ep_mps endpoint max packert size
-  * @param  ep_type endpoint type   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
-{
-  HAL_StatusTypeDef  ret = HAL_OK;
-  PCD_EPTypeDef *ep;
-  
-  if ((ep_addr & 0x80U) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr & 0x7FU];
-  }
-  ep->num   = ep_addr & 0x7FU;
-  
-  ep->is_in = (0x80U & ep_addr) != 0U;
-  ep->maxpacket = ep_mps;
-  ep->type = ep_type;
-  
-  __HAL_LOCK(hpcd); 
-
-  /* initialize Endpoint */
-  switch (ep->type)
-  {
-  case PCD_EP_TYPE_CTRL:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_CONTROL);
-    break;
-  case PCD_EP_TYPE_BULK:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_BULK);
-    break;
-  case PCD_EP_TYPE_INTR:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_INTERRUPT);
-    break;
-  case PCD_EP_TYPE_ISOC:
-    PCD_SET_EPTYPE(hpcd->Instance, ep->num, USB_EP_ISOCHRONOUS);
-    break;
-  default:
-    break;
-  } 
-  
-  PCD_SET_EP_ADDRESS(hpcd->Instance, ep->num, ep->num);
-  
-  if (ep->doublebuffer == 0U) 
-  {
-    if (ep->is_in)
-    {
-      /*Set the endpoint Transmit buffer address */
-      PCD_SET_EP_TX_ADDRESS(hpcd->Instance, ep->num, ep->pmaadress);
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
-      /* Configure NAK status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_NAK) 
-    }
-    else
-    {
-      /*Set the endpoint Receive buffer address */
-      PCD_SET_EP_RX_ADDRESS(hpcd->Instance, ep->num, ep->pmaadress);
-      /*Set the endpoint Receive buffer counter*/
-      PCD_SET_EP_RX_CNT(hpcd->Instance, ep->num, ep->maxpacket)
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
-      /* Configure VALID status for the Endpoint*/
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID)
-    }
-  }
-  /*Double Buffer*/
-  else
-  {
-    /*Set the endpoint as double buffered*/
-    PCD_SET_EP_DBUF(hpcd->Instance, ep->num);
-    /*Set buffer address for double buffered mode*/
-    PCD_SET_EP_DBUF_ADDR(hpcd->Instance, ep->num,ep->pmaaddr0, ep->pmaaddr1)
-    
-    if (ep->is_in==0U)
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
-      
-      /* Reset value of the data toggle bits for the endpoint out*/
-      PCD_TX_DTOG(hpcd->Instance, ep->num);
-      
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID)
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS)
-    }
-    else
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
-      PCD_RX_DTOG(hpcd->Instance, ep->num);
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS)
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS)
-    }
-  } 
-  
-  __HAL_UNLOCK(hpcd);   
-  return ret;
-}
-
-
-/**
-  * @brief  Deactivate an endpoint
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{  
-  PCD_EPTypeDef *ep;
-  
-  if ((ep_addr & 0x80U) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr & 0x7FU];
-  }
-  ep->num   = ep_addr & 0x7FU;
-  
-  ep->is_in = (0x80U & ep_addr) != 0U;
-  
-  __HAL_LOCK(hpcd); 
-
-  if (ep->doublebuffer == 0U) 
-  {
-    if (ep->is_in)
-    {
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS)
-    }
-    else
-    {
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS)
-    }
-  }
-  /*Double Buffer*/
-  else
-  { 
-    if (ep->is_in==0U)
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
-      
-      /* Reset value of the data toggle bits for the endpoint out*/
-      PCD_TX_DTOG(hpcd->Instance, ep->num);
-      
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS)
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS)
-    }
-    else
-    {
-      /* Clear the data toggle bits for the endpoint IN/OUT*/
-      PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
-      PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
-      PCD_RX_DTOG(hpcd->Instance, ep->num);
-      /* Configure DISABLE status for the Endpoint*/
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_DIS)
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_DIS)
-    }
-  } 
-  
-  __HAL_UNLOCK(hpcd);   
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Receive an amount of data  
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @param  pBuf pointer to the reception buffer   
-  * @param  len amount of data to be received
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
-{
-  
- PCD_EPTypeDef *ep;
-  
-  ep = &hpcd->OUT_ep[ep_addr & 0x7FU];
-  
-  /*setup and start the Xfer */
-  ep->xfer_buff = pBuf;  
-  ep->xfer_len = len;
-  ep->xfer_count = 0U;
-  ep->is_in = 0U;
-  ep->num = ep_addr & 0x7FU;
-   
-  /* Multi packet transfer*/
-  if (ep->xfer_len > ep->maxpacket)
-  {
-    len=ep->maxpacket;
-    ep->xfer_len-=len; 
-  }
-  else
-  {
-    len=ep->xfer_len;
-    ep->xfer_len =0U;
-  }
-  
-  /* configure and validate Rx endpoint */
-  if (ep->doublebuffer == 0) 
-  {
-    /*Set RX buffer count*/
-    PCD_SET_EP_RX_CNT(hpcd->Instance, ep->num, len)
-  }
-  else
-  {
-    /*Set the Double buffer counter*/
-    PCD_SET_EP_DBUF_CNT(hpcd->Instance, ep->num, ep->is_in, len)
-  } 
-  
-  PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID)
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get Received Data Size
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @retval Data Size
-  */
-uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{
-  return hpcd->OUT_ep[ep_addr & 0x7FU].xfer_count;
-}
-/**
-  * @brief  Send an amount of data  
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @param  pBuf pointer to the transmission buffer   
-  * @param  len amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
-{
-  PCD_EPTypeDef *ep;
-  uint16_t pmabuffer = 0U;
-    
-  ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  
-  /*setup and start the Xfer */
-  ep->xfer_buff = pBuf;  
-  ep->xfer_len = len;
-  ep->xfer_count = 0U;
-  ep->is_in = 1U;
-  ep->num = ep_addr & 0x7FU;
-  
-  /*Multi packet transfer*/
-  if (ep->xfer_len > ep->maxpacket)
-  {
-    len=ep->maxpacket;
-    ep->xfer_len-=len; 
-  }
-  else
-  {  
-    len=ep->xfer_len;
-    ep->xfer_len =0U;
-  }
-  
-  /* configure and validate Tx endpoint */
-  if (ep->doublebuffer == 0U) 
-  {
-    PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, len);
-    PCD_SET_EP_TX_CNT(hpcd->Instance, ep->num, len);
-  }
-  else
-  {
-    /*Write the data to the USB endpoint*/
-    if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX) == USB_EP_DTOG_TX)
-    {
-      /*Set the Double buffer counter for pmabuffer1*/
-      PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len)
-      pmabuffer = ep->pmaaddr1;
-    }
-    else
-    {
-      /*Set the Double buffer counter for pmabuffer0*/
-      PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len)
-      pmabuffer = ep->pmaaddr0;
-    }
-
-    PCD_WritePMA(hpcd->Instance, ep->xfer_buff, pmabuffer, len);
-    PCD_FreeUserBuffer(hpcd->Instance, ep->num, ep->is_in)
-  }
-
-  PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID)
-     
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set a STALL condition over an endpoint
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{
-  PCD_EPTypeDef *ep;
-   
-  __HAL_LOCK(hpcd); 
-   
-  if ((0x80U & ep_addr) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr];
-  }
-  
-  ep->is_stall = 1;
-  ep->num   = ep_addr & 0x7FU;
-  ep->is_in = ((ep_addr & 0x80U) == 0x80U);
-  
-  if (ep->num == 0U)
-  {
-    /* This macro sets STALL status for RX & TX*/ 
-    PCD_SET_EP_TXRX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL)
-  }
-  else
-  {
-    if (ep->is_in)
-    {
-      PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num , USB_EP_TX_STALL)
-    }
-    else
-    {
-      PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num , USB_EP_RX_STALL)
-    }
-  }
-  __HAL_UNLOCK(hpcd); 
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Clear a STALL condition over in an endpoint
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{
-  PCD_EPTypeDef *ep;
-  
-  if ((0x80U & ep_addr) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr];
-  }
-  
-  ep->is_stall = 0U;
-  ep->num   = ep_addr & 0x7FU;
-  ep->is_in = ((ep_addr & 0x80U) == 0x80U);
-  
-  __HAL_LOCK(hpcd); 
-  
-  if (ep->is_in)
-  {
-    PCD_CLEAR_TX_DTOG(hpcd->Instance, ep->num)
-    PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID)
-  }
-  else
-  {
-    PCD_CLEAR_RX_DTOG(hpcd->Instance, ep->num)
-    PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_VALID)
-  }
-  __HAL_UNLOCK(hpcd); 
-    
-  return HAL_OK;
-}
-
-/**
-  * @brief  Flush an endpoint
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
-{ 
-  return HAL_OK;
-}
-
-/**
-  * @brief  HAL_PCD_ActivateRemoteWakeup : active remote wakeup signalling
-* @param  hpcd PCD handle
-* @retval HAL status
-*/
-HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
-{
-  if (hpcd->Init.lpm_enable ==1)
-  {
-    /* Apply L1 Resume */
-    hpcd->Instance->CNTR |= USB_CNTR_L1RESUME;
-  }
-  else
-  {
-    /* Apply L2 Resume */
-    hpcd->Instance->CNTR |= USB_CNTR_RESUME;
-  }
-  
-  return (HAL_OK);
-}
-
-/**
-* @brief  HAL_PCD_DeActivateRemoteWakeup : de-active remote wakeup signalling
-* @param  hpcd PCD handle
-* @retval HAL status
-*/
-HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
-{
-  if (hpcd->Init.lpm_enable ==1)
-  {
-    /* Release L1 Resume */
-    hpcd->Instance->CNTR &= ((uint16_t)(~ USB_CNTR_L1RESUME));
-  }
-  else
-  {
-    /* Release L2 Resume */
-    hpcd->Instance->CNTR &= ((uint16_t)(~ USB_CNTR_RESUME)) ;
-  }
-  
-  return (HAL_OK);
-}
-/**
-  * @}
-  */
-
-/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions 
- *  @brief   Peripheral State functions 
- *
-@verbatim   
- ===============================================================================
-                      ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection permits to get in run-time the status of the peripheral 
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the PCD state
-  * @param  hpcd PCD handle
-  * @retval HAL state
-  */
-PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
-{
-  return hpcd->State;
-}
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */
-
-/** @addtogroup PCD_Private_Functions
-  * @{
-  */
-/**
-  * @brief Copy a buffer from user memory area to packet memory area (PMA)
-  * @param   USBx USB peripheral instance register address.
-  * @param   pbUsrBuf pointer to user memory area.
-  * @param   wPMABufAddr address into PMA.
-  * @param   wNBytes no. of bytes to be copied.
-  * @retval None
-  */
-void PCD_WritePMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
-{
-  uint32_t n =  ((uint32_t)((uint32_t)wNBytes + 1U)) >> 1U;
-  uint32_t i;
-  uint16_t temp1, temp2;
-  uint16_t *pdwVal;
-  pdwVal = (uint16_t *)((uint32_t)(wPMABufAddr + (uint32_t)USBx + 0x400U));
-  
-  for (i = n; i != 0; i--)
-  {
-    temp1 = (uint16_t) * pbUsrBuf;
-    pbUsrBuf++;
-    temp2 = temp1 | ((uint16_t)((uint16_t)  * pbUsrBuf << 8U)) ;
-    *pdwVal++ = temp2;
-    pbUsrBuf++;
-  }
-}
-
-/**
-  * @brief Copy a buffer from user memory area to packet memory area (PMA)
-  * @param   USBx USB peripheral instance register address.
-  * @param   pbUsrBuf    = pointer to user memory area.
-  * @param   wPMABufAddr address into PMA.
-  * @param   wNBytes no. of bytes to be copied.
-  * @retval None
-  */
-void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
-{
-  uint32_t n = (uint32_t)wNBytes >> 1U;
-  uint32_t i;
-  uint16_t *pdwVal;
-  uint32_t temp;
-  pdwVal = (uint16_t *)((uint32_t)(wPMABufAddr + (uint32_t)USBx + 0x400U));
-  
-  for (i = n; i != 0U; i--)
-  {
-    temp = *pdwVal++;
-    *pbUsrBuf++ = ((temp >> 0) & 0xFF);
-    *pbUsrBuf++ = ((temp >> 8) & 0xFF);
-  }
-  
-  if (wNBytes % 2)
-  {
-    temp = *pdwVal++;
-    *pbUsrBuf++ = ((temp >> 0) & 0xFF);
-  }
-}
-
-/**
-  * @brief  This function handles PCD Endpoint interrupt request.
-  * @param  hpcd PCD handle
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
-{
-  PCD_EPTypeDef *ep;
-  uint16_t count=0U;
-  uint8_t EPindex;
-  __IO uint16_t wIstr;  
-  __IO uint16_t wEPVal = 0U;
-  
-  /* stay in loop while pending interrupts */
-  while (((wIstr = hpcd->Instance->ISTR) & USB_ISTR_CTR) != 0U)
-  {
-    /* extract highest priority endpoint number */
-    EPindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
-    
-    if (EPindex == 0U)
-    {
-      /* Decode and service control endpoint interrupt */
-      
-      /* DIR bit = origin of the interrupt */   
-      if ((wIstr & USB_ISTR_DIR) == 0U)
-      {
-        /* DIR = 0 */
-        
-        /* DIR = 0      => IN  int */
-        /* DIR = 0 implies that (EP_CTR_TX = 1) always  */
-        PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
-        ep = &hpcd->IN_ep[0];
-        
-        ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
-        ep->xfer_buff += ep->xfer_count;
- 
-        /* TX COMPLETE */
-        HAL_PCD_DataInStageCallback(hpcd, 0U);
-        
-        
-        if((hpcd->USB_Address > 0U)&& ( ep->xfer_len == 0U))
-        {
-          hpcd->Instance->DADDR = (hpcd->USB_Address | USB_DADDR_EF);
-          hpcd->USB_Address = 0U;
-        }
-        
-      }
-      else
-      {
-        /* DIR = 1 */
-        
-        /* DIR = 1 & CTR_RX       => SETUP or OUT int */
-        /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
-        ep = &hpcd->OUT_ep[0];
-        wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
-        
-        if ((wEPVal & USB_EP_SETUP) != 0U)
-        {
-          /* Get SETUP Packet*/
-          ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
-          PCD_ReadPMA(hpcd->Instance, (uint8_t*)(void*)hpcd->Setup ,ep->pmaadress , ep->xfer_count);
-          /* SETUP bit kept frozen while CTR_RX = 1*/ 
-          PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 
-          
-          /* Process SETUP Packet*/
-          HAL_PCD_SetupStageCallback(hpcd);
-        }
-        
-        else if ((wEPVal & USB_EP_CTR_RX) != 0U)
-        {
-          PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
-          /* Get Control Data OUT Packet*/
-          ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
-          
-          if (ep->xfer_count != 0U)
-          {
-            PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count);
-            ep->xfer_buff+=ep->xfer_count;
-          }
-          
-          /* Process Control Data OUT Packet*/
-           HAL_PCD_DataOutStageCallback(hpcd, 0U);
-          
-          PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket)
-          PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID)
-        }
-      }
-    }
-    else
-    {
-      
-      /* Decode and service non control endpoints interrupt  */
-      
-      /* process related endpoint register */
-      wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, EPindex);
-      if ((wEPVal & USB_EP_CTR_RX) != 0U)
-      {  
-        /* clear int flag */
-        PCD_CLEAR_RX_EP_CTR(hpcd->Instance, EPindex);
-        ep = &hpcd->OUT_ep[EPindex];
-        
-        /* OUT double Buffering*/
-        if (ep->doublebuffer == 0U)
-        {
-          count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
-          if (count != 0U)
-          {
-            PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
-          }
-        }
-        else
-        {
-          
-          if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_RX) == USB_EP_DTOG_RX)
-          {
-            /*read from endpoint BUF0Addr buffer*/
-            count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
-            if (count != 0U)
-            {
-              PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
-            }
-          }
-          else
-          {
-            /*read from endpoint BUF1Addr buffer*/
-            count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
-            if (count != 0U)
-            {
-              PCD_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
-            }
-          }
-          PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_OUT)  
-        }
-        /*multi-packet on the NON control OUT endpoint*/
-        ep->xfer_count+=count;
-        ep->xfer_buff+=count;
-       
-        if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
-        {
-          /* RX COMPLETE */
-          HAL_PCD_DataOutStageCallback(hpcd, ep->num);
-        }
-        else
-        {
-          HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
-        }
-        
-      } /* if((wEPVal & EP_CTR_RX) */
-      
-      if ((wEPVal & USB_EP_CTR_TX) != 0U)
-      {
-        ep = &hpcd->IN_ep[EPindex];
-        
-        /* clear int flag */
-        PCD_CLEAR_TX_EP_CTR(hpcd->Instance, EPindex);
-        
-        /* IN double Buffering*/
-        if (ep->doublebuffer == 0U)
-        {
-          ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
-          if (ep->xfer_count != 0)
-          {
-            PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count);
-          }
-        }
-        else
-        {
-          if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num)& USB_EP_DTOG_TX) == USB_EP_DTOG_TX)
-          {
-            /*read from endpoint BUF0Addr buffer*/
-            ep->xfer_count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
-            if (ep->xfer_count != 0U)
-            {
-              PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, ep->xfer_count);
-            }
-          }
-          else
-          {
-            /*read from endpoint BUF1Addr buffer*/
-            ep->xfer_count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
-            if (ep->xfer_count != 0U)
-            {
-              PCD_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, ep->xfer_count);
-            }
-          }
-          PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN) 
-        }
-        /*multi-packet on the NON control IN endpoint*/
-        ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
-        ep->xfer_buff+=ep->xfer_count;
-       
-        /* Zero Length Packet? */
-        if (ep->xfer_len == 0U)
-        {
-          /* TX COMPLETE */
-          HAL_PCD_DataInStageCallback(hpcd, ep->num);
-        }
-        else
-        {
-          HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len);
-        }
-      } 
-    }
-  }
-  return HAL_OK;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
-
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_pcd_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_pcd_ex.c
deleted file mode 100644
index b00d2f85..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_pcd_ex.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_pcd_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended PCD HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the USB Peripheral Controller:
-  *           + Configuration of the PMA for EP
-  *         
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#ifdef HAL_PCD_MODULE_ENABLED
-
-#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB)|| defined(STM32F070x6)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup PCDEx PCDEx
-  * @brief PCD Extended HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
-  * @{
-  */
-
-/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
-  * @brief    PCDEx control functions 
-  *
-@verbatim
- ===============================================================================
-              ##### Extended Peripheral Control functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Update PMA configuration
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Configure PMA for EP
-  * @param  hpcd PCD handle
-  * @param  ep_addr endpoint address
-  * @param  ep_kind endpoint Kind
-  *                @arg USB_SNG_BUF: Single Buffer used
-  *                @arg USB_DBL_BUF: Double Buffer used
-  * @param  pmaadress EP address in The PMA: In case of single buffer endpoint
-  *                   this parameter is 16-bit value providing the address
-  *                   in PMA allocated to endpoint.
-  *                   In case of double buffer endpoint this parameter
-  *                   is a 32-bit value providing the endpoint buffer 0 address
-  *                   in the LSB part of 32-bit value and endpoint buffer 1 address
-  *                   in the MSB part of 32-bit value.
-  * @retval : status
-  */
-
-HAL_StatusTypeDef  HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, 
-                        uint16_t ep_addr,
-                        uint16_t ep_kind,
-                        uint32_t pmaadress)
-
-{
-  PCD_EPTypeDef *ep;
-  
-  /* initialize ep structure*/
-  if ((0x80U & ep_addr) == 0x80U)
-  {
-    ep = &hpcd->IN_ep[ep_addr & 0x7FU];
-  }
-  else
-  {
-    ep = &hpcd->OUT_ep[ep_addr];
-  }
-  
-  /* Here we check if the endpoint is single or double Buffer*/
-  if (ep_kind == PCD_SNG_BUF)
-  {
-    /*Single Buffer*/
-    ep->doublebuffer = 0U;
-    /*Configure the PMA*/
-    ep->pmaadress = (uint16_t)pmaadress;
-  }
-  else /*USB_DBL_BUF*/
-  {
-    /*Double Buffer Endpoint*/
-    ep->doublebuffer = 1U;
-    /*Configure the PMA*/
-    ep->pmaaddr0 =  pmaadress & 0xFFFFU;
-    ep->pmaaddr1 =  (pmaadress & 0xFFFF0000U) >> 16U;
-  }
-  
-  return HAL_OK;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
-
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_pwr.c b/lib/hal-stm32f0/source/stm32f0xx_hal_pwr.c
deleted file mode 100644
index 4eef3d0f..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_pwr.c
+++ /dev/null
@@ -1,470 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_pwr.c
-  * @author  MCD Application Team
-  * @brief   PWR HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Power Controller (PWR) peripheral:
-  *           + Initialization/de-initialization function
-  *           + Peripheral Control function
-  *
-  @verbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup PWR PWR
-  * @brief PWR HAL module driver
-  * @{
-  */
-
-#ifdef HAL_PWR_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup PWR_Exported_Functions PWR Exported Functions
-  * @{
-  */
-
-/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 
-  *  @brief    Initialization and de-initialization functions
-  *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]
-      After reset, the backup domain (RTC registers, RTC backup data
-      registers) is protected against possible unwanted
-      write accesses.
-      To enable access to the RTC Domain and RTC registers, proceed as follows:
-        (+) Enable the Power Controller (PWR) APB1 interface clock using the
-            __HAL_RCC_PWR_CLK_ENABLE() macro.
-        (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Deinitializes the PWR peripheral registers to their default reset values.
-  * @retval None
-  */
-void HAL_PWR_DeInit(void)
-{
-  __HAL_RCC_PWR_FORCE_RESET();
-  __HAL_RCC_PWR_RELEASE_RESET();
-}
-
-/**
-  * @brief Enables access to the backup domain (RTC registers, RTC
-  *         backup data registers when present).
-  * @note  If the HSE divided by 32 is used as the RTC clock, the
-  *         Backup Domain Access should be kept enabled.
-  * @retval None
-  */
-void HAL_PWR_EnableBkUpAccess(void)
-{
-  PWR->CR |= (uint32_t)PWR_CR_DBP;
-}
-
-/**
-  * @brief Disables access to the backup domain (RTC registers, RTC
-  *         backup data registers when present).
-  * @note  If the HSE divided by 32 is used as the RTC clock, the
-  *         Backup Domain Access should be kept enabled.
-  * @retval None
-  */
-void HAL_PWR_DisableBkUpAccess(void)
-{
-  PWR->CR &= ~((uint32_t)PWR_CR_DBP);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions 
-  *  @brief Low Power modes configuration functions
-  *
-@verbatim
-
- ===============================================================================
-                 ##### Peripheral Control functions #####
- ===============================================================================
-    
-    *** WakeUp pin configuration ***
-    ================================
-    [..]
-      (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is
-          forced in input pull down configuration and is active on rising edges.
-      (+) There are two WakeUp pins, and up to eight Wakeup pins on STM32F07x & STM32F09x devices.
-         (++)WakeUp Pin 1 on PA.00.
-         (++)WakeUp Pin 2 on PC.13.
-         (++)WakeUp Pin 3 on PE.06.(STM32F07x/STM32F09x)
-         (++)WakeUp Pin 4 on PA.02.(STM32F07x/STM32F09x)
-         (++)WakeUp Pin 5 on PC.05.(STM32F07x/STM32F09x)
-         (++)WakeUp Pin 6 on PB.05.(STM32F07x/STM32F09x)
-         (++)WakeUp Pin 7 on PB.15.(STM32F07x/STM32F09x)
-         (++)WakeUp Pin 8 on PF.02.(STM32F07x/STM32F09x)
-
-    *** Low Power modes configuration ***
-    =====================================
-    [..]
-      The devices feature 3 low-power modes:
-      (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running.
-      (+) Stop mode: all clocks are stopped, regulator running, regulator
-          in low power mode
-      (+) Standby mode: 1.2V domain powered off (mode not available on STM32F0x8 devices).
-
-   *** Sleep mode ***
-   ==================
-    [..]
-      (+) Entry:
-          The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
-              functions with
-          (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
-          (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-     
-      (+) Exit:
-        (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
-              controller (NVIC) can wake up the device from Sleep mode.
-
-   *** Stop mode ***
-   =================
-    [..]
-      In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI,
-      and the HSE RC oscillators are disabled. Internal SRAM and register contents
-      are preserved.
-      The voltage regulator can be configured either in normal or low-power mode.
-      To minimize the consumption.
-
-      (+) Entry:
-          The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI )
-             function with:
-          (++) Main regulator ON.
-          (++) Low Power regulator ON.
-          (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction
-          (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction
-      (+) Exit:
-          (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
-          (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, 
-               when programmed in wakeup mode (the peripheral must be 
-               programmed in wakeup mode and the corresponding interrupt vector 
-               must be enabled in the NVIC)
-
-   *** Standby mode ***
-   ====================
-     [..]
-      The Standby mode allows to achieve the lowest power consumption. It is based
-      on the Cortex-M0 deep sleep mode, with the voltage regulator disabled.
-      The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and
-      the HSE oscillator are also switched off. SRAM and register contents are lost
-      except for the RTC registers, RTC backup registers and Standby circuitry.
-      The voltage regulator is OFF.
-
-      (+) Entry:
-          (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
-      (+) Exit:
-          (++) WKUP pin rising edge, RTC alarm (Alarm A), RTC wakeup,
-               tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
-
-   *** Auto-wakeup (AWU) from low-power mode ***
-   =============================================
-    [..]
-      The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
-      Wakeup event, a tamper event, a time-stamp event, or a comparator event, 
-      without depending on an external interrupt (Auto-wakeup mode).
-
-    (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
-
-      (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
-            configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
-
-      (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
-           is necessary to configure the RTC to detect the tamper or time stamp event using the
-           HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions.
-
-      (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
-           configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() function.
-
-    (+) Comparator auto-wakeup (AWU) from the Stop mode
-
-      (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
-           (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for comparator 2) 
-                 to be sensitive to to the selected edges (falling, rising or falling 
-                 and rising) (Interrupt or Event modes) using the EXTI_Init() function.
-           (+++) Configure the comparator to generate the event.      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Enables the WakeUp PINx functionality.
-  * @param WakeUpPinx Specifies the Power Wake-Up pin to enable.
-  *         This parameter can be value of :
-  *           @ref PWREx_WakeUp_Pins
-  * @retval None
-  */
-void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
-{
-  /* Check the parameters */
-  assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
-  /* Enable the EWUPx pin */
-  SET_BIT(PWR->CSR, WakeUpPinx);
-}
-
-/**
-  * @brief Disables the WakeUp PINx functionality.
-  * @param WakeUpPinx Specifies the Power Wake-Up pin to disable.
-  *         This parameter can be values of :
-  *           @ref PWREx_WakeUp_Pins
-  * @retval None
-  */
-void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
-{
-  /* Check the parameters */
-  assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
-  /* Disable the EWUPx pin */
-  CLEAR_BIT(PWR->CSR, WakeUpPinx);
-}
-
-/**
-  * @brief Enters Sleep mode.
-  * @note  In Sleep mode, all I/O pins keep the same state as in Run mode.
-  * @param Regulator Specifies the regulator state in SLEEP mode.
-  *           On STM32F0 devices, this parameter is a dummy value and it is ignored
-  *           as regulator can't be modified in this mode. Parameter is kept for platform
-  *           compatibility.
-  * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction.
-  *           When WFI entry is used, tick interrupt have to be disabled if not desired as 
-  *           the interrupt wake up source.
-  *           This parameter can be one of the following values:
-  *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
-  *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
-  * @retval None
-  */
-void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
-{
-  /* Check the parameters */
-  assert_param(IS_PWR_REGULATOR(Regulator));
-  assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
-
-  /* Clear SLEEPDEEP bit of Cortex System Control Register */
-  SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
-
-  /* Select SLEEP mode entry -------------------------------------------------*/
-  if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
-  {
-    /* Request Wait For Interrupt */
-    __WFI();
-  }
-  else
-  {
-    /* Request Wait For Event */
-    __SEV();
-    __WFE();
-    __WFE();
-  }
-}
-
-/**
-  * @brief Enters STOP mode.
-  * @note  In Stop mode, all I/O pins keep the same state as in Run mode.
-  * @note  When exiting Stop mode by issuing an interrupt or a wakeup event,
-  *         the HSI RC oscillator is selected as system clock.
-  * @note  When the voltage regulator operates in low power mode, an additional
-  *         startup delay is incurred when waking up from Stop mode.
-  *         By keeping the internal regulator ON during Stop mode, the consumption
-  *         is higher although the startup time is reduced.
-  * @param Regulator Specifies the regulator state in STOP mode.
-  *          This parameter can be one of the following values:
-  *            @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON
-  *            @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON
-  * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction.
-  *          This parameter can be one of the following values:
-  *            @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction
-  *            @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction
-  * @retval None
-  */
-void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
-{
-  uint32_t tmpreg = 0;
-
-  /* Check the parameters */
-  assert_param(IS_PWR_REGULATOR(Regulator));
-  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
-
-  /* Select the regulator state in STOP mode ---------------------------------*/
-  tmpreg = PWR->CR;
-  
-  /* Clear PDDS and LPDS bits */
-  tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS);
-
-  /* Set LPDS bit according to Regulator value */
-  tmpreg |= Regulator;
-
-  /* Store the new value */
-  PWR->CR = tmpreg;
-
-  /* Set SLEEPDEEP bit of Cortex System Control Register */
-  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
-
-  /* Select STOP mode entry --------------------------------------------------*/
-  if(STOPEntry == PWR_STOPENTRY_WFI)
-  {
-    /* Request Wait For Interrupt */
-    __WFI();
-  }
-  else
-  {
-    /* Request Wait For Event */
-    __SEV();
-    __WFE();
-    __WFE();
-  }
-
-  /* Reset SLEEPDEEP bit of Cortex System Control Register */
-  SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
-}
-
-/**
-  * @brief Enters STANDBY mode.
-  * @note  In Standby mode, all I/O pins are high impedance except for:
-  *          - Reset pad (still available)
-  *          - RTC alternate function pins if configured for tamper, time-stamp, RTC
-  *            Alarm out, or RTC clock calibration out.
-  *          - WKUP pins if enabled.
-  *            STM32F0x8 devices, the Stop mode is available, but it is 
-  *            aningless to distinguish between voltage regulator in Low power 
-  *            mode and voltage regulator in Run mode because the regulator 
-  *            not used and the core is supplied directly from an external source.
-  *            Consequently, the Standby mode is not available on those devices.
-  * @retval None
-  */
-void HAL_PWR_EnterSTANDBYMode(void)
-{
-  /* Select STANDBY mode */
-  PWR->CR |= (uint32_t)PWR_CR_PDDS;
-
-  /* Set SLEEPDEEP bit of Cortex System Control Register */
-  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
-
-  /* This option is used to ensure that store operations are completed */
-#if defined ( __CC_ARM)
-  __force_stores();
-#endif
-  /* Request Wait For Interrupt */
-  __WFI();
-}
-
-/**
-  * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. 
-  * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
-  *       re-enters SLEEP mode when an interruption handling is over.
-  *       Setting this bit is useful when the processor is expected to run only on
-  *       interruptions handling.         
-  * @retval None
-  */
-void HAL_PWR_EnableSleepOnExit(void)
-{
-  /* Set SLEEPONEXIT bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-
-/**
-  * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. 
-  * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
-  *       re-enters SLEEP mode when an interruption handling is over.          
-  * @retval None
-  */
-void HAL_PWR_DisableSleepOnExit(void)
-{
-  /* Clear SLEEPONEXIT bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
-}
-
-
-
-/**
-  * @brief Enables CORTEX M4 SEVONPEND bit. 
-  * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes 
-  *       WFE to wake up when an interrupt moves from inactive to pended.
-  * @retval None
-  */
-void HAL_PWR_EnableSEVOnPend(void)
-{
-  /* Set SEVONPEND bit of Cortex System Control Register */
-  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-
-/**
-  * @brief Disables CORTEX M4 SEVONPEND bit. 
-  * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes 
-  *       WFE to wake up when an interrupt moves from inactive to pended.         
-  * @retval None
-  */
-void HAL_PWR_DisableSEVOnPend(void)
-{
-  /* Clear SEVONPEND bit of Cortex System Control Register */
-  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_PWR_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_pwr_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_pwr_ex.c
deleted file mode 100644
index d83817dd..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_pwr_ex.c
+++ /dev/null
@@ -1,290 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_pwr_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended PWR HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Power Controller (PWR) peripheral:
-  *           + Extended Initialization and de-initialization functions
-  *           + Extended Peripheral Control functions
-  *         
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup PWREx PWREx
-  * @brief    PWREx HAL module driver
-  * @{
-  */
-
-#ifdef HAL_PWR_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup PWREx_Private_Constants PWREx Private Constants
-  * @{
-  */
-#define PVD_MODE_IT               (0x00010000U)
-#define PVD_MODE_EVT              (0x00020000U)
-#define PVD_RISING_EDGE           (0x00000001U)
-#define PVD_FALLING_EDGE          (0x00000002U)
-/**
-  * @}
-  */
- 
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup PWREx_Exported_Functions PWREx Exported Functions
-  * @{
-  */
-
-/** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions
-  *  @brief   Extended Peripheral Control functions
-  *
-@verbatim
-
- ===============================================================================
-                 ##### Peripheral extended control functions #####
- ===============================================================================
-    
-    *** PVD configuration ***
-    =========================
-    [..]
-      (+) The PVD is used to monitor the VDD power supply by comparing it to a
-          threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
-      (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
-          than the PVD threshold. This event is internally connected to the EXTI
-          line16 and can generate an interrupt if enabled. This is done through
-          HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions.
-      (+) The PVD is stopped in Standby mode.
-      -@- PVD is not available on STM32F030x4/x6/x8
-
-    *** VDDIO2 Monitor Configuration ***
-    ====================================
-    [..]
-      (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it 
-          to VREFInt Voltage
-      (+) This monitor is internally connected to the EXTI line31
-          and can generate an interrupt if enabled. This is done through
-          HAL_PWREx_EnableVddio2Monitor() function.
-      -@- VDDIO2 is available on STM32F07x/09x/04x
-                    
-@endverbatim
-  * @{
-  */
-
-#if defined (STM32F031x6) || defined (STM32F051x8) || \
-    defined (STM32F071xB) || defined (STM32F091xC) || \
-    defined (STM32F042x6) || defined (STM32F072xB)
-/**
-  * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
-  * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
-  *        information for the PVD.
-  * @note Refer to the electrical characteristics of your device datasheet for
-  *         more details about the voltage threshold corresponding to each
-  *         detection level.
-  * @retval None
-  */
-void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
-{
-  /* Check the parameters */
-  assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
-  assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
-
-  /* Set PLS[7:5] bits according to PVDLevel value */
-  MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
-  
-  /* Clear any previous config. Keep it clear if no event or IT mode is selected */
-  __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
-  __HAL_PWR_PVD_EXTI_DISABLE_IT();
-  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
-
-  /* Configure interrupt mode */
-  if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_IT();
-  }
-  
-  /* Configure event mode */
-  if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
-  }
-  
-  /* Configure the edge */
-  if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
-  }
-  
-  if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
-  {
-    __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
-  }
-}
-
-/**
-  * @brief Enables the Power Voltage Detector(PVD).
-  * @retval None
-  */
-void HAL_PWR_EnablePVD(void)
-{
-  PWR->CR |= (uint32_t)PWR_CR_PVDE;
-}
-
-/**
-  * @brief Disables the Power Voltage Detector(PVD).
-  * @retval None
-  */
-void HAL_PWR_DisablePVD(void)
-{
-  PWR->CR &= ~((uint32_t)PWR_CR_PVDE);
-}
-
-/**
-  * @brief This function handles the PWR PVD interrupt request.
-  * @note This API should be called under the  PVD_IRQHandler() or PVD_VDDIO2_IRQHandler().
-  * @retval None
-  */
-void HAL_PWR_PVD_IRQHandler(void)
-{
-  /* Check PWR exti flag */
-  if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
-  {
-    /* PWR PVD interrupt user callback */
-    HAL_PWR_PVDCallback();
-
-    /* Clear PWR Exti pending bit */
-    __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
-  }
-}
-
-/**
-  * @brief PWR PVD interrupt callback
-  * @retval None
-  */
-__weak void HAL_PWR_PVDCallback(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PWR_PVDCallback could be implemented in the user file
-   */
-}
-
-#endif /* defined (STM32F031x6) || defined (STM32F051x8) || */
-       /* defined (STM32F071xB) || defined (STM32F091xC) || */
-       /* defined (STM32F042x6) || defined (STM32F072xB)    */
-
-#if defined (STM32F042x6) || defined (STM32F048xx) || \
-    defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-    defined (STM32F091xC) || defined (STM32F098xx)
-/**
-  * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection.
-  * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint,
-          an interrupt is generated Irq line 1.
-          NVIS has to be enable by user.
-  * @retval None
-  */
-void HAL_PWREx_EnableVddio2Monitor(void)
-{
-  __HAL_PWR_VDDIO2_EXTI_ENABLE_IT();
-  __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE();
-}
-
-/**
-  * @brief Disable the Vddio2 Monitor.
-  * @retval None
-  */
-void HAL_PWREx_DisableVddio2Monitor(void)
-{
-  __HAL_PWR_VDDIO2_EXTI_DISABLE_IT();
-  __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE();
-
-}
-
-/**
-  * @brief This function handles the PWR Vddio2 monitor interrupt request.
-  * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler().
-  * @retval None
-  */
-void HAL_PWREx_Vddio2Monitor_IRQHandler(void)
-{
-  /* Check PWR exti flag */
-  if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET)
-  {
-    /* PWR Vddio2 monitor interrupt user callback */
-    HAL_PWREx_Vddio2MonitorCallback();
-
-    /* Clear PWR Exti pending bit */
-    __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG();
-  }
-}
-
-/**
-  * @brief PWR Vddio2 Monitor interrupt callback
-  * @retval None
-  */
-__weak void HAL_PWREx_Vddio2MonitorCallback(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file
-   */
-}
-
-#endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
-          defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-          defined (STM32F091xC) || defined (STM32F098xx) */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_PWR_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_rcc.c b/lib/hal-stm32f0/source/stm32f0xx_hal_rcc.c
deleted file mode 100644
index 619a481a..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_rcc.c
+++ /dev/null
@@ -1,1332 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_rcc.c
-  * @author  MCD Application Team
-  * @brief   RCC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Reset and Clock Control (RCC) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions
-  *       
-  @verbatim                
-  ==============================================================================
-                      ##### RCC specific features #####
-  ==============================================================================
-    [..]  
-      After reset the device is running from Internal High Speed oscillator
-      (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled, 
-      and all peripherals are off except internal SRAM, Flash and JTAG.
-      (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses;
-          all peripherals mapped on these buses are running at HSI speed.
-      (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
-      (+) All GPIOs are in input floating state, except the JTAG pins which
-          are assigned to be used for debug purpose.
-    [..] Once the device started from reset, the user application has to:
-      (+) Configure the clock source to be used to drive the System clock
-          (if the application needs higher frequency/performance)
-      (+) Configure the System clock frequency and Flash settings  
-      (+) Configure the AHB and APB buses prescalers
-      (+) Enable the clock for the peripheral(s) to be used
-      (+) Configure the clock source(s) for peripherals whose clocks are not
-          derived from the System clock (RTC, ADC, I2C, USART, TIM, USB FS, etc..)
-
-                      ##### RCC Limitations #####
-  ==============================================================================
-    [..]  
-      A delay between an RCC peripheral clock enable and the effective peripheral 
-      enabling should be taken into account in order to manage the peripheral read/write 
-      from/to registers.
-      (+) This delay depends on the peripheral mapping.
-        (++) AHB & APB peripherals, 1 dummy read is necessary
-
-    [..]  
-      Workarounds:
-      (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
-          inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-*/
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup RCC RCC
-* @brief RCC HAL module driver
-  * @{
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup RCC_Private_Constants RCC Private Constants
- * @{
- */
-/**
-  * @}
-  */
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup RCC_Private_Macros RCC Private Macros
-  * @{
-  */
-
-#define MCO1_CLK_ENABLE()     __HAL_RCC_GPIOA_CLK_ENABLE()
-#define MCO1_GPIO_PORT        GPIOA
-#define MCO1_PIN              GPIO_PIN_8
-
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/** @defgroup RCC_Private_Variables RCC Private Variables
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup RCC_Exported_Functions RCC Exported Functions
-  * @{
-  */
-
-/** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 
-  *  @brief    Initialization and Configuration functions 
-  *
-  @verbatim    
-  ===============================================================================
-           ##### Initialization and de-initialization functions #####
-  ===============================================================================
-    [..]
-      This section provides functions allowing to configure the internal/external oscillators
-      (HSE, HSI, HSI14, HSI48, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, 
-      AHB and APB1).
-
-    [..] Internal/external clock and PLL configuration
-      (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through
-          the PLL as System clock source.
-          The HSI clock can be used also to clock the USART and I2C peripherals.
-
-      (#) HSI14 (high-speed internal), 14 MHz factory-trimmed RC used directly to clock 
-          the ADC peripheral.
-
-      (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC
-          clock source.
-
-      (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or
-          through the PLL as System clock source. Can be used also as RTC clock source.
-
-      (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.   
-
-      (#) PLL (clocked by HSI, HSI48 or HSE), featuring different output clocks:
-       (++) The first output is used to generate the high speed system clock (up to 48 MHz)
-       (++) The second output is used to generate the clock for the USB FS (48 MHz)
-       (++) The third output may be used to generate the clock for the TIM, I2C and USART 
-            peripherals (up to 48 MHz)
-
-      (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
-          and if a HSE clock failure occurs(HSE used directly or through PLL as System 
-          clock source), the System clocks automatically switched to HSI and an interrupt
-          is generated if enabled. The interrupt is linked to the Cortex-M0 NMI 
-          (Non-Maskable Interrupt) exception vector.   
-
-      (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL
-          clock (divided by 2) output on pin (such as PA8 pin).
-
-    [..] System, AHB and APB buses clocks configuration
-      (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
-          HSE and PLL.
-          The AHB clock (HCLK) is derived from System clock through configurable
-          prescaler and used to clock the CPU, memory and peripherals mapped
-          on AHB bus (DMA, GPIO...). APB1 (PCLK1) clock is derived
-          from AHB clock through configurable prescalers and used to clock
-          the peripherals mapped on these buses. You can use
-          "@ref HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
-
-      (#) All the peripheral clocks are derived from the System clock (SYSCLK) except:
-        (++) The FLASH program/erase clock  which is always HSI 8MHz clock.
-        (++) The USB 48 MHz clock which is derived from the PLL VCO clock.
-        (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE.
-        (++) The I2C clock which can be derived as well from HSI 8MHz clock.
-        (++) The ADC clock which is derived from PLL output.
-        (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC
-             (HSE divided by a programmable prescaler). The System clock (SYSCLK)
-             frequency must be higher or equal to the RTC clock frequency.
-        (++) IWDG clock which is always the LSI clock.
-
-      (#) For the STM32F0xx devices, the maximum frequency of the SYSCLK, HCLK and PCLK1 is 48 MHz,
-          Depending on the SYSCLK frequency, the flash latency should be adapted accordingly.
-
-      (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and
-          prefetch is disabled.
-  @endverbatim
-  * @{
-  */
-  
-/*
-  Additional consideration on the SYSCLK based on Latency settings:
-          +-----------------------------------------------+
-          | Latency       | SYSCLK clock frequency (MHz)  |
-          |---------------|-------------------------------|
-          |0WS(1CPU cycle)|       0 < SYSCLK <= 24        |
-          |---------------|-------------------------------|
-          |1WS(2CPU cycle)|      24 < SYSCLK <= 48        |
-          +-----------------------------------------------+
-  */
-
-/**
-  * @brief  Resets the RCC clock configuration to the default reset state.
-  * @note   The default reset state of the clock configuration is given below:
-  *            - HSI ON and used as system clock source
-  *            - HSE and PLL OFF
-  *            - AHB, APB1 prescaler set to 1.
-  *            - CSS and MCO1 OFF
-  *            - All interrupts disabled
-  * @note   This function does not modify the configuration of the
-  *            - Peripheral clocks
-  *            - LSI, LSE and RTC clocks
-  * @retval None
-  */
-void HAL_RCC_DeInit(void)
-{
-  /* Set HSION bit, HSITRIM[4:0] bits to the reset value*/
-  SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4); 
-
-  /* Reset SW[1:0], HPRE[3:0], PPRE[2:0] and MCOSEL[2:0] bits */
-  CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO);
-
-  /* Reset HSEON, CSSON, PLLON bits */
-  CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON);
-  
-  /* Reset HSEBYP bit */
-  CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
-
-  /* Reset CFGR register */
-  CLEAR_REG(RCC->CFGR);
-  
-  /* Reset CFGR2 register */
-  CLEAR_REG(RCC->CFGR2);
-  
-  /* Reset CFGR3 register */
-  CLEAR_REG(RCC->CFGR3);
-  
-  /* Disable all interrupts */
-  CLEAR_REG(RCC->CIR);
-
-  /* Update the SystemCoreClock global variable */
-  SystemCoreClock = HSI_VALUE;
-}
-
-/**
-  * @brief  Initializes the RCC Oscillators according to the specified parameters in the
-  *         RCC_OscInitTypeDef.
-  * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
-  *         contains the configuration information for the RCC Oscillators.
-  * @note   The PLL is not disabled when used as system clock.
-  * @note   Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
-  *         supported by this macro. User should request a transition to LSE Off
-  *         first and then LSE On or LSE Bypass.
-  * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
-  *         supported by this macro. User should request a transition to HSE Off
-  *         first and then HSE On or HSE Bypass.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
-{
-   uint32_t tickstart = 0U;
-  
-  /* Check the parameters */
-  assert_param(RCC_OscInitStruct != NULL);
-  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
-
-  /*------------------------------- HSE Configuration ------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
-
-    /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
-    {
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
-      {
-        return HAL_ERROR;
-      }
-    }
-    else
-    {
-      /* Set the new HSE configuration ---------------------------------------*/
-      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
-      
-
-       /* Check the HSE State */
-      if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
-      {
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSE is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-      else
-      {
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSE is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
-        {
-           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-  }
-  /*----------------------------- HSI Configuration --------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
-    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-    
-    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ 
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
-    {
-      /* When HSI is used as system clock it will not disabled */
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
-      {
-        return HAL_ERROR;
-      }
-      /* Otherwise, just the calibration is allowed */
-      else
-      {
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
-      }
-    }
-    else
-    {
-      /* Check the HSI State */
-      if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
-      {
-       /* Enable the Internal High Speed oscillator (HSI). */
-        __HAL_RCC_HSI_ENABLE();
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSI is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-                
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
-      }
-      else
-      {
-        /* Disable the Internal High Speed oscillator (HSI). */
-        __HAL_RCC_HSI_DISABLE();
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSI is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-  }
-  /*------------------------------ LSI Configuration -------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-    
-    /* Check the LSI State */
-    if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
-    {
-      /* Enable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_ENABLE();
-      
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSI is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else
-    {
-      /* Disable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_DISABLE();
-      
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSI is disabled */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  /*------------------------------ LSE Configuration -------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
-  {
-    FlagStatus       pwrclkchanged = RESET;
-    
-    /* Check the parameters */
-    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-
-    /* Update LSE configuration in Backup Domain control register    */
-    /* Requires to enable write access to Backup Domain of necessary */
-    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
-    {
-      __HAL_RCC_PWR_CLK_ENABLE();
-      pwrclkchanged = SET;
-    }
-    
-    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-    {
-      /* Enable write access to Backup domain */
-      SET_BIT(PWR->CR, PWR_CR_DBP);
-      
-      /* Wait for Backup domain Write protection disable */
-      tickstart = HAL_GetTick();
-
-      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-      {
-        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Set the new LSE configuration -----------------------------------------*/
-    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
-    /* Check the LSE State */
-    if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
-    {
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else
-    {
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is disabled */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-
-    /* Require to disable power clock if necessary */
-    if(pwrclkchanged == SET)
-    {
-      __HAL_RCC_PWR_CLK_DISABLE();
-    }
-  }
-
-  /*----------------------------- HSI14 Configuration --------------------------*/
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
-    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
-
-    /* Check the HSI14 State */
-    if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
-    {
-      /* Disable ADC control of the Internal High Speed oscillator HSI14 */
-      __HAL_RCC_HSI14ADC_DISABLE();
-
-      /* Enable the Internal High Speed oscillator (HSI). */
-      __HAL_RCC_HSI14_ENABLE();
-
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till HSI is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
-      {
-        if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }      
-      } 
-
-      /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
-      __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
-    }
-    else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
-    {
-      /* Enable ADC control of the Internal High Speed oscillator HSI14 */
-      __HAL_RCC_HSI14ADC_ENABLE();
-
-      /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
-      __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
-    }
-    else
-    {
-      /* Disable ADC control of the Internal High Speed oscillator HSI14 */
-      __HAL_RCC_HSI14ADC_DISABLE();
-
-      /* Disable the Internal High Speed oscillator (HSI). */
-      __HAL_RCC_HSI14_DISABLE();
-
-      /* Get Start Tick */
-      tickstart = HAL_GetTick();
-      
-      /* Wait till HSI is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
-      {
-        if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-
-#if defined(RCC_HSI48_SUPPORT)
-  /*----------------------------- HSI48 Configuration --------------------------*/
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
-
-    /* When the HSI48 is used as system clock it is not allowed to be disabled */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) ||
-       ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48)))
-    {
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON))
-      {
-        return HAL_ERROR;
-      }
-    }
-    else
-    {
-      /* Check the HSI48 State */
-      if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
-      {
-        /* Enable the Internal High Speed oscillator (HSI48). */
-        __HAL_RCC_HSI48_ENABLE();
-
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-      
-        /* Wait till HSI48 is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        } 
-      }
-      else
-      {
-        /* Disable the Internal High Speed oscillator (HSI48). */
-        __HAL_RCC_HSI48_DISABLE();
-
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-      
-        /* Wait till HSI48 is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-  }
-#endif /* RCC_HSI48_SUPPORT */
-       
-  /*-------------------------------- PLL Configuration -----------------------*/
-  /* Check the parameters */
-  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
-  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
-  {
-    /* Check if the PLL is used as system clock or not */
-    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
-    { 
-      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
-      {
-        /* Check the parameters */
-        assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
-        assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
-        assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
-  
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-
-        /* Configure the main PLL clock source, predivider and multiplication factor. */
-        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
-                             RCC_OscInitStruct->PLL.PREDIV,
-                             RCC_OscInitStruct->PLL.PLLMUL);
-        /* Enable the main PLL. */
-        __HAL_RCC_PLL_ENABLE();
-        
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is ready */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-      else
-      {
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
- 
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is disabled */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-    else
-    {
-      return HAL_ERROR;
-    }
-  }
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the CPU, AHB and APB buses clocks according to the specified 
-  *         parameters in the RCC_ClkInitStruct.
-  * @param  RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
-  *         contains the configuration information for the RCC peripheral.
-  * @param  FLatency FLASH Latency                   
-  *          The value of this parameter depend on device used within the same series
-  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency 
-  *         and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function
-  *
-  * @note   The HSI is used (enabled by hardware) as system clock source after
-  *         start-up from Reset, wake-up from STOP and STANDBY mode, or in case
-  *         of failure of the HSE used directly or indirectly as system clock
-  *         (if the Clock Security System CSS is enabled).
-  *           
-  * @note   A switch from one clock source to another occurs only if the target
-  *         clock source is ready (clock stable after start-up delay or PLL locked). 
-  *         If a clock source which is not yet ready is selected, the switch will
-  *         occur when the clock source will be ready. 
-  *         You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
-  *         currently used as system clock source.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Check the parameters */
-  assert_param(RCC_ClkInitStruct != NULL);
-  assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
-  assert_param(IS_FLASH_LATENCY(FLatency));
-
-  /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 
-  must be correctly programmed according to the frequency of the CPU clock 
-    (HCLK) of the device. */
-
-  /* Increasing the number of wait states because of higher CPU frequency */
-  if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
-  {    
-    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
-    __HAL_FLASH_SET_LATENCY(FLatency);
-    
-    /* Check that the new number of wait states is taken into account to access the Flash
-    memory by reading the FLASH_ACR register */
-    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
-    {
-      return HAL_ERROR;
-    }
-  }
-
-  /*-------------------------- HCLK Configuration --------------------------*/
-  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
-  {
-    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
-  }
-
-  /*------------------------- SYSCLK Configuration ---------------------------*/ 
-  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
-  {    
-    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
-    
-    /* HSE is selected as System Clock Source */
-    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
-    {
-      /* Check the HSE ready flag */  
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-    /* PLL is selected as System Clock Source */
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
-    {
-      /* Check the PLL ready flag */  
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-#if defined(RCC_CFGR_SWS_HSI48)
-    /* HSI48 is selected as System Clock Source */
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
-    {
-      /* Check the HSI48 ready flag */
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-#endif /* RCC_CFGR_SWS_HSI48 */
-    /* HSI is selected as System Clock Source */
-    else
-    {
-      /* Check the HSI ready flag */  
-      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
-      {
-        return HAL_ERROR;
-      }
-    }
-    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
-
-    /* Get Start Tick */
-    tickstart = HAL_GetTick();
-    
-    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
-    {
-      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
-      {
-        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
-    {
-      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
-      {
-        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-#if defined(RCC_CFGR_SWS_HSI48)
-    else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
-    {
-      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI48)
-      {
-        if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-#endif /* RCC_CFGR_SWS_HSI48 */
-    else
-    {
-      while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
-      {
-        if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }      
-  }    
-  /* Decreasing the number of wait states because of lower CPU frequency */
-  if(FLatency < (FLASH->ACR & FLASH_ACR_LATENCY))
-  {    
-    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
-    __HAL_FLASH_SET_LATENCY(FLatency);
-    
-    /* Check that the new number of wait states is taken into account to access the Flash
-    memory by reading the FLASH_ACR register */
-    if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
-    {
-      return HAL_ERROR;
-    }
-  }    
-
-  /*-------------------------- PCLK1 Configuration ---------------------------*/ 
-  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
-  {
-    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
-    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
-  }
-  
-  /* Update the SystemCoreClock global variable */
-  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
-
-  /* Configure the source of time base considering new system clocks settings*/
-  HAL_InitTick (TICK_INT_PRIORITY);
-  
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
-  *  @brief   RCC clocks control functions
-  *
-  @verbatim   
-  ===============================================================================
-                  ##### Peripheral Control functions #####
-  ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the RCC Clocks 
-    frequencies.
-
-  @endverbatim
-  * @{
-  */
-
-#if defined(RCC_CFGR_MCOPRE)
-/**
-  * @brief  Selects the clock source to output on MCO pin.
-  * @note   MCO pin should be configured in alternate function mode.
-  * @param  RCC_MCOx specifies the output direction for the clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
-  * @param  RCC_MCOSource specifies the clock source to output.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCO1SOURCE_NOCLOCK     No clock selected
-  *            @arg @ref RCC_MCO1SOURCE_SYSCLK      System Clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSI         HSI selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSE         HSE selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSI         LSI selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSE         LSE selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSI14       HSI14 selected as MCO clock
-  @if STM32F042x6
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elseif STM32F048xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elseif STM32F071xB
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elseif STM32F072xB
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elseif STM32F078xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elseif STM32F091xC
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elseif STM32F098xx
-  *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elif STM32F030x6
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elif STM32F030xC
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elif STM32F031x6
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elif STM32F038xx
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elif STM32F070x6
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @elif STM32F070xB
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
-  @endif
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
-  * @param  RCC_MCODiv specifies the MCO DIV.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCODIV_1   no division applied to MCO clock
-  *            @arg @ref RCC_MCODIV_2   division by 2 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_4   division by 4 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_8   division by 8 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_16  division by 16 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_32  division by 32 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_64  division by 64 applied to MCO clock
-  *            @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock
-  * @retval None
-  */
-#else
-/**
-  * @brief  Selects the clock source to output on MCO pin.
-  * @note   MCO pin should be configured in alternate function mode.
-  * @param  RCC_MCOx specifies the output direction for the clock source.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
-  * @param  RCC_MCOSource specifies the clock source to output.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCO1SOURCE_NOCLOCK     No clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_SYSCLK      System clock selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSI         HSI selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSE         HSE selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSI         LSI selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_LSE         LSE selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_HSI14       HSI14 selected as MCO clock
-  *            @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
-  * @param  RCC_MCODiv specifies the MCO DIV.
-  *          This parameter can be one of the following values:
-  *            @arg @ref RCC_MCODIV_1 no division applied to MCO clock
-  * @retval None
-  */
-#endif
-void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
-{
-  GPIO_InitTypeDef gpio;
-
-  /* Check the parameters */
-  assert_param(IS_RCC_MCO(RCC_MCOx));
-  assert_param(IS_RCC_MCODIV(RCC_MCODiv));
-  assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
-  
-  /* Configure the MCO1 pin in alternate function mode */
-  gpio.Mode      = GPIO_MODE_AF_PP;
-  gpio.Speed     = GPIO_SPEED_FREQ_HIGH;
-  gpio.Pull      = GPIO_NOPULL;
-  gpio.Pin       = MCO1_PIN;
-  gpio.Alternate = GPIO_AF0_MCO;
-
-  /* MCO1 Clock Enable */
-  MCO1_CLK_ENABLE();
-  
-  HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
-  
-  /* Configure the MCO clock source */
-  __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv);
-}
-
-/**
-  * @brief  Enables the Clock Security System.
-  * @note   If a failure is detected on the HSE oscillator clock, this oscillator
-  *         is automatically disabled and an interrupt is generated to inform the
-  *         software about the failure (Clock Security System Interrupt, CSSI),
-  *         allowing the MCU to perform rescue operations. The CSSI is linked to 
-  *         the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector.  
-  * @retval None
-  */
-void HAL_RCC_EnableCSS(void)
-{
-  SET_BIT(RCC->CR, RCC_CR_CSSON) ;
-}
-
-/**
-  * @brief  Disables the Clock Security System.
-  * @retval None
-  */
-void HAL_RCC_DisableCSS(void)
-{
-  CLEAR_BIT(RCC->CR, RCC_CR_CSSON) ;
-}
-
-/**
-  * @brief  Returns the SYSCLK frequency     
-  * @note   The system frequency computed by this function is not the real 
-  *         frequency in the chip. It is calculated based on the predefined 
-  *         constant and the selected clock source:
-  * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
-  * @note     If SYSCLK source is HSE, function returns a value based on HSE_VALUE
-  *           divided by PREDIV factor(**)
-  * @note     If SYSCLK source is PLL, function returns a value based on HSE_VALUE
-  *           divided by PREDIV factor(**) or depending on STM32F0xxxx devices either a value based 
-  *           on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the 
-  *           PLL factor.
-  * @note     (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
-  *               8 MHz) but the real value may vary depending on the variations
-  *               in voltage and temperature.
-  * @note     (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
-  *                8 MHz), user has to ensure that HSE_VALUE is same as the real
-  *                frequency of the crystal used. Otherwise, this function may
-  *                have wrong result.
-  *                  
-  * @note   The result of this function could be not correct when using fractional
-  *         value for HSE crystal.
-  *           
-  * @note   This function can be used by the user application to compute the 
-  *         baud-rate for the communication peripherals or configure other parameters.
-  *           
-  * @note   Each time SYSCLK changes, this function must be called to update the
-  *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
-  *         
-  * @retval SYSCLK frequency
-  */
-uint32_t HAL_RCC_GetSysClockFreq(void)
-{
-  const uint8_t aPLLMULFactorTable[16] = { 2U,  3U,  4U,  5U,  6U,  7U,  8U,  9U,
-                                         10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
-  const uint8_t aPredivFactorTable[16] = { 1U, 2U,  3U,  4U,  5U,  6U,  7U,  8U,
-                                           9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
-
-  uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
-  uint32_t sysclockfreq = 0U;
-  
-  tmpreg = RCC->CFGR;
-  
-  /* Get SYSCLK source -------------------------------------------------------*/
-  switch (tmpreg & RCC_CFGR_SWS)
-  {
-    case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
-    {
-      sysclockfreq = HSE_VALUE;
-      break;
-    }
-    case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
-    {
-      pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
-      prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER];
-      if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
-      {
-        /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
-        pllclk = (HSE_VALUE / prediv) * pllmul;
-      }
-#if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV)
-      else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48)
-      {
-        /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */
-        pllclk = (HSI48_VALUE / prediv) * pllmul;
-      }
-#endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */
-      else
-      {
-#if  (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC))
-        /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
-        pllclk = (HSI_VALUE / prediv) * pllmul;
-#else
-        /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
-        pllclk = (uint32_t)((HSI_VALUE >> 1U) * pllmul);
-#endif
-      }
-      sysclockfreq = pllclk;
-      break;
-    }
-#if defined(RCC_CFGR_SWS_HSI48)
-    case RCC_SYSCLKSOURCE_STATUS_HSI48:    /* HSI48 used as system clock source */
-    {
-      sysclockfreq = HSI48_VALUE;
-      break;
-    }
-#endif /* RCC_CFGR_SWS_HSI48 */
-    case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
-    default: /* HSI used as system clock */
-    {
-      sysclockfreq = HSI_VALUE;
-      break;
-    }
-  }
-  return sysclockfreq;
-}
-
-/**
-  * @brief  Returns the HCLK frequency     
-  * @note   Each time HCLK changes, this function must be called to update the
-  *         right HCLK value. Otherwise, any configuration based on this function will be incorrect.
-  * 
-  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency 
-  *         and updated within this function
-  * @retval HCLK frequency
-  */
-uint32_t HAL_RCC_GetHCLKFreq(void)
-{
-  return SystemCoreClock;
-}
-
-/**
-  * @brief  Returns the PCLK1 frequency     
-  * @note   Each time PCLK1 changes, this function must be called to update the
-  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
-  * @retval PCLK1 frequency
-  */
-uint32_t HAL_RCC_GetPCLK1Freq(void)
-{
-  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
-  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNUMBER]);
-}    
-
-/**
-  * @brief  Configures the RCC_OscInitStruct according to the internal 
-  * RCC configuration registers.
-  * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 
-  * will be configured.
-  * @retval None
-  */
-void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
-{
-  /* Check the parameters */
-  assert_param(RCC_OscInitStruct != NULL);
-
-  /* Set all possible values for the Oscillator type parameter ---------------*/
-  RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI  \
-                  | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI14;
-#if defined(RCC_HSI48_SUPPORT)
-  RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
-#endif /* RCC_HSI48_SUPPORT */
-
-
-  /* Get the HSE configuration -----------------------------------------------*/
-  if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
-  {
-    RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
-  }
-  else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
-  {
-    RCC_OscInitStruct->HSEState = RCC_HSE_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
-  }
-
-  /* Get the HSI configuration -----------------------------------------------*/
-  if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
-  {
-    RCC_OscInitStruct->HSIState = RCC_HSI_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
-  }
-  
-  RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_BitNumber);
-  
-  /* Get the LSE configuration -----------------------------------------------*/
-  if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
-  {
-    RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
-  }
-  else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
-  {
-    RCC_OscInitStruct->LSEState = RCC_LSE_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
-  }
-  
-  /* Get the LSI configuration -----------------------------------------------*/
-  if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
-  {
-    RCC_OscInitStruct->LSIState = RCC_LSI_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
-  }
-  
-  /* Get the HSI14 configuration -----------------------------------------------*/
-  if((RCC->CR2 & RCC_CR2_HSI14ON) == RCC_CR2_HSI14ON)
-  {
-    RCC_OscInitStruct->HSI14State = RCC_HSI_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->HSI14State = RCC_HSI_OFF;
-  }
-
-  RCC_OscInitStruct->HSI14CalibrationValue = (uint32_t)((RCC->CR2 & RCC_CR2_HSI14TRIM) >> RCC_HSI14TRIM_BIT_NUMBER);
-  
-#if defined(RCC_HSI48_SUPPORT)
-  /* Get the HSI48 configuration if any-----------------------------------------*/
-  RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE();
-#endif /* RCC_HSI48_SUPPORT */
-
-  /* Get the PLL configuration -----------------------------------------------*/
-  if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
-  {
-    RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
-  }
-  else
-  {
-    RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
-  }
-  RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
-  RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL);
-  RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV);
-}
-
-/**
-  * @brief  Get the RCC_ClkInitStruct according to the internal 
-  * RCC configuration registers.
-  * @param  RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 
-  * contains the current clock configuration.
-  * @param  pFLatency Pointer on the Flash Latency.
-  * @retval None
-  */
-void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
-{
-  /* Check the parameters */
-  assert_param(RCC_ClkInitStruct != NULL);
-  assert_param(pFLatency != NULL);
-
-  /* Set all possible values for the Clock type parameter --------------------*/
-  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1;
-  
-  /* Get the SYSCLK configuration --------------------------------------------*/ 
-  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
-  
-  /* Get the HCLK configuration ----------------------------------------------*/ 
-  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 
-  
-  /* Get the APB1 configuration ----------------------------------------------*/ 
-  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE);   
-  /* Get the Flash Wait State (Latency) configuration ------------------------*/   
-  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 
-}
-
-/**
-  * @brief This function handles the RCC CSS interrupt request.
-  * @note This API should be called under the NMI_Handler().
-  * @retval None
-  */
-void HAL_RCC_NMI_IRQHandler(void)
-{
-  /* Check RCC CSSF flag  */
-  if(__HAL_RCC_GET_IT(RCC_IT_CSS))
-  {
-    /* RCC Clock Security System interrupt user callback */
-    HAL_RCC_CSSCallback();
-    
-    /* Clear RCC CSS pending bit */
-    __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
-  }
-}
-
-/**
-  * @brief  RCC Clock Security System interrupt callback
-  * @retval none
-  */
-__weak void HAL_RCC_CSSCallback(void)
-{
-  /* NOTE : This function Should not be modified, when the callback is needed,
-    the HAL_RCC_CSSCallback could be implemented in the user file
-    */ 
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_RCC_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_rcc_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_rcc_ex.c
deleted file mode 100644
index a5699bfe..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_rcc_ex.c
+++ /dev/null
@@ -1,980 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_rcc_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended RCC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities RCC extension peripheral:
-  *           + Extended Peripheral Control functions
-  *           + Extended Clock Recovery System Control functions
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-
-/** @defgroup RCCEx RCCEx
-  * @brief RCC Extension HAL module driver.
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-#if defined(CRS)
-/** @defgroup RCCEx_Private_Constants RCCEx Private Constants
-  * @{
-  */
-/* Bit position in register */
-#define CRS_CFGR_FELIM_BITNUMBER    16
-#define CRS_CR_TRIM_BITNUMBER       8
-#define CRS_ISR_FECAP_BITNUMBER     16
-/**
-  * @}
-  */
-#endif /* CRS */
-  
-/* Private macro -------------------------------------------------------------*/
-/** @defgroup RCCEx_Private_Macros RCCEx Private Macros
-  * @{
-  */
-/**
-  * @}
-  */
-
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
-  * @{
-  */
-
-/** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions 
-  * @brief    Extended Peripheral Control functions
- *
-@verbatim
- ===============================================================================
-                ##### Extended Peripheral Control functions  #####
- ===============================================================================  
-    [..]
-    This subsection provides a set of functions allowing to control the RCC Clocks 
-    frequencies.
-    [..] 
-    (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
-        select the RTC clock source; in this case the Backup domain will be reset in  
-        order to modify the RTC Clock source, as consequence RTC registers (including 
-        the backup registers) are set to their reset values.
-      
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the RCC extended peripherals clocks according to the specified
-  *         parameters in the RCC_PeriphCLKInitTypeDef.
-  * @param  PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
-  *         contains the configuration information for the Extended Peripherals clocks
-  *         (USART, RTC, I2C, CEC and USB).
-  *
-  * @note   Care must be taken when @ref HAL_RCCEx_PeriphCLKConfig() is used to select 
-  *         the RTC clock source; in this case the Backup domain will be reset in  
-  *         order to modify the RTC Clock source, as consequence RTC registers (including 
-  *         the backup registers) and RCC_BDCR register are set to their reset values.
-  *
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
-{
-  uint32_t tickstart = 0U;
-  uint32_t temp_reg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
-  
-  /*---------------------------- RTC configuration -------------------------------*/
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
-  {
-    /* check for RTC Parameters used to output RTCCLK */
-    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
-    
-    FlagStatus       pwrclkchanged = RESET;
-
-    /* As soon as function is called to change RTC clock source, activation of the 
-       power domain is done. */
-    /* Requires to enable write access to Backup Domain of necessary */
-    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
-    {
-    __HAL_RCC_PWR_CLK_ENABLE();
-      pwrclkchanged = SET;
-    }
-    
-    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-    {
-      /* Enable write access to Backup domain */
-      SET_BIT(PWR->CR, PWR_CR_DBP);
-      
-      /* Wait for Backup domain Write protection disable */
-      tickstart = HAL_GetTick();
-      
-      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
-      {
-        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    
-    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ 
-    temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
-    if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
-    {
-      /* Store the content of BDCR register before the reset of Backup Domain */
-      temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
-      /* RTC Clock selection can be changed only if the Backup Domain is reset */
-      __HAL_RCC_BACKUPRESET_FORCE();
-      __HAL_RCC_BACKUPRESET_RELEASE();
-      /* Restore the Content of BDCR register */
-      RCC->BDCR = temp_reg;
-      
-      /* Wait for LSERDY if LSE was enabled */
-      if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
-      {
-        /* Get Start Tick */
-        tickstart = HAL_GetTick();
-        
-        /* Wait till LSE is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
-
-    /* Require to disable power clock if necessary */
-    if(pwrclkchanged == SET)
-    {
-      __HAL_RCC_PWR_CLK_DISABLE();
-    }
-  }
-
-  /*------------------------------- USART1 Configuration ------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
-    
-    /* Configure the USART1 clock source */
-    __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
-  }
-  
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
- || defined(STM32F091xC) || defined(STM32F098xx)
-  /*----------------------------- USART2 Configuration --------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
-    
-    /* Configure the USART2 clock source */
-    __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
-  }
-#endif /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || STM32F098xx */
-
-#if defined(STM32F091xC) || defined(STM32F098xx)
-  /*----------------------------- USART3 Configuration --------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
-    
-    /* Configure the USART3 clock source */
-    __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
-  }
-#endif /* STM32F091xC || STM32F098xx */  
-
-  /*------------------------------ I2C1 Configuration ------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
-    
-    /* Configure the I2C1 clock source */
-    __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
-  }
-
-#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F070x6)
-  /*------------------------------ USB Configuration ------------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
-    
-    /* Configure the USB clock source */
-    __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
-  }
-#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
-
-#if defined(STM32F042x6) || defined(STM32F048xx)\
- || defined(STM32F051x8) || defined(STM32F058xx)\
- || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
- || defined(STM32F091xC) || defined(STM32F098xx)
-  /*------------------------------ CEC clock Configuration -------------------*/ 
-  if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
-    
-    /* Configure the CEC clock source */
-    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
-  }
-#endif /* STM32F042x6 || STM32F048xx ||                */
-       /* STM32F051x8 || STM32F058xx ||                */
-       /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || STM32F098xx */
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get the RCC_ClkInitStruct according to the internal
-  * RCC configuration registers.
-  * @param  PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
-  *         returns the configuration information for the Extended Peripherals clocks
-  *         (USART, RTC, I2C, CEC and USB).
-  * @retval None
-  */
-void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
-{
-  /* Set all possible values for the extended clock type parameter------------*/
-  /* Common part first */
-  PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1   | RCC_PERIPHCLK_RTC;  
-  /* Get the RTC configuration --------------------------------------------*/
-  PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE();
-  /* Get the USART1 clock configuration --------------------------------------------*/
-  PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
-  /* Get the I2C1 clock source -----------------------------------------------*/
-  PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
- || defined(STM32F091xC) || defined(STM32F098xx)
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART2;
-  /* Get the USART2 clock source ---------------------------------------------*/
-  PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
-#endif /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || STM32F098xx */
-
-#if defined(STM32F091xC) || defined(STM32F098xx)
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART3;
-  /* Get the USART3 clock source ---------------------------------------------*/
-  PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE();
-#endif /* STM32F091xC || STM32F098xx */
-
-#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F070x6)
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB;
-  /* Get the USB clock source ---------------------------------------------*/
-  PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE();
-#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
-
-#if defined(STM32F042x6) || defined(STM32F048xx)\
- || defined(STM32F051x8) || defined(STM32F058xx)\
- || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
- || defined(STM32F091xC) || defined(STM32F098xx)
-  PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC;
-  /* Get the CEC clock source ------------------------------------------------*/
-  PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE();
-#endif /* STM32F042x6 || STM32F048xx ||                */
-       /* STM32F051x8 || STM32F058xx ||                */
-       /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || STM32F098xx */
-
-}
-
-/**
-  * @brief  Returns the peripheral clock frequency
-  * @note   Returns 0 if peripheral clock is unknown
-  * @param  PeriphClk Peripheral clock identifier
-  *         This parameter can be one of the following values:
-  *            @arg @ref RCC_PERIPHCLK_RTC     RTC peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_USART1  USART1 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_I2C1    I2C1 peripheral clock
-  @if STM32F042x6
-  *            @arg @ref RCC_PERIPHCLK_USB     USB peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F048xx
-  *            @arg @ref RCC_PERIPHCLK_USB     USB peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F051x8
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F058xx
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F070x6
-  *            @arg @ref RCC_PERIPHCLK_USB     USB peripheral clock
-  @endif
-  @if STM32F070xB
-  *            @arg @ref RCC_PERIPHCLK_USB     USB peripheral clock
-  @endif
-  @if STM32F071xB
-  *            @arg @ref RCC_PERIPHCLK_USART2  USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F072xB
-  *            @arg @ref RCC_PERIPHCLK_USART2  USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_USB     USB peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F078xx
-  *            @arg @ref RCC_PERIPHCLK_USART2  USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_USB     USB peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F091xC
-  *            @arg @ref RCC_PERIPHCLK_USART2  USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_USART3  USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  @if STM32F098xx
-  *            @arg @ref RCC_PERIPHCLK_USART2  USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_USART3  USART2 peripheral clock
-  *            @arg @ref RCC_PERIPHCLK_CEC     CEC peripheral clock
-  @endif
-  * @retval Frequency in Hz (0: means that no available frequency for the peripheral)
-  */
-uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
-{
-  /* frequency == 0 : means that no available frequency for the peripheral */
-  uint32_t frequency = 0U;
-  
-  uint32_t srcclk = 0U;
-#if defined(USB)
-  uint32_t pllmull = 0U, pllsource = 0U, predivfactor = 0U;
-#endif /* USB */
-
-  /* Check the parameters */
-  assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
-  
-  switch (PeriphClk)
-  {
-  case RCC_PERIPHCLK_RTC:
-    {
-      /* Get the current RTC source */
-      srcclk = __HAL_RCC_GET_RTC_SOURCE();
-
-      /* Check if LSE is ready and if RTC clock selection is LSE */
-      if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      /* Check if LSI is ready and if RTC clock selection is LSI */
-      else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
-      {
-        frequency = LSI_VALUE;
-      }
-      /* Check if HSE is ready  and if RTC clock selection is HSI_DIV32*/
-      else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
-      {
-        frequency = HSE_VALUE / 32U;
-      }
-      break;
-    }
-  case RCC_PERIPHCLK_USART1:
-    {
-      /* Get the current USART1 source */
-      srcclk = __HAL_RCC_GET_USART1_SOURCE();
-
-      /* Check if USART1 clock selection is PCLK1 */
-      if (srcclk == RCC_USART1CLKSOURCE_PCLK1)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      /* Check if HSI is ready and if USART1 clock selection is HSI */
-      else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if USART1 clock selection is SYSCLK */
-      else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Check if LSE is ready  and if USART1 clock selection is LSE */
-      else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      break;
-    }
-#if defined(RCC_CFGR3_USART2SW)
-  case RCC_PERIPHCLK_USART2:
-    {
-      /* Get the current USART2 source */
-      srcclk = __HAL_RCC_GET_USART2_SOURCE();
-
-      /* Check if USART2 clock selection is PCLK1 */
-      if (srcclk == RCC_USART2CLKSOURCE_PCLK1)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      /* Check if HSI is ready and if USART2 clock selection is HSI */
-      else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if USART2 clock selection is SYSCLK */
-      else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Check if LSE is ready  and if USART2 clock selection is LSE */
-      else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      break;
-    }
-#endif /* RCC_CFGR3_USART2SW */
-#if defined(RCC_CFGR3_USART3SW)
-  case RCC_PERIPHCLK_USART3:
-    {
-      /* Get the current USART3 source */
-      srcclk = __HAL_RCC_GET_USART3_SOURCE();
-
-      /* Check if USART3 clock selection is PCLK1 */
-      if (srcclk == RCC_USART3CLKSOURCE_PCLK1)
-      {
-        frequency = HAL_RCC_GetPCLK1Freq();
-      }
-      /* Check if HSI is ready and if USART3 clock selection is HSI */
-      else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if USART3 clock selection is SYSCLK */
-      else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      /* Check if LSE is ready  and if USART3 clock selection is LSE */
-      else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      break;
-    }
-#endif /* RCC_CFGR3_USART3SW */
-  case RCC_PERIPHCLK_I2C1:
-    {
-      /* Get the current I2C1 source */
-      srcclk = __HAL_RCC_GET_I2C1_SOURCE();
-
-      /* Check if HSI is ready and if I2C1 clock selection is HSI */
-      if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if I2C1 clock selection is SYSCLK */
-      else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK)
-      {
-        frequency = HAL_RCC_GetSysClockFreq();
-      }
-      break;
-    }
-#if defined(USB)
-  case RCC_PERIPHCLK_USB:
-    {
-      /* Get the current USB source */
-      srcclk = __HAL_RCC_GET_USB_SOURCE();
-
-      /* Check if PLL is ready and if USB clock selection is PLL */
-      if ((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
-      {
-        /* Get PLL clock source and multiplication factor ----------------------*/
-        pllmull      = RCC->CFGR & RCC_CFGR_PLLMUL;
-        pllsource    = RCC->CFGR & RCC_CFGR_PLLSRC;
-        pllmull      = (pllmull >> RCC_CFGR_PLLMUL_BITNUMBER) + 2U;
-        predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U;
-
-        if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
-        {
-          /* HSE used as PLL clock source : frequency = HSE/PREDIV * PLLMUL */
-          frequency = (HSE_VALUE/predivfactor) * pllmull;
-        }
-#if defined(RCC_CR2_HSI48ON)
-        else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
-        {
-          /* HSI48 used as PLL clock source : frequency = HSI48/PREDIV * PLLMUL */
-          frequency = (HSI48_VALUE / predivfactor) * pllmull;
-        }
-#endif /* RCC_CR2_HSI48ON */
-        else
-        {
-#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F078xx) || defined(STM32F072xB) || defined(STM32F070xB)
-          /* HSI used as PLL clock source : frequency = HSI/PREDIV * PLLMUL */
-          frequency = (HSI_VALUE / predivfactor) * pllmull;
-#else
-          /* HSI used as PLL clock source : frequency = HSI/2U * PLLMUL */
-          frequency = (HSI_VALUE >> 1U) * pllmull;
-#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB */
-        }
-      }
-#if defined(RCC_CR2_HSI48ON)
-      /* Check if HSI48 is ready and if USB clock selection is HSI48 */
-      else if ((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CR2, RCC_CR2_HSI48RDY)))
-      {
-        frequency = HSI48_VALUE;
-      }
-#endif /* RCC_CR2_HSI48ON */
-      break;
-    }
-#endif /* USB */
-#if defined(CEC)
-  case RCC_PERIPHCLK_CEC:
-    {
-      /* Get the current CEC source */
-      srcclk = __HAL_RCC_GET_CEC_SOURCE();
-
-      /* Check if HSI is ready and if CEC clock selection is HSI */
-      if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
-      {
-        frequency = HSI_VALUE;
-      }
-      /* Check if LSE is ready  and if CEC clock selection is LSE */
-      else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
-      {
-        frequency = LSE_VALUE;
-      }
-      break;
-    }
-#endif /* CEC */
-  default: 
-    {
-      break;
-    }
-  }
-  return(frequency);
-}
-
-/**
-  * @}
-  */
-
-#if defined(CRS)
-
-/** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions 
- *  @brief  Extended Clock Recovery System Control functions
- *
-@verbatim
- ===============================================================================
-                ##### Extended Clock Recovery System Control functions  #####
- ===============================================================================
-    [..]
-      For devices with Clock Recovery System feature (CRS), RCC Extention HAL driver can be used as follows:
-
-      (#) In System clock config, HSI48 needs to be enabled
-
-      (#) Enable CRS clock in IP MSP init which will use CRS functions
-
-      (#) Call CRS functions as follows:
-          (##) Prepare synchronization configuration necessary for HSI48 calibration
-              (+++) Default values can be set for frequency Error Measurement (reload and error limit)
-                        and also HSI48 oscillator smooth trimming.
-              (+++) Macro @ref __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate 
-                        directly reload value with target and synchronization frequencies values
-          (##) Call function @ref HAL_RCCEx_CRSConfig which
-              (+++) Reset CRS registers to their default values.
-              (+++) Configure CRS registers with synchronization configuration 
-              (+++) Enable automatic calibration and frequency error counter feature
-           Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the
-           periodic USB SOF will not be generated by the host. No SYNC signal will therefore be
-           provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock
-           precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs
-           should be used as SYNC signal.
-
-          (##) A polling function is provided to wait for complete synchronization
-              (+++) Call function @ref HAL_RCCEx_CRSWaitSynchronization()
-              (+++) According to CRS status, user can decide to adjust again the calibration or continue
-                        application if synchronization is OK
-              
-      (#) User can retrieve information related to synchronization in calling function
-            @ref HAL_RCCEx_CRSGetSynchronizationInfo()
-
-      (#) Regarding synchronization status and synchronization information, user can try a new calibration
-           in changing synchronization configuration and call again HAL_RCCEx_CRSConfig.
-           Note: When the SYNC event is detected during the downcounting phase (before reaching the zero value), 
-           it means that the actual frequency is lower than the target (and so, that the TRIM value should be 
-           incremented), while when it is detected during the upcounting phase it means that the actual frequency 
-           is higher (and that the TRIM value should be decremented).
-
-      (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interrupts will go 
-          through CRS Handler (RCC_IRQn/RCC_IRQHandler)
-              (++) Call function @ref HAL_RCCEx_CRSConfig()
-              (++) Enable RCC_IRQn (thanks to NVIC functions)
-              (++) Enable CRS interrupt (@ref __HAL_RCC_CRS_ENABLE_IT)
-              (++) Implement CRS status management in the following user callbacks called from 
-                   HAL_RCCEx_CRS_IRQHandler():
-                   (+++) @ref HAL_RCCEx_CRS_SyncOkCallback()
-                   (+++) @ref HAL_RCCEx_CRS_SyncWarnCallback()
-                   (+++) @ref HAL_RCCEx_CRS_ExpectedSyncCallback()
-                   (+++) @ref HAL_RCCEx_CRS_ErrorCallback()
-
-      (#) To force a SYNC EVENT, user can use the function @ref HAL_RCCEx_CRSSoftwareSynchronizationGenerate().
-          This function can be called before calling @ref HAL_RCCEx_CRSConfig (for instance in Systick handler)
-            
-@endverbatim
- * @{
- */
-
-/**
-  * @brief  Start automatic synchronization for polling mode
-  * @param  pInit Pointer on RCC_CRSInitTypeDef structure
-  * @retval None
-  */
-void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit)
-{
-  uint32_t value = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler));
-  assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source));
-  assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity));
-  assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue));
-  assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue));
-  assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue));
-
-  /* CONFIGURATION */
-
-  /* Before configuration, reset CRS registers to their default values*/
-  __HAL_RCC_CRS_FORCE_RESET();
-  __HAL_RCC_CRS_RELEASE_RESET();
-
-  /* Set the SYNCDIV[2:0] bits according to Prescaler value */
-  /* Set the SYNCSRC[1:0] bits according to Source value */
-  /* Set the SYNCSPOL bit according to Polarity value */
-  value = (pInit->Prescaler | pInit->Source | pInit->Polarity);
-  /* Set the RELOAD[15:0] bits according to ReloadValue value */
-  value |= pInit->ReloadValue;
-  /* Set the FELIM[7:0] bits according to ErrorLimitValue value */
-  value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER);
-  WRITE_REG(CRS->CFGR, value);
-
-  /* Adjust HSI48 oscillator smooth trimming */
-  /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */
-  MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER));
-  
-  /* START AUTOMATIC SYNCHRONIZATION*/
-  
-  /* Enable Automatic trimming & Frequency error counter */
-  SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN);
-}
-
-/**
-  * @brief  Generate the software synchronization event
-  * @retval None
-  */
-void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void)
-{
-  SET_BIT(CRS->CR, CRS_CR_SWSYNC);
-}
-
-/**
-  * @brief  Return synchronization info 
-  * @param  pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure
-  * @retval None
-  */
-void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo)
-{
-  /* Check the parameter */
-  assert_param(pSynchroInfo != NULL);
-  
-  /* Get the reload value */
-  pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD));
-  
-  /* Get HSI48 oscillator smooth trimming */
-  pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BITNUMBER);
-
-  /* Get Frequency error capture */
-  pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BITNUMBER);
-
-  /* Get Frequency error direction */
-  pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR));
-}
-
-/**
-* @brief Wait for CRS Synchronization status.
-* @param Timeout  Duration of the timeout
-* @note  Timeout is based on the maximum time to receive a SYNC event based on synchronization
-*        frequency.
-* @note    If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned.
-* @retval Combination of Synchronization status
-*          This parameter can be a combination of the following values:
-*            @arg @ref RCC_CRS_TIMEOUT
-*            @arg @ref RCC_CRS_SYNCOK
-*            @arg @ref RCC_CRS_SYNCWARN
-*            @arg @ref RCC_CRS_SYNCERR
-*            @arg @ref RCC_CRS_SYNCMISS
-*            @arg @ref RCC_CRS_TRIMOVF
-*/
-uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout)
-{
-  uint32_t crsstatus = RCC_CRS_NONE;
-  uint32_t tickstart = 0U;
-  
-  /* Get timeout */
-  tickstart = HAL_GetTick();
-  
-  /* Wait for CRS flag or timeout detection */
-  do
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        crsstatus = RCC_CRS_TIMEOUT;
-      }
-    }
-    /* Check CRS SYNCOK flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK))
-    {
-      /* CRS SYNC event OK */
-      crsstatus |= RCC_CRS_SYNCOK;
-    
-      /* Clear CRS SYNC event OK bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK);
-    }
-    
-    /* Check CRS SYNCWARN flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN))
-    {
-      /* CRS SYNC warning */
-      crsstatus |= RCC_CRS_SYNCWARN;
-    
-      /* Clear CRS SYNCWARN bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN);
-    }
-    
-    /* Check CRS TRIM overflow flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF))
-    {
-      /* CRS SYNC Error */
-      crsstatus |= RCC_CRS_TRIMOVF;
-    
-      /* Clear CRS Error bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF);
-    }
-    
-    /* Check CRS Error flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR))
-    {
-      /* CRS SYNC Error */
-      crsstatus |= RCC_CRS_SYNCERR;
-    
-      /* Clear CRS Error bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR);
-    }
-    
-    /* Check CRS SYNC Missed flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS))
-    {
-      /* CRS SYNC Missed */
-      crsstatus |= RCC_CRS_SYNCMISS;
-    
-      /* Clear CRS SYNC Missed bit */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS);
-    }
-    
-    /* Check CRS Expected SYNC flag  */
-    if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC))
-    {
-      /* frequency error counter reached a zero value */
-      __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC);
-    }
-  } while(RCC_CRS_NONE == crsstatus);
-
-  return crsstatus;
-}
-
-/**
-  * @brief Handle the Clock Recovery System interrupt request.
-  * @retval None
-  */
-void HAL_RCCEx_CRS_IRQHandler(void)
-{
-  uint32_t crserror = RCC_CRS_NONE;
-  /* Get current IT flags and IT sources values */
-  uint32_t itflags = READ_REG(CRS->ISR);
-  uint32_t itsources = READ_REG(CRS->CR);
-
-  /* Check CRS SYNCOK flag  */
-  if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET))
-  {
-    /* Clear CRS SYNC event OK flag */
-    WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC);
-
-    /* user callback */
-    HAL_RCCEx_CRS_SyncOkCallback();
-  }
-  /* Check CRS SYNCWARN flag  */
-  else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RESET))
-  {
-    /* Clear CRS SYNCWARN flag */
-    WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC);
-
-    /* user callback */
-    HAL_RCCEx_CRS_SyncWarnCallback();
-  }
-  /* Check CRS Expected SYNC flag  */
-  else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET))
-  {
-    /* frequency error counter reached a zero value */
-    WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC);
-
-    /* user callback */
-    HAL_RCCEx_CRS_ExpectedSyncCallback();
-  }
-  /* Check CRS Error flags  */
-  else
-  {
-    if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET))
-    {
-      if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET)
-      {
-        crserror |= RCC_CRS_SYNCERR;
-      }
-      if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET)
-      {
-        crserror |= RCC_CRS_SYNCMISS;
-      }
-      if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET)
-      {
-        crserror |= RCC_CRS_TRIMOVF;
-      }
-
-      /* Clear CRS Error flags */
-      WRITE_REG(CRS->ICR, CRS_ICR_ERRC);
-    
-      /* user error callback */
-      HAL_RCCEx_CRS_ErrorCallback(crserror);
-    }
-  }
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System SYNCOK interrupt callback.
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_SyncOkCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System SYNCWARN interrupt callback.
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_SyncWarnCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System Expected SYNC interrupt callback.
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void)
-{
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  RCCEx Clock Recovery System Error interrupt callback.
-  * @param  Error Combination of Error status. 
-  *         This parameter can be a combination of the following values:
-  *           @arg @ref RCC_CRS_SYNCERR
-  *           @arg @ref RCC_CRS_SYNCMISS
-  *           @arg @ref RCC_CRS_TRIMOVF
-  * @retval none
-  */
-__weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(Error);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-#endif /* CRS */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_rtc.c b/lib/hal-stm32f0/source/stm32f0xx_hal_rtc.c
deleted file mode 100644
index c884b7ca..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_rtc.c
+++ /dev/null
@@ -1,1391 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_rtc.c
-  * @author  MCD Application Team
-  * @brief   RTC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Real Time Clock (RTC) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + RTC Time and Date functions
-  *           + RTC Alarm functions
-  *           + Peripheral Control functions   
-  *           + Peripheral State functions
-  *         
-  @verbatim
-  ==============================================================================
-                  ##### How to use RTC Driver #####
- ===================================================================
-    [..] 
-        (+) Enable the RTC domain access (see description in the section above).
-        (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour 
-            format using the HAL_RTC_Init() function.
-  
-    *** Time and Date configuration ***
-    ===================================
-    [..] 
-        (+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime() 
-            and HAL_RTC_SetDate() functions.
-        (+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions. 
-  
-    *** Alarm configuration ***
-    ===========================
-    [..]
-    (+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function.
-            You can also configure the RTC Alarm with interrupt mode using the 
-            HAL_RTC_SetAlarm_IT() function.
-        (+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function.
-
-                  ##### RTC and low power modes #####
- ===================================================================
-    [..] The MCU can be woken up from a low power mode by an RTC alternate 
-         function.
-    [..] The RTC alternate functions are the RTC alarm (Alarm A), 
-         RTC wake-up, RTC tamper event detection and RTC time stamp event detection.
-         These RTC alternate functions can wake up the system from the Stop and 
-         Standby low power modes.
-    [..] The system can also wake up from low power modes without depending 
-         on an external interrupt (Auto-wake-up mode), by using the RTC alarm 
-         or the RTC wake-up events.
-    [..] The RTC provides a programmable time base for waking up from the 
-         Stop or Standby mode at regular intervals.
-         Wake-up from STOP and STANDBY modes is possible only when the RTC clock source
-         is LSE or LSI.
-     
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @addtogroup RTC
-  * @brief RTC HAL module driver
-  * @{
-  */
-
-#ifdef HAL_RTC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-
-/** @addtogroup RTC_Exported_Functions
-  * @{
-  */
-  
-/** @addtogroup RTC_Exported_Functions_Group1
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-   [..] This section provides functions allowing to initialize and configure the 
-         RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable 
-         RTC registers Write protection, enter and exit the RTC initialization mode, 
-         RTC registers synchronization check and reference clock detection enable.
-         (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base. 
-             It is split into 2 programmable prescalers to minimize power consumption.
-             (++) A 7-bit asynchronous prescaler and a 15-bit synchronous prescaler.
-             (++) When both prescalers are used, it is recommended to configure the 
-                 asynchronous prescaler to a high value to minimize power consumption.
-         (#) All RTC registers are Write protected. Writing to the RTC registers
-             is enabled by writing a key into the Write Protection register, RTC_WPR.
-         (#) To configure the RTC Calendar, user application should enter 
-             initialization mode. In this mode, the calendar counter is stopped 
-             and its value can be updated. When the initialization sequence is 
-             complete, the calendar restarts counting after 4 RTCCLK cycles.
-         (#) To read the calendar through the shadow registers after Calendar 
-             initialization, calendar update or after wake-up from low power modes 
-             the software must first clear the RSF flag. The software must then 
-             wait until it is set again before reading the calendar, which means 
-             that the calendar registers have been correctly copied into the 
-             RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function 
-             implements the above software sequence (RSF clear and RSF check).
- 
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the RTC according to the specified parameters 
-  *         in the RTC_InitTypeDef structure and initialize the associated handle.
-  * @param  hrtc RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
-{
-  /* Check the RTC peripheral state */
-  if(hrtc == NULL)
-  {
-     return HAL_ERROR;
-  }
-  
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
-  assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat));
-  assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv));
-  assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv));
-  assert_param(IS_RTC_OUTPUT(hrtc->Init.OutPut));
-  assert_param(IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity));
-  assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType));
-    
-  if(hrtc->State == HAL_RTC_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hrtc->Lock = HAL_UNLOCKED;
-
-    /* Initialize RTC MSP */
-    HAL_RTC_MspInit(hrtc);
-  }
-  
-  /* Set RTC state */  
-  hrtc->State = HAL_RTC_STATE_BUSY;  
-       
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 
-    
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
-    
-    return HAL_ERROR;
-  } 
-  else
-  { 
-    /* Clear RTC_CR FMT, OSEL and POL Bits */
-    hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL));
-    /* Set RTC_CR register */
-    hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity);
-    
-    /* Configure the RTC PRER */
-    hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
-    hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16U);
-    
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; 
-
-    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_ERROR;
-
-        return HAL_ERROR;
-      }
-    }
-
-    hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_ALARMOUTTYPE;
-    hrtc->Instance->TAFCR |= (uint32_t)(hrtc->Init.OutPutType); 
-    
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 
-    
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_READY;
-    
-    return HAL_OK;
-  }
-}
-
-/**
-  * @brief  DeInitialize the RTC peripheral.
-  * @param  hrtc RTC handle
-  * @note   This function doesn't reset the RTC Backup Data registers.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
-{
-#if defined (STM32F030xC) || defined (STM32F070xB) || \
-    defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-    defined (STM32F091xC) || defined (STM32F098xx)
-  uint32_t tickstart = 0;
-#endif /* defined (STM32F030xC) || defined (STM32F070xB) ||\
-          defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-          defined (STM32F091xC) || defined (STM32F098xx) ||*/
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance));
-
-  /* Set RTC state */
-  hrtc->State = HAL_RTC_STATE_BUSY; 
-  
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-  
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 
-    
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
-    
-    return HAL_ERROR;
-  }  
-  else
-  {
-    /* Reset TR, DR and CR registers */
-    hrtc->Instance->TR = 0x00000000U;
-    hrtc->Instance->DR = 0x00002101U;
-    
-#if defined (STM32F030xC) || defined (STM32F070xB) || \
-    defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-    defined (STM32F091xC) || defined (STM32F098xx)    
-    /* Reset All CR bits except CR[2:0] */
-    hrtc->Instance->CR &= 0x00000007U;
-    
-    tickstart = HAL_GetTick();
-    
-    /* Wait till WUTWF flag is set and if Time out is reached exit */
-    while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET)
-    {
-      if((HAL_GetTick() - tickstart ) >  RTC_TIMEOUT_VALUE)
-      { 
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 
-        
-        /* Set RTC state */
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        
-        return HAL_TIMEOUT;
-      } 
-    }
-#endif /* defined (STM32F030xC) || defined (STM32F070xB) ||\
-          defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-          defined (STM32F091xC) || defined (STM32F098xx) ||*/
-          
-    /* Reset all RTC CR register bits */
-    hrtc->Instance->CR &= 0x00000000U;
-#if defined (STM32F030xC) || defined (STM32F070xB) || \
-    defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-    defined (STM32F091xC) || defined (STM32F098xx)    
-    hrtc->Instance->WUTR = 0x0000FFFFU;
-#endif /* defined (STM32F030xC) || defined (STM32F070xB) ||\
-          defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
-          defined (STM32F091xC) || defined (STM32F098xx) ||*/    
-    hrtc->Instance->PRER = 0x007F00FFU;
-    hrtc->Instance->ALRMAR = 0x00000000U;        
-    hrtc->Instance->SHIFTR = 0x00000000U;
-    hrtc->Instance->CALR = 0x00000000U;
-    hrtc->Instance->ALRMASSR = 0x00000000U;
-    
-    /* Reset ISR register and exit initialization mode */
-    hrtc->Instance->ISR = 0x00000000U;
-    
-    /* Reset Tamper and alternate functions configuration register */
-    hrtc->Instance->TAFCR = 0x00000000;
-    
-    /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);  
-        
-        hrtc->State = HAL_RTC_STATE_ERROR;
-        
-        return HAL_ERROR;
-      }
-    }    
-  }
-  
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-  
-  /* De-Initialize RTC MSP */
-  HAL_RTC_MspDeInit(hrtc);
-  
-  hrtc->State = HAL_RTC_STATE_RESET; 
-  
-  /* Release Lock */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initialize the RTC MSP.
-  * @param  hrtc RTC handle  
-  * @retval None
-  */
-__weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTC_MspInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @brief  DeInitialize the RTC MSP.
-  * @param  hrtc RTC handle 
-  * @retval None
-  */
-__weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTC_MspDeInit could be implemented in the user file
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group2
- *  @brief   RTC Time and Date functions
- *
-@verbatim   
- ===============================================================================
-                 ##### RTC Time and Date functions #####
- ===============================================================================  
- 
- [..] This section provides functions allowing to configure Time and Date features
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Set RTC current time.
-  * @param  hrtc RTC handle
-  * @param  sTime Pointer to Time structure
-  * @param  Format Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN: Binary data format 
-  *            @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
-{
-  uint32_t tmpreg = 0U;
-  
- /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving));
-  assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation));
-  
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-  
-  hrtc->State = HAL_RTC_STATE_BUSY;
-  
-  if(Format == RTC_FORMAT_BIN)
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      assert_param(IS_RTC_HOUR12(sTime->Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
-    } 
-    else
-    {
-      sTime->TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(sTime->Hours));
-    }
-    assert_param(IS_RTC_MINUTES(sTime->Minutes));
-    assert_param(IS_RTC_SECONDS(sTime->Seconds));
-    
-    tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16U) | \
-                        ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8U) | \
-                        ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \
-                        (((uint32_t)sTime->TimeFormat) << 16U));  
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      tmpreg = RTC_Bcd2ToByte(sTime->Hours);
-      assert_param(IS_RTC_HOUR12(tmpreg));
-      assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); 
-    } 
-    else
-    {
-      sTime->TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
-    }
-    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
-    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
-    tmpreg = (((uint32_t)(sTime->Hours) << 16U) | \
-              ((uint32_t)(sTime->Minutes) << 8U) | \
-              ((uint32_t)sTime->Seconds) | \
-              ((uint32_t)(sTime->TimeFormat) << 16U));   
-  }
-  
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-  
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 
-    
-    /* Set RTC state */
-    hrtc->State = HAL_RTC_STATE_ERROR;
-    
-    /* Process Unlocked */ 
-    __HAL_UNLOCK(hrtc);
-    
-    return HAL_ERROR;
-  } 
-  else
-  {
-    /* Set the RTC_TR register */
-    hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
-     
-    /* Clear the bits to be configured */
-    hrtc->Instance->CR &= ((uint32_t)~RTC_CR_BKP);
-
-    /* Configure the RTC_CR register */
-    hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
-    
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT);
-
-    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-      {        
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);  
-        
-        hrtc->State = HAL_RTC_STATE_ERROR;
-        
-        /* Process Unlocked */ 
-        __HAL_UNLOCK(hrtc);
-        
-        return HAL_ERROR;
-      }
-    }
-    
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-    
-   hrtc->State = HAL_RTC_STATE_READY;
-  
-   __HAL_UNLOCK(hrtc); 
-     
-   return HAL_OK;
-  }
-}
-
-/**
-  * @brief  Get RTC current time.
-  * @param  hrtc RTC handle
-  * @param  sTime Pointer to Time structure with Hours, Minutes and Seconds fields returned 
-  *                with input format (BIN or BCD), also SubSeconds field returning the
-  *                RTC_SSR register content and SecondFraction field the Synchronous pre-scaler
-  *                factor to be used for second fraction ratio computation.
-  * @param  Format Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN: Binary data format 
-  *            @arg RTC_FORMAT_BCD: BCD data format
-  * @note  You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds
-  *        value in second fraction ratio with time unit following generic formula:
-  *        Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
-  *        This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS
-  * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values 
-  * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
-  * Reading RTC current time locks the values in calendar shadow registers until Current date is read
-  * to ensure consistency between the time and date values.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format)
-{
-  uint32_t tmpreg = 0;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  
-  /* Get subseconds structure field from the corresponding register*/
-  sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR);
-
-  /* Get SecondFraction structure field from the corresponding register field*/
-  sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S);
-  
-  /* Get the TR register */
-  tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK); 
-  
-  /* Fill the structure fields with the read parameters */
-  sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
-  sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8U);
-  sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU));
-  sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16U); 
-  
-  /* Check the input parameters format */
-  if(Format == RTC_FORMAT_BIN)
-  {
-    /* Convert the time structure parameters to Binary format */
-    sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours);
-    sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes);
-    sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds);  
-  }
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set RTC current date.
-  * @param  hrtc RTC handle
-  * @param  sDate Pointer to date structure
-  * @param  Format specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN: Binary data format 
-  *            @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
-{
-  uint32_t datetmpreg = 0U;
-  
- /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  
- /* Process Locked */ 
- __HAL_LOCK(hrtc);
-  
-  hrtc->State = HAL_RTC_STATE_BUSY; 
-  
-  if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
-  {
-    sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
-  }
-  
-  assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
-  
-  if(Format == RTC_FORMAT_BIN)
-  {   
-    assert_param(IS_RTC_YEAR(sDate->Year));
-    assert_param(IS_RTC_MONTH(sDate->Month));
-    assert_param(IS_RTC_DATE(sDate->Date)); 
-    
-   datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16U) | \
-                 ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8U) | \
-                 ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \
-                 ((uint32_t)sDate->WeekDay << 13U));   
-  }
-  else
-  {   
-    assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
-    datetmpreg = RTC_Bcd2ToByte(sDate->Month);
-    assert_param(IS_RTC_MONTH(datetmpreg));
-    datetmpreg = RTC_Bcd2ToByte(sDate->Date);
-    assert_param(IS_RTC_DATE(datetmpreg));
-    
-    datetmpreg = ((((uint32_t)sDate->Year) << 16U) | \
-                  (((uint32_t)sDate->Month) << 8U) | \
-                  ((uint32_t)sDate->Date) | \
-                  (((uint32_t)sDate->WeekDay) << 13U));  
-  }
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-  
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); 
-    
-    /* Set RTC state*/
-    hrtc->State = HAL_RTC_STATE_ERROR;
-    
-    /* Process Unlocked */ 
-    __HAL_UNLOCK(hrtc);
-    
-    return HAL_ERROR;
-  } 
-  else
-  {
-    /* Set the RTC_DR register */
-    hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
-    
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT);
-
-    /* If  CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-    {
-      if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-      { 
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);  
-        
-        hrtc->State = HAL_RTC_STATE_ERROR;
-        
-        /* Process Unlocked */ 
-        __HAL_UNLOCK(hrtc);
-        
-        return HAL_ERROR;
-      }
-    }
-    
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);  
-    
-    hrtc->State = HAL_RTC_STATE_READY ;
-    
-    /* Process Unlocked */ 
-    __HAL_UNLOCK(hrtc);
-    
-    return HAL_OK;    
-  }
-}
-
-/**
-  * @brief  Get RTC current date.
-  * @param  hrtc RTC handle
-  * @param  sDate Pointer to Date structure
-  * @param  Format Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_FORMAT_BIN :  Binary data format 
-  *            @arg RTC_FORMAT_BCD :  BCD data format
-  * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values 
-  * in the higher-order calendar shadow registers to ensure consistency between the time and date values.
-  * Reading RTC current time locks the values in calendar shadow registers until Current date is read.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format)
-{
-  uint32_t datetmpreg = 0;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-          
-  /* Get the DR register */
-  datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK); 
-
-  /* Fill the structure fields with the read parameters */
-  sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16U);
-  sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
-  sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU));
-  sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13U); 
-
-  /* Check the input parameters format */
-  if(Format == RTC_FORMAT_BIN)
-  {    
-    /* Convert the date structure parameters to Binary format */
-    sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year);
-    sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month);
-    sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date);  
-  }
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group3
- *  @brief   RTC Alarm functions
- *
-@verbatim   
- ===============================================================================
-                 ##### RTC Alarm functions #####
- ===============================================================================  
- 
- [..] This section provides functions allowing to configure Alarm feature
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Set the specified RTC Alarm.
-  * @param  hrtc RTC handle
-  * @param  sAlarm Pointer to Alarm structure
-  * @param  Format Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
-{
-  uint32_t tickstart = 0U;
-  uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_ALARM(sAlarm->Alarm));
-  assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
-  assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
-  
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-  
-  hrtc->State = HAL_RTC_STATE_BUSY;
-  
-  if(Format == RTC_FORMAT_BIN)
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    } 
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
-    }
-    assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
-    assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
-    
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
-    }
-    else
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
-    }
-    
-    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask)); 
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
-      assert_param(IS_RTC_HOUR12(tmpreg));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    } 
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
-    }
-    
-    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
-    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
-    
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));    
-    }
-    else
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));      
-    }  
-    
-    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask));   
-  }
-  
-  /* Configure the Alarm A Sub Second registers */
-  subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
-  
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Disable the Alarm A interrupt */
-  __HAL_RTC_ALARMA_DISABLE(hrtc);
-
-  /* In case of interrupt mode is used, the interrupt source must disabled */ 
-  __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
-         
-  tickstart = HAL_GetTick();
-  /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
-  {
-    if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      hrtc->State = HAL_RTC_STATE_TIMEOUT; 
-
-      /* Process Unlocked */ 
-      __HAL_UNLOCK(hrtc);
-        
-      return HAL_TIMEOUT;
-    }
-  }
-    
-  hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
-  /* Configure the Alarm A Sub Second register */
-  hrtc->Instance->ALRMASSR = subsecondtmpreg;
-  /* Configure the Alarm state: Enable Alarm */
-  __HAL_RTC_ALARMA_ENABLE(hrtc);
-  
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);   
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY; 
-  
-  /* Process Unlocked */ 
-  __HAL_UNLOCK(hrtc);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set the specified RTC Alarm with Interrupt.
-  * @param  hrtc RTC handle
-  * @param  sAlarm Pointer to Alarm structure
-  * @param  Format Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @note   The Alarm register can only be written when the corresponding Alarm
-  *         is disabled (Use the HAL_RTC_DeactivateAlarm()).   
-  * @note   The HAL_RTC_SetTime() must be called before enabling the Alarm feature.   
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format)
-{
-  uint32_t tickstart = 0U;
-  uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_ALARM(sAlarm->Alarm));
-  assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
-  assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
-  assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
-      
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-  
-  hrtc->State = HAL_RTC_STATE_BUSY;
-  
-  if(Format == RTC_FORMAT_BIN)
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    } 
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
-    }
-    assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
-    assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
-    
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
-    }
-    else
-    {
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
-    }
-    tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask)); 
-  }
-  else
-  {
-    if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
-      assert_param(IS_RTC_HOUR12(tmpreg));
-      assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
-    } 
-    else
-    {
-      sAlarm->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
-    }
-    
-    assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
-    assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
-    
-    if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));    
-    }
-    else
-    {
-      tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-      assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));      
-    }
-    tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) | \
-              ((uint32_t) sAlarm->AlarmTime.Seconds) | \
-              ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) | \
-              ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) | \
-              ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \
-              ((uint32_t)sAlarm->AlarmMask));     
-  }
-  /* Configure the Alarm A Sub Second registers */
-  subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask));
-  
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-  
-  /* Disable the Alarm A interrupt */
-  __HAL_RTC_ALARMA_DISABLE(hrtc);
-
-  /* Clear flag alarm A */
-  __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
-
-  tickstart = HAL_GetTick();
-  
-  /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
-  {
-    if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-        
-      hrtc->State = HAL_RTC_STATE_TIMEOUT; 
-        
-      /* Process Unlocked */ 
-      __HAL_UNLOCK(hrtc);
-        
-      return HAL_TIMEOUT;
-    }  
-  }
-    
-  hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
-  /* Configure the Alarm A Sub Second register */
-  hrtc->Instance->ALRMASSR = subsecondtmpreg;
-  /* Configure the Alarm state: Enable Alarm */
-  __HAL_RTC_ALARMA_ENABLE(hrtc);
-  /* Configure the Alarm interrupt */
-  __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA);
-
-  /* RTC Alarm Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_ALARM_EXTI_ENABLE_IT();
-  
-  __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE();
-  
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);  
-  
-  hrtc->State = HAL_RTC_STATE_READY; 
-  
-  /* Process Unlocked */ 
-  __HAL_UNLOCK(hrtc);  
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate the specified RTC Alarm.
-  * @param  hrtc RTC handle
-  * @param  Alarm Specifies the Alarm.
-  *          This parameter can be one of the following values:
-  *            @arg RTC_ALARM_A:  AlarmA
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_RTC_ALARM(Alarm));
-  
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-  
-  hrtc->State = HAL_RTC_STATE_BUSY;
-  
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-  
-  __HAL_RTC_ALARMA_DISABLE(hrtc);
-    
-  /* In case of interrupt mode is used, the interrupt source must disabled */ 
-  __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
-    
-  tickstart = HAL_GetTick();
-    
-  /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
-  {
-    if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-    { 
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-        
-      hrtc->State = HAL_RTC_STATE_TIMEOUT; 
-        
-      /* Process Unlocked */ 
-      __HAL_UNLOCK(hrtc);
-        
-      return HAL_TIMEOUT;
-    }      
-  }
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-  
-  hrtc->State = HAL_RTC_STATE_READY; 
-  
-  /* Process Unlocked */ 
-  __HAL_UNLOCK(hrtc);  
-  
-  return HAL_OK; 
-}
-           
-/**
-  * @brief  Get the RTC Alarm value and masks.
-  * @param  hrtc RTC handle
-  * @param  sAlarm Pointer to Date structure
-  * @param  Alarm Specifies the Alarm.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_ALARM_A: AlarmA
-  * @param  Format Specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format)
-{
-  uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-  assert_param(IS_RTC_ALARM(Alarm));
-  
-  sAlarm->Alarm = RTC_ALARM_A;
-    
-  tmpreg = (uint32_t)(hrtc->Instance->ALRMAR);
-  subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS);
-    
-  /* Fill the structure with the read parameters */
-  sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16U);
-  sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8U);
-  sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU));
-  sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16U);
-  sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg;
-  sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24U);
-  sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL);
-  sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL);
-    
-  if(Format == RTC_FORMAT_BIN)
-  {
-    sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
-    sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes);
-    sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds);
-    sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
-  }  
-    
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle Alarm interrupt request.
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc)
-{  
-  /* Get the AlarmA interrupt source enable status */
-  if(__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET)
-  {
-    /* Get the pending status of the AlarmA Interrupt */
-    if(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET)
-    {
-      /* AlarmA callback */
-      HAL_RTC_AlarmAEventCallback(hrtc);
-
-      /* Clear the AlarmA interrupt pending bit */
-      __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
-    }
-  }
-  
-  /* Clear the EXTI's line Flag for RTC Alarm */
-  __HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY; 
-}
-
-/**
-  * @brief  Alarm A callback.
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-__weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTC_AlarmAEventCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Handle AlarmA Polling request.
-  * @param  hrtc RTC handle
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-
-  uint32_t tickstart = HAL_GetTick();   
-  
-  while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  
-  /* Clear the Alarm interrupt pending bit */
-  __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY; 
-  
-  return HAL_OK;  
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group4
- *  @brief   Peripheral Control functions 
- *
-@verbatim   
- ===============================================================================
-                     ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Wait for RTC Time and Date Synchronization
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Wait until the RTC Time and Date registers (RTC_TR and RTC_DR) are
-  *         synchronized with RTC APB clock.
-  * @note   The RTC Resynchronization mode is write protected, use the 
-  *         __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. 
-  * @note   To read the calendar through the shadow registers after Calendar 
-  *         initialization, calendar update or after wakeup from low power modes
-  *         the software must first clear the RSF flag.
-  *         The software must then wait until it is set again before reading
-  *         the calendar, which means that the calendar registers have been
-  *         correctly copied into the RTC_TR and RTC_DR shadow registers.
-  * @param  hrtc RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Clear RSF flag */
-  hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
-
-  tickstart = HAL_GetTick();
-
-  /* Wait the registers to be synchronised */
-  while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
-  {
-    if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-    {       
-      return HAL_TIMEOUT;
-    } 
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Exported_Functions_Group5
- *  @brief   Peripheral State functions 
- *
-@verbatim   
- ===============================================================================
-                     ##### Peripheral State functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Get RTC state
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Return the RTC handle state.
-  * @param  hrtc RTC handle
-  * @retval HAL state
-  */
-HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc)
-{
-  /* Return RTC handle state */
-  return hrtc->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup RTC_Private_Functions
-  * @{
-  */
-/**
-  * @brief  Enter the RTC Initialization mode.
-  * @note   The RTC Initialization mode is write protected, use the
-  *         __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
-  * @param  hrtc RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc)
-{
-  uint32_t tickstart = 0U;
-  
-  /* Check if the Initialization mode is set */
-  if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
-  {
-    /* Set the Initialization mode */
-    hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
-    
-    tickstart = HAL_GetTick();
-    
-    /* Wait till RTC is in INIT state and if Time out is reached exit */
-    while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
-    {
-      if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-      {       
-        return HAL_TIMEOUT;
-      } 
-    }
-  }
-  
-  return HAL_OK;  
-}
-
-
-/**
-  * @brief  Convert a 2 digit decimal to BCD format.
-  * @param  Value Byte to be converted
-  * @retval Converted byte
-  */
-uint8_t RTC_ByteToBcd2(uint8_t Value)
-{
-  uint32_t bcdhigh = 0U;
-  
-  while(Value >= 10U)
-  {
-    bcdhigh++;
-    Value -= 10U;
-  }
-  
-  return  ((uint8_t)(bcdhigh << 4U) | Value);
-}
-
-/**
-  * @brief  Convert from 2 digit BCD to Binary.
-  * @param  Value BCD value to be converted
-  * @retval Converted word
-  */
-uint8_t RTC_Bcd2ToByte(uint8_t Value)
-{
-  uint32_t tmp = 0U;
-  tmp = ((uint8_t)(Value & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U;
-  return (tmp + (Value & (uint8_t)0x0FU));
-}
-/**
-  * @}
-  */
-
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_rtc_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_rtc_ex.c
deleted file mode 100644
index de88f3ad..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_rtc_ex.c
+++ /dev/null
@@ -1,1594 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_rtc_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended RTC HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Real Time Clock (RTC) Extended peripheral:
-  *           + RTC Time Stamp functions
-  *           + RTC Tamper functions 
-  *           + RTC Wake-up functions
-  *           + Extended Control functions
-  *           + Extended RTC features functions    
-  *
-  @verbatim
-  ==============================================================================
-                  ##### How to use this driver #####
-  ==============================================================================
-  [..] 
-    (+) Enable the RTC domain access.
-        (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour 
-            format using the HAL_RTC_Init() function.
-
-    *** RTC Wake-up configuration ***
-    ================================
-    [..] 
-    (+) To configure the RTC Wakeup Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer()
-        function. You can also configure the RTC Wakeup timer with interrupt mode 
-            using the HAL_RTCEx_SetWakeUpTimer_IT() function.
-    (+) To read the RTC WakeUp Counter register, use the HAL_RTCEx_GetWakeUpTimer()
-            function.
-        (@) Not available on F030x4/x6/x8 and F070x6            
-  
-    *** TimeStamp configuration ***
-    ===============================
-    [..]
-        (+) Configure the RTC_AF trigger and enable the RTC TimeStamp using the 
-            HAL_RTCEx_SetTimeStamp() function. You can also configure the RTC TimeStamp with 
-            interrupt mode using the HAL_RTCEx_SetTimeStamp_IT() function.
-        (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp()
-            function.
-  
-    *** Tamper configuration ***
-    ============================
-    [..]
-        (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge 
-            or Level according to the Tamper filter (if equal to 0 Edge else Level) 
-            value, sampling frequency, precharge or discharge and Pull-UP using the 
-            HAL_RTCEx_SetTamper() function. You can configure RTC Tamper in interrupt 
-            mode using HAL_RTCEx_SetTamper_IT() function.
-  
-    *** Backup Data Registers configuration ***
-    ===========================================
-    [..]
-        (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite()
-            function.  
-        (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead()
-            function.
-        (@) Not available on F030x6/x8/xC and F070x6/xB (F0xx Value Line devices)
-   
-     
-   @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************  
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-
-
-/** @addtogroup RTCEx
-  * @brief RTC Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_RTC_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-
-/** @addtogroup RTCEx_Exported_Functions
-  * @{
-  */
-
-
-/** @addtogroup RTCEx_Exported_Functions_Group1
- *  @brief   RTC TimeStamp and Tamper functions
- *
-@verbatim   
- ===============================================================================
-                 ##### RTC TimeStamp and Tamper functions #####
- ===============================================================================  
- 
- [..] This section provides functions allowing to configure TimeStamp feature
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Set TimeStamp.
-  * @note   This API must be called before enabling the TimeStamp feature.
-  * @param  hrtc RTC handle
-  * @param  TimeStampEdge Specifies the pin edge on which the TimeStamp is
-  *         activated.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the  
-  *                                        rising edge of the related pin.
-  *             @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the 
-  *                                         falling edge of the related pin.
-  * @param  RTC_TimeStampPin specifies the RTC TimeStamp Pin.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
-  assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Get the RTC_CR register and clear the bits to be configured */
-  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
-
-  tmpreg|= TimeStampEdge;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Configure the Time Stamp TSEDGE and Enable bits */
-  hrtc->Instance->CR = (uint32_t)tmpreg;
-
-  __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set TimeStamp with Interrupt.
-  * @param  hrtc RTC handle
-  * @note   This API must be called before enabling the TimeStamp feature.
-  * @param  TimeStampEdge Specifies the pin edge on which the TimeStamp is 
-  *         activated.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the  
-  *                                        rising edge of the related pin.
-  *             @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the 
-  *                                         falling edge of the related pin.
-  * @param  RTC_TimeStampPin Specifies the RTC TimeStamp Pin.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
-  assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
-
-  /* Process Locked */ 
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Get the RTC_CR register and clear the bits to be configured */
-  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
-
-  tmpreg |= TimeStampEdge;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Configure the Time Stamp TSEDGE and Enable bits */
-  hrtc->Instance->CR = (uint32_t)tmpreg;
-
-  __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
-
-  /* Enable IT timestamp */
-  __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS);
-
-  /* RTC timestamp Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
-
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate TimeStamp.
-  * @param  hrtc RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* In case of interrupt mode is used, the interrupt source must disabled */
-  __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS);
-
-  /* Get the RTC_CR register and clear the bits to be configured */
-  tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
-
-  /* Configure the Time Stamp TSEDGE and Enable bits */
-  hrtc->Instance->CR = (uint32_t)tmpreg;
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get the RTC TimeStamp value.
-  * @param  hrtc RTC handle
-
-  * @param  sTimeStamp Pointer to Time structure
-  * @param  sTimeStampDate Pointer to Date structure  
-  * @param  Format specifies the format of the entered parameters.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_FORMAT_BIN: Binary data format 
-  *             @arg RTC_FORMAT_BCD: BCD data format
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format)
-{
-  uint32_t tmptime = 0U, tmpdate = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_FORMAT(Format));
-
-  /* Get the TimeStamp time and date registers values */
-  tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK);
-  tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK);
-
-  /* Fill the Time structure fields with the read parameters */
-  sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
-  sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
-  sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU));
-  sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16U);
-  sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR;
-
-  /* Fill the Date structure fields with the read parameters */
-  sTimeStampDate->Year = 0;
-  sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
-  sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU));
-  sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13U);
-
-  /* Check the input parameters format */
-  if(Format == RTC_FORMAT_BIN)
-  {
-    /* Convert the TimeStamp structure parameters to Binary format */
-    sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
-    sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes);
-    sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds);
-
-    /* Convert the DateTimeStamp structure parameters to Binary format */
-    sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
-    sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
-    sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay);
-  }
-
-  /* Clear the TIMESTAMP Flag */
-  __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set Tamper
-  * @note   By calling this API we disable the tamper interrupt for all tampers.
-  * @param  hrtc RTC handle
-  * @param  sTamper Pointer to Tamper Structure.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_TAMPER(sTamper->Tamper));
-  assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
-  assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
-  assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
-  assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
-  assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
-  assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
-  {
-    sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U);
-  }
-
-  tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->Filter |\
-            (uint32_t)sTamper->SamplingFrequency | (uint32_t)sTamper->PrechargeDuration |\
-            (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection);
-
-  hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | (uint32_t)RTC_TAFCR_TAMPTS |\
-                                       (uint32_t)RTC_TAFCR_TAMPFREQ | (uint32_t)RTC_TAFCR_TAMPFLT | (uint32_t)RTC_TAFCR_TAMPPRCH |\
-                                       (uint32_t)RTC_TAFCR_TAMPPUDIS | (uint32_t)RTC_TAFCR_TAMPIE);
-
-  hrtc->Instance->TAFCR |= tmpreg;
-  
-  hrtc->State = HAL_RTC_STATE_READY; 
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Sets Tamper with interrupt.
-  * @note   By calling this API we force the tamper interrupt for all tampers.
-  * @param  hrtc pointer to a RTC_HandleTypeDef structure that contains
-  *                the configuration information for RTC.
-  * @param  sTamper Pointer to RTC Tamper.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_TAMPER(sTamper->Tamper)); 
-  assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
-  assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
-  assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
-  assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
-  assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
-  assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Configure the tamper trigger */
-  if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
-  {
-    sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U);
-  }
-
-  tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->Filter |\
-            (uint32_t)sTamper->SamplingFrequency | (uint32_t)sTamper->PrechargeDuration |\
-            (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection);
-
-  hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | (uint32_t)RTC_TAFCR_TAMPTS |\
-                                       (uint32_t)RTC_TAFCR_TAMPFREQ | (uint32_t)RTC_TAFCR_TAMPFLT | (uint32_t)RTC_TAFCR_TAMPPRCH |\
-                                       (uint32_t)RTC_TAFCR_TAMPPUDIS);
-
-  hrtc->Instance->TAFCR |= tmpreg;
-
-  /* Configure the Tamper Interrupt in the RTC_TAFCR */
-  hrtc->Instance->TAFCR |= (uint32_t)RTC_TAFCR_TAMPIE;
-
-  /* RTC Tamper Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
-  
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate Tamper.
-  * @param  hrtc RTC handle
-  * @param  Tamper Selected tamper pin.
-  *          This parameter can be any combination of RTC_TAMPER_1, RTC_TAMPER_2 and RTC_TAMPER_3.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper)
-{
-  assert_param(IS_RTC_TAMPER(Tamper));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the selected Tamper pin */
-  hrtc->Instance->TAFCR &= (uint32_t)~Tamper;
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle TimeStamp interrupt request.
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
-{  
-  /* Get the TimeStamp interrupt source enable status */
-  if(__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET)
-  {
-    /* Get the pending status of the TIMESTAMP Interrupt */
-    if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)
-    {
-      /* TIMESTAMP callback */ 
-      HAL_RTCEx_TimeStampEventCallback(hrtc);
-      
-      /* Clear the TIMESTAMP interrupt pending bit */
-      __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
-    }
-  }
-
-  /* Get the Tamper interrupts source enable status */
-  if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP))
-  {
-   /* Get the pending status of the Tamper1 Interrupt */
-    if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)
-    {
-      /* Tamper1 callback */
-      HAL_RTCEx_Tamper1EventCallback(hrtc);
-
-      /* Clear the Tamper1 interrupt pending bit */
-      __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
-    }
-  }
-
-  /* Get the Tamper interrupts source enable status */
-  if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP))
-  {
-   /* Get the pending status of the Tamper2 Interrupt */
-    if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)
-    {
-      /* Tamper2 callback */
-      HAL_RTCEx_Tamper2EventCallback(hrtc);
-
-      /* Clear the Tamper2 interrupt pending bit */
-      __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
-    }
-  }
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
-  /* Get the Tamper interrupts source enable status */
-  if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP))
-  {
-   /* Get the pending status of the Tamper3 Interrupt */
-    if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)
-    {
-      /* Tamper3 callback */
-      HAL_RTCEx_Tamper3EventCallback(hrtc);
-
-      /* Clear the Tamper3 interrupt pending bit */
-      __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F);
-    }
-  }
-#endif
-
-  /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */
-  __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-}
-
-/**
-  * @brief  TimeStamp callback. 
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file
-  */
-}
-
-/**
-  * @brief  Tamper 1 callback.
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Tamper 2 callback. 
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_Tamper2EventCallback could be implemented in the user file
-   */
-}
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
-/**
-  * @brief  Tamper 3 callback. 
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_Tamper3EventCallback could be implemented in the user file
-   */
-}
-#endif
-
-/**
-  * @brief  Handle TimeStamp polling request.
-  * @param  hrtc RTC handle
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{ 
-  uint32_t tickstart = HAL_GetTick();
-
-  while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET)
-  {
-    if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET)
-    {
-      /* Clear the TIMESTAMP OverRun Flag */
-      __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
-
-      /* Change TIMESTAMP state */
-      hrtc->State = HAL_RTC_STATE_ERROR;
-
-      return HAL_ERROR;
-    }
-
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle Tamper 1 Polling.
-  * @param  hrtc RTC handle
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Get the status of the Interrupt */
-  while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP1F)== RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Tamper Flag */
-  __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP1F);
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-  
-  return HAL_OK; 
-}
-
-/**
-  * @brief  Handle Tamper 2 Polling.
-  * @param  hrtc RTC handle
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Get the status of the Interrupt */
-  while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP2F) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Tamper Flag */
-  __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP2F);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-
-#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
-/**
-  * @brief  Handle Tamper 3 Polling.
-  * @param  hrtc RTC handle
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{  
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Get the status of the Interrupt */
-  while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP3F) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the Tamper Flag */
-  __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP3F);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-#endif
-
-/**
-  * @}
-  */
-  
-#if defined(STM32F070xB) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
-/** @addtogroup RTCEx_Exported_Functions_Group2
-  * @brief    RTC Wake-up functions
-  *
-@verbatim   
- ===============================================================================
-                        ##### RTC Wake-up functions #####
- ===============================================================================  
- 
- [..] This section provides functions allowing to configure Wake-up feature
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Set wake up timer.
-  * @param  hrtc RTC handle
-  * @param  WakeUpCounter Wake up counter
-  * @param  WakeUpClock Wake up clock
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
-  assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
-  if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
-    tickstart = HAL_GetTick();
-
-   /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
-   while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
-   {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-       /* Enable the write protection for RTC registers */
-       __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-       hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-       /* Process Unlocked */ 
-       __HAL_UNLOCK(hrtc);
-
-       return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
-
-  tickstart = HAL_GetTick();
-
-  /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
-  {
-    if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Clear the Wakeup Timer clock source bits in CR register */
-  hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
-
-  /* Configure the clock source */
-  hrtc->Instance->CR |= (uint32_t)WakeUpClock;
-
-  /* Configure the Wakeup Timer counter */
-  hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
-
-   /* Enable the Wakeup Timer */
-  __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Set wake up timer with interrupt.
-  * @param  hrtc RTC handle
-  * @param  WakeUpCounter Wake up counter
-  * @param  WakeUpClock Wake up clock  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
-  assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
-  if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
-    tickstart = HAL_GetTick();
-
-   /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
-   while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
-   {
-    if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
-      {
-       /* Enable the write protection for RTC registers */
-       __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-       hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-       /* Process Unlocked */ 
-       __HAL_UNLOCK(hrtc);
-
-       return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Disable the Wake-Up timer */
-  __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
-
-  /* Clear flag Wake-Up */
-  __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
-
-  tickstart = HAL_GetTick();
-
-  /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
-  {
-    if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Configure the Wakeup Timer counter */
-  hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
-
-  /* Clear the Wakeup Timer clock source bits in CR register */
-  hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
-
-  /* Configure the clock source */
-  hrtc->Instance->CR |= (uint32_t)WakeUpClock;
-
-  /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
-  __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
-
-  __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
-
-  /* Configure the Interrupt in the RTC_CR register */
-  __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT);
-  
-  /* Enable the Wakeup Timer */
-  __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate wake up timer counter.
-  * @param  hrtc RTC handle 
-  * @retval HAL status
-  */
-uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
-{
-  uint32_t tickstart = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Disable the Wakeup Timer */
-  __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
-
-  /* In case of interrupt mode is used, the interrupt source must disabled */
-  __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT);
-
-  tickstart = HAL_GetTick();
-  /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
-  {
-    if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_TIMEOUT;
-    }
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Get wake up timer counter.
-  * @param  hrtc RTC handle 
-  * @retval Counter value
-  */
-uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
-{
-  /* Get the counter value */
-  return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT));
-}
-
-/**
-  * @brief  Handle Wake Up Timer interrupt request.
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
-{
-  /* Get the WAKEUPTIMER interrupt source enable status */
-  if(__HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(hrtc, RTC_IT_WUT) != RESET)
-  {
-   /* Get the pending status of the WAKEUPTIMER Interrupt */
-    if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET)
-    {
-      /* WAKEUPTIMER callback */ 
-      HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
-      
-      /* Clear the WAKEUPTIMER interrupt pending bit */
-      __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
-    }
-  }
-
-  /* Clear the EXTI's line Flag for RTC WakeUpTimer */
-  __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-}
-
-/**
-  * @brief  Wake Up Timer callback.
-  * @param  hrtc RTC handle
-  * @retval None
-  */
-__weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hrtc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file
-   */
-}
-
-
-/**
-  * @brief  Handle Wake Up Timer Polling.
-  * @param  hrtc RTC handle
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET)
-  {
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
-      {
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-      
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Clear the WAKEUPTIMER Flag */
-  __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
-  
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-#endif /* defined(STM32F070xB) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx) | defined(STM32F030xC)  */
-
-/** @addtogroup RTCEx_Exported_Functions_Group3
-  * @brief    Extended Peripheral Control functions
-  *
-@verbatim   
- ===============================================================================
-              ##### Extended Peripheral Control functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Write a data in a specified RTC Backup data register
-      (+) Read a data in a specified RTC Backup data register
-      (+) Set the Coarse calibration parameters.
-      (+) Deactivate the Coarse calibration parameters
-      (+) Set the Smooth calibration parameters.
-      (+) Configure the Synchronization Shift Control Settings.
-      (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-      (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-      (+) Enable the RTC reference clock detection.
-      (+) Disable the RTC reference clock detection.
-      (+) Enable the Bypass Shadow feature.
-      (+) Disable the Bypass Shadow feature.
-
-@endverbatim
-  * @{
-  */
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
-/**
-  * @brief  Write a data in a specified RTC Backup data register.
-  * @param  hrtc RTC handle 
-  * @param  BackupRegister RTC Backup data Register number.
-  *          This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to 
-  *                                 specify the register.
-  * @param  Data Data to be written in the specified RTC Backup data register.                     
-  * @retval None
-  */
-void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data)
-{
-  uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_BKP(BackupRegister));
-
-  tmp = (uint32_t)&(hrtc->Instance->BKP0R);
-  tmp += (BackupRegister * 4U);
-
-  /* Write the specified register */
-  *(__IO uint32_t *)tmp = (uint32_t)Data;
-}
-
-/**
-  * @brief  Reads data from the specified RTC Backup data Register.
-  * @param  hrtc RTC handle 
-  * @param  BackupRegister RTC Backup data Register number.
-  *          This parameter can be: RTC_BKP_DRx where x can be from 0 to 4 to 
-  *                                 specify the register.                   
-  * @retval Read value
-  */
-uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
-{
-  uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_BKP(BackupRegister));
-
-  tmp = (uint32_t)&(hrtc->Instance->BKP0R);
-  tmp += (BackupRegister * 4U);
-  
-  /* Read the specified register */
-  return (*(__IO uint32_t *)tmp);
-}
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
-
-/**
-  * @brief  Set the Smooth calibration parameters.
-  * @param  hrtc RTC handle  
-  * @param  SmoothCalibPeriod Select the Smooth Calibration Period.
-  *          This parameter can be can be one of the following values :
-  *             @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s.
-  *             @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s.
-  *             @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s.
-  * @param  SmoothCalibPlusPulses Select to Set or reset the CALP bit.
-  *          This parameter can be one of the following values:
-  *             @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses.
-  *             @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added.
-  * @param  SmoothCalibMinusPulsesValue Select the value of CALM[8:0] bits.
-  *          This parameter can be one any value from 0 to 0x000001FF.
-  * @note   To deactivate the smooth calibration, the field SmoothCalibPlusPulses 
-  *         must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field
-  *         SmoothCalibMinusPulsesValue mut be equal to 0.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod));
-  assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses));
-  assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* check if a calibration is pending*/
-  if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
-  {
-    tickstart = HAL_GetTick();
-
-    /* check if a calibration is pending*/
-    while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
-    {
-      if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        /* Change RTC state */
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  /* Configure the Smooth calibration settings */
-  hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmoothCalibMinusPulsesValue);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the Synchronization Shift Control Settings.
-  * @note   When REFCKON is set, firmware must not write to Shift control register. 
-  * @param  hrtc RTC handle    
-  * @param  ShiftAdd1S Select to add or not 1 second to the time calendar.
-  *          This parameter can be one of the following values :
-  *             @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar. 
-  *             @arg RTC_SHIFTADD1S_RESET: No effect.
-  * @param  ShiftSubFS Select the number of Second Fractions to substitute.
-  *          This parameter can be one any value from 0 to 0x7FFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S));
-  assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-    tickstart = HAL_GetTick();
-
-    /* Wait until the shift is completed*/
-    while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET)
-    {
-      if((HAL_GetTick()-tickstart) > RTC_TIMEOUT_VALUE)
-      {
-        /* Enable the write protection for RTC registers */
-        __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-        hrtc->State = HAL_RTC_STATE_TIMEOUT;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hrtc);
-
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Check if the reference clock detection is disabled */
-    if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET)
-    {
-      /* Configure the Shift settings */
-      hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S);
-
-      /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-      if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
-      {
-        if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
-        {
-          /* Enable the write protection for RTC registers */
-          __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-          hrtc->State = HAL_RTC_STATE_ERROR;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hrtc);
-
-          return HAL_ERROR;
-        }
-      }
-    }
-    else
-    {
-      /* Enable the write protection for RTC registers */
-      __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-      /* Change RTC state */
-      hrtc->State = HAL_RTC_STATE_ERROR;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hrtc);
-
-      return HAL_ERROR;
-    }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-  * @param  hrtc RTC handle
-  * @param  CalibOutput Select the Calibration output Selection .
-  *          This parameter can be one of the following values:
-  *             @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz.
-  *             @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput)
-{
-  /* Check the parameters */
-  assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput));
-
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Clear flags before config */
-  hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL;
-
-  /* Configure the RTC_CR register */
-  hrtc->Instance->CR |= (uint32_t)CalibOutput;
-
-  __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
-  * @param  hrtc RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable the RTC reference clock detection.
-  * @param  hrtc RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state*/
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrtc);
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc);
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-   /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the RTC reference clock detection.
-  * @param  hrtc RTC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-  
-  /* Set Initialization mode */
-  if(RTC_EnterInitMode(hrtc) != HAL_OK)
-  {
-    /* Enable the write protection for RTC registers */
-    __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-    /* Set RTC state*/
-    hrtc->State = HAL_RTC_STATE_ERROR;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hrtc);
-
-    return HAL_ERROR;
-  }
-  else
-  {
-    __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc);
-
-    /* Exit Initialization mode */
-    hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
-  }
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable the Bypass Shadow feature.
-  * @param  hrtc RTC handle
-  * @note   When the Bypass Shadow is enabled the calendar value are taken
-  *         directly from the Calendar counter.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Set the BYPSHAD bit */
-  hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD;
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the Bypass Shadow feature.
-  * @param  hrtc RTC handle
-  * @note   When the Bypass Shadow is enabled the calendar value are taken
-  *         directly from the Calendar counter.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc)
-{
-  /* Process Locked */
-  __HAL_LOCK(hrtc);
-
-  hrtc->State = HAL_RTC_STATE_BUSY;
-
-  /* Disable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
-
-  /* Reset the BYPSHAD bit */
-  hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD);
-
-  /* Enable the write protection for RTC registers */
-  __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
-
-  /* Change RTC state */
-  hrtc->State = HAL_RTC_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hrtc);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_smartcard.c b/lib/hal-stm32f0/source/stm32f0xx_hal_smartcard.c
deleted file mode 100644
index e111236f..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_smartcard.c
+++ /dev/null
@@ -1,2303 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_smartcard.c
-  * @author  MCD Application Team
-  * @brief   SMARTCARD HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the SMARTCARD peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Error functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    The SMARTCARD HAL driver can be used as follows:
-
-    (#) Declare a SMARTCARD_HandleTypeDef handle structure (eg. SMARTCARD_HandleTypeDef hsmartcard).
-    (#) Associate a USART to the SMARTCARD handle hsmartcard.
-    (#) Initialize the SMARTCARD low level resources by implementing the HAL_SMARTCARD_MspInit() API:
-        (++) Enable the USARTx interface clock.
-        (++) USART pins configuration:
-            (+++) Enable the clock for the USART GPIOs.
-            (+++) Configure the USART pins (TX as alternate function pull-up, RX as alternate function Input).
-        (++) NVIC configuration if you need to use interrupt process (HAL_SMARTCARD_Transmit_IT()
-             and HAL_SMARTCARD_Receive_IT() APIs):
-            (+++) Configure the USARTx interrupt priority.
-            (+++) Enable the NVIC USART IRQ handle.
-        (++) DMA Configuration if you need to use DMA process (HAL_SMARTCARD_Transmit_DMA()
-             and HAL_SMARTCARD_Receive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the SMARTCARD DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-    (#) Program the Baud Rate, Parity, Mode(Receiver/Transmitter), clock enabling/disabling and accordingly,
-        the clock parameters (parity, phase, last bit), prescaler value, guard time and NACK on transmission
-        error enabling or disabling in the hsmartcard handle Init structure.
-
-    (#) If required, program SMARTCARD advanced features (TX/RX pins swap, TimeOut, auto-retry counter,...)
-        in the hsmartcard handle AdvancedInit structure.
-
-    (#) Initialize the SMARTCARD registers by calling the HAL_SMARTCARD_Init() API:
-        (++) This API configures also the low level Hardware (GPIO, CLOCK, CORTEX...etc)
-             by calling the customized HAL_SMARTCARD_MspInit() API.
-        [..]
-        (@) The specific SMARTCARD interrupts (Transmission complete interrupt,
-             RXNE interrupt and Error Interrupts) will be managed using the macros
-             __HAL_SMARTCARD_ENABLE_IT() and __HAL_SMARTCARD_DISABLE_IT() inside the transmit and receive process.
-
-    [..]
-    [..] Three operation modes are available within this driver :
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]
-       (+) Send an amount of data in blocking mode using HAL_SMARTCARD_Transmit()
-       (+) Receive an amount of data in blocking mode using HAL_SMARTCARD_Receive()
-
-     *** Interrupt mode IO operation ***
-     ===================================
-     [..]
-       (+) Send an amount of data in non-blocking mode using HAL_SMARTCARD_Transmit_IT()
-       (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode using HAL_SMARTCARD_Receive_IT()
-       (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback()
-       (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback()
-
-     *** DMA mode IO operation ***
-     ==============================
-     [..]
-       (+) Send an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Transmit_DMA()
-       (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback()
-       (+) Receive an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Receive_DMA()
-       (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback()
-       (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback()
-
-     *** SMARTCARD HAL driver macros list ***
-     ========================================
-     [..]
-       Below the list of most used macros in SMARTCARD HAL driver.
-
-       (+) __HAL_SMARTCARD_GET_FLAG : Check whether or not the specified SMARTCARD flag is set
-       (+) __HAL_SMARTCARD_CLEAR_FLAG : Clear the specified SMARTCARD pending flag
-       (+) __HAL_SMARTCARD_ENABLE_IT: Enable the specified SMARTCARD interrupt
-       (+) __HAL_SMARTCARD_DISABLE_IT: Disable the specified SMARTCARD interrupt
-       (+) __HAL_SMARTCARD_GET_IT_SOURCE: Check whether or not the specified SMARTCARD interrupt is enabled
-
-     [..]
-       (@) You can refer to the SMARTCARD HAL driver header file for more useful macros
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SMARTCARD SMARTCARD
-  * @brief HAL SMARTCARD module driver
-  * @{
-  */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup SMARTCARD_Private_Constants SMARTCARD Private Constants
- * @{
- */
-#define SMARTCARD_TEACK_REACK_TIMEOUT               1000U      /*!< SMARTCARD TX or RX enable acknowledge time-out value  */
-
-#define USART_CR1_FIELDS      ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
-                                          USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8))       /*!< USART CR1 fields of parameters set by SMARTCARD_SetConfig API */
-#define USART_CR2_CLK_FIELDS  ((uint32_t)(USART_CR2_CLKEN|USART_CR2_CPOL|USART_CR2_CPHA|USART_CR2_LBCL)) /*!< SMARTCARD clock-related USART CR2 fields of parameters */
-#define USART_CR2_FIELDS      ((uint32_t)(USART_CR2_RTOEN|USART_CR2_CLK_FIELDS|USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by SMARTCARD_SetConfig API */
-#define USART_CR3_FIELDS      ((uint32_t)(USART_CR3_ONEBIT|USART_CR3_NACK|USART_CR3_SCARCNT))   /*!< USART CR3 fields of parameters set by SMARTCARD_SetConfig API */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup SMARTCARD_Private_Functions
-  * @{
-  */
-static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard);
-static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsmartcard);
-static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsmartcard);
-static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup SMARTCARD_Exported_Functions SMARTCARD Exported Functions
-  * @{
-  */
-
-/** @defgroup SMARTCARD_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions
-  *
-@verbatim
-  ==============================================================================
-              ##### Initialization and Configuration functions #####
-  ==============================================================================
-  [..]
-  This subsection provides a set of functions allowing to initialize the USARTx
-  associated to the SmartCard.
-  [..]
-  The Smartcard interface is designed to support asynchronous protocol Smartcards as
-  defined in the ISO 7816-3 standard.
-  [..]
-  The USART can provide a clock to the smartcard through the SCLK output.
-  In smartcard mode, SCLK is not associated to the communication but is simply derived
-  from the internal peripheral input clock through a 5-bit prescaler.
-  [..]
-  (+) These parameters can be configured:
-      (++) Baud Rate
-      (++) Parity: should be enabled
-      (++) Receiver/transmitter modes
-      (++) Synchronous mode (and if enabled, phase, polarity and last bit parameters)
-      (++) Prescaler value
-      (++) Guard bit time
-      (++) NACK enabling or disabling on transmission error
-
-  (+) The following advanced features can be configured as well:
-      (++) TX and/or RX pin level inversion
-      (++) data logical level inversion
-      (++) RX and TX pins swap
-      (++) RX overrun detection disabling
-      (++) DMA disabling on RX error
-      (++) MSB first on communication line
-      (++) Time out enabling (and if activated, timeout value)
-      (++) Block length
-      (++) Auto-retry counter
-  [..]
-  The HAL_SMARTCARD_Init() API follows the USART synchronous configuration procedures
-  (details for the procedures are available in reference manual).
-
-@endverbatim
-  * @{
-  */
-
-/*
-  Additional Table:
-    Frame Length is fixed to 8 bits plus parity:
-    SMARTCARD frame format is given in the following table
-    +---------------------------------------------------------------+
-    | M1M0 bits |  PCE bit  |          SMARTCARD frame              |
-    |-----------------------|---------------------------------------|
-    |     01    |    1      |    | SB | 8 bit data | PB | STB |     |
-    +---------------------------------------------------------------+
-
-*/
-
-/**
-  * @brief  Initialize the SMARTCARD mode according to the specified
-  *         parameters in the SMARTCARD_HandleTypeDef and initialize the associated handle.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check the SMARTCARD handle allocation */
-  if(hsmartcard == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART associated to the SMARTCARD handle */
-  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
-
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hsmartcard->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_SMARTCARD_MspInit(hsmartcard);
-  }
-
-  hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-  /* Disable the Peripheral to set smartcard mode */
-  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-  /* In SmartCard mode, the following bits must be kept cleared:
-  - LINEN in the USART_CR2 register,
-  - HDSEL and IREN  bits in the USART_CR3 register.*/
-  CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_LINEN);
-  CLEAR_BIT(hsmartcard->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN));
-
-  /* set the USART in SMARTCARD mode */
-  SET_BIT(hsmartcard->Instance->CR3, USART_CR3_SCEN);
-
-  /* Set the SMARTCARD Communication parameters */
-  if (SMARTCARD_SetConfig(hsmartcard) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  if (hsmartcard->AdvancedInit.AdvFeatureInit != SMARTCARD_ADVFEATURE_NO_INIT)
-  {
-    SMARTCARD_AdvFeatureConfig(hsmartcard);
-  }
-
-  /* Enable the Peripheral */
-  SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-  /* TEACK and/or REACK to check before moving hsmartcard->gState and hsmartcard->RxState to Ready */
-  return (SMARTCARD_CheckIdleState(hsmartcard));
-}
-
-/**
-  * @brief  DeInitialize the SMARTCARD peripheral.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check the SMARTCARD handle allocation */
-  if(hsmartcard == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the USART/UART associated to the SMARTCARD handle */
-  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
-
-  hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-  WRITE_REG(hsmartcard->Instance->CR1, 0x0U);
-  WRITE_REG(hsmartcard->Instance->CR2, 0x0U);
-  WRITE_REG(hsmartcard->Instance->CR3, 0x0U);
-  WRITE_REG(hsmartcard->Instance->RTOR, 0x0U);
-  WRITE_REG(hsmartcard->Instance->GTPR, 0x0U);
-
-  /* DeInit the low level hardware */
-  HAL_SMARTCARD_MspDeInit(hsmartcard);
-
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-  hsmartcard->gState    = HAL_SMARTCARD_STATE_RESET;
-  hsmartcard->RxState   = HAL_SMARTCARD_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(hsmartcard);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initialize the SMARTCARD MSP.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitialize the SMARTCARD MSP.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Exported_Functions_Group2 IO operation functions
-  * @brief    SMARTCARD Transmit and Receive functions
-  *
-@verbatim
-  ==============================================================================
-                         ##### IO operation functions #####
-  ==============================================================================
-  [..]
-    This subsection provides a set of functions allowing to manage the SMARTCARD data transfers.
-
-  [..]
-    Smartcard is a single wire half duplex communication protocol.
-    The Smartcard interface is designed to support asynchronous protocol Smartcards as
-    defined in the ISO 7816-3 standard. The USART should be configured as:
-    (+) 8 bits plus parity: where M=1 and PCE=1 in the USART_CR1 register
-    (+) 1.5 stop bits when transmitting and receiving: where STOP=11 in the USART_CR2 register.
-
-  [..]
-    (#) There are two modes of transfer:
-        (++) Blocking mode: The communication is performed in polling mode.
-             The HAL status of all data processing is returned by the same function
-             after finishing transfer.
-        (++) Non-Blocking mode: The communication is performed using Interrupts
-             or DMA, the relevant API's return the HAL status.
-             The end of the data processing will be indicated through the
-             dedicated SMARTCARD IRQ when using Interrupt mode or the DMA IRQ when
-             using DMA mode.
-        (++) The HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback() user callbacks
-             will be executed respectively at the end of the Transmit or Receive process
-             The HAL_SMARTCARD_ErrorCallback() user callback will be executed when a communication
-             error is detected.
-
-    (#) Blocking mode APIs are :
-        (++) HAL_SMARTCARD_Transmit()
-        (++) HAL_SMARTCARD_Receive()
-
-    (#) Non Blocking mode APIs with Interrupt are :
-        (++) HAL_SMARTCARD_Transmit_IT()
-        (++) HAL_SMARTCARD_Receive_IT()
-        (++) HAL_SMARTCARD_IRQHandler()
-
-    (#) Non Blocking mode functions with DMA are :
-        (++) HAL_SMARTCARD_Transmit_DMA()
-        (++) HAL_SMARTCARD_Receive_DMA()
-
-    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
-        (++) HAL_SMARTCARD_TxCpltCallback()
-        (++) HAL_SMARTCARD_RxCpltCallback()
-        (++) HAL_SMARTCARD_ErrorCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (++) HAL_SMARTCARD_Abort()
-        (++) HAL_SMARTCARD_AbortTransmit()
-        (++) HAL_SMARTCARD_AbortReceive()
-        (++) HAL_SMARTCARD_Abort_IT()
-        (++) HAL_SMARTCARD_AbortTransmit_IT()
-        (++) HAL_SMARTCARD_AbortReceive_IT()
-
-    (#) For Abort services based on interrupts (HAL_SMARTCARD_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
-        (++) HAL_SMARTCARD_AbortCpltCallback()
-        (++) HAL_SMARTCARD_AbortTransmitCpltCallback()
-        (++) HAL_SMARTCARD_AbortReceiveCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-        (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-             to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-             Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-             and HAL_SMARTCARD_ErrorCallback() user callback is executed. Transfer is kept ongoing on SMARTCARD side.
-             If user wants to abort it, Abort services should be called by user.
-        (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-             This concerns Frame Error in Interrupt mode tranmission, Overrun Error in Interrupt mode reception and all errors in DMA mode.
-             Error code is set to allow user to identify error type, and HAL_SMARTCARD_ErrorCallback() user callback is executed.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Send an amount of data in blocking mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @param  Timeout  Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check that a Tx process is not already ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    /* Disable the Peripheral first to update mode for TX master */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Disable Rx, enable Tx */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
-    
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->TxXferSize = Size;
-    hsmartcard->TxXferCount = Size;
-
-    while(hsmartcard->TxXferCount > 0U)
-    {
-      hsmartcard->TxXferCount--;
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      hsmartcard->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-    }
-    if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-    /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */
-    if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX)
-    {
-      /* Disable the Peripheral first to update modes */
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-      SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-      /* Enable the Peripheral */
-      SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-    }
-    
-    /* At end of Tx process, restore hsmartcard->gState to Ready */
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in blocking mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @param  Timeout Timeout duration.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  /* Check that a Rx process is not already ongoing */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    hsmartcard->RxXferSize = Size;
-    hsmartcard->RxXferCount = Size;
-
-    /* Check the remain data to be received */
-    while(hsmartcard->RxXferCount > 0U)
-    {
-      hsmartcard->RxXferCount--;
-
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      *pData++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0x00FFU);
-    }
-
-    /* At end of Rx process, restore hsmartcard->RxState to Ready */
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
-
-    hsmartcard->pTxBuffPtr = pData;
-    hsmartcard->TxXferSize = Size;
-    hsmartcard->TxXferCount = Size;
-
-    /* Disable the Peripheral first to update mode for TX master */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Disable Rx, enable Tx */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
-    
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the SMARTCARD Error Interrupt: (Frame error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the SMARTCARD Transmit Data Register Empty Interrupt */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
-
-    hsmartcard->pRxBuffPtr = pData;
-    hsmartcard->RxXferSize = Size;
-    hsmartcard->RxXferCount = Size;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the SMARTCARD Parity Error and Data Register not empty Interrupts */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE| USART_CR1_RXNEIE);
-
-    /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in DMA mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->pTxBuffPtr = pData;
-    hsmartcard->TxXferSize = Size;
-    hsmartcard->TxXferCount = Size;
-
-    /* Disable the Peripheral first to update mode for TX master */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Disable Rx, enable Tx */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
-    
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-
-    /* Set the SMARTCARD DMA transfer complete callback */
-    hsmartcard->hdmatx->XferCpltCallback = SMARTCARD_DMATransmitCplt;
-
-    /* Set the SMARTCARD error callback */
-    hsmartcard->hdmatx->XferErrorCallback = SMARTCARD_DMAError;
-
-    /* Set the DMA abort callback */
-    hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the SMARTCARD transmit DMA channel */
-    HAL_DMA_Start_IT(hsmartcard->hdmatx, (uint32_t)hsmartcard->pTxBuffPtr, (uint32_t)&hsmartcard->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    CLEAR_BIT(hsmartcard->Instance->ICR, USART_ICR_TCCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the UART Error Interrupt: (Frame error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the SMARTCARD associated USART CR3 register */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in DMA mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  pData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @note   The SMARTCARD-associated USART parity is enabled (PCE = 1),
-  *         the received data contain the parity bit (MSB position).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
-
-    hsmartcard->pRxBuffPtr = pData;
-    hsmartcard->RxXferSize = Size;
-
-    /* Set the SMARTCARD DMA transfer complete callback */
-    hsmartcard->hdmarx->XferCpltCallback = SMARTCARD_DMAReceiveCplt;
-
-    /* Set the SMARTCARD DMA error callback */
-    hsmartcard->hdmarx->XferErrorCallback = SMARTCARD_DMAError;
-
-    /* Set the DMA abort callback */
-    hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(hsmartcard->hdmarx, (uint32_t)&hsmartcard->Instance->RDR, (uint32_t)hsmartcard->pRxBuffPtr, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    /* Enable the UART Parity Error Interrupt */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the SMARTCARD associated USART CR3 register */
-    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RTOIE, EOBIE, TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmatx);
-    }
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  hsmartcard->TxXferCount = 0U; 
-  hsmartcard->RxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (blocking mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Check if a receive process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmatx);
-    }
-  }
-
-  /* Reset Tx transfer counter */
-  hsmartcard->TxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-  /* Restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (blocking mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RTOIE, EOBIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-
-  /* Check if a Transmit process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(hsmartcard->hdmarx);
-    }
-  }
-
-  /* Reset Rx transfer counter */
-  hsmartcard->RxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_Abort_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t abortcplt = 1U;
-  
-  /* Disable RTOIE, EOBIE, TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to SMARTCARD Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(hsmartcard->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if SMARTCARD DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-    {
-      hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMATxAbortCallback;
-    }
-    else
-    {
-      hsmartcard->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(hsmartcard->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if SMARTCARD DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-    {
-      hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMARxAbortCallback;
-    }
-    else
-    {
-      hsmartcard->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at UART level */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* SMARTCARD Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
-      {
-        hsmartcard->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* SMARTCARD Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
-      {
-        hsmartcard->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1U;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1U)
-  {
-    /* Reset Tx and Rx transfer counters */
-    hsmartcard->TxXferCount = 0U; 
-    hsmartcard->RxXferCount = 0U;
-
-    /* Reset errorCode */
-    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-    /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-    hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Check if a receive process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the SMARTCARD DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmatx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-      hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMATxOnlyAbortCallback;
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
-      {
-        /* Call Directly hsmartcard->hdmatx->XferAbortCallback function in case of error */
-        hsmartcard->hdmatx->XferAbortCallback(hsmartcard->hdmatx);
-      }
-    }
-    else
-    {
-      /* Reset Tx transfer counter */
-      hsmartcard->TxXferCount = 0U; 
-
-      /* Restore hsmartcard->gState to Ready */
-      hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
-    }
-  }
-  else
-  {
-    /* Reset Tx transfer counter */
-    hsmartcard->TxXferCount = 0U; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-    /* Restore hsmartcard->gState to Ready */
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (Interrupt mode).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable SMARTCARD Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RTOIE, EOBIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
-
-  /* Check if a Transmit process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Disable the SMARTCARD DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the SMARTCARD DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(hsmartcard->hdmarx != NULL)
-    {
-      /* Set the SMARTCARD DMA Abort callback : 
-         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
-      hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMARxOnlyAbortCallback;
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
-      {
-        /* Call Directly hsmartcard->hdmarx->XferAbortCallback function in case of error */
-        hsmartcard->hdmarx->XferAbortCallback(hsmartcard->hdmarx);
-      }
-    }
-    else
-    {
-      /* Reset Rx transfer counter */
-      hsmartcard->RxXferCount = 0U; 
-
-      /* Clear the Error flags in the ICR register */
-      __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-      /* Restore hsmartcard->RxState to Ready */
-      hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
-    }
-  }
-  else
-  {
-    /* Reset Rx transfer counter */
-    hsmartcard->RxXferCount = 0U; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-    /* Restore hsmartcard->RxState to Ready */
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Handle SMARTCARD interrupt requests.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t isrflags   = READ_REG(hsmartcard->Instance->ISR);
-  uint32_t cr1its     = READ_REG(hsmartcard->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
-  if (errorflags == RESET)
-  {
-    /* SMARTCARD in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      SMARTCARD_Receive_IT(hsmartcard);
-      /* Clear RXNE interrupt flag done by reading RDR in SMARTCARD_Receive_IT() */
-      return;
-    }
-  }  
-
-  /* If some errors occur */
-  cr3its = READ_REG(hsmartcard->Instance->CR3);
-  if(   (errorflags != RESET) 
-     && (    ((cr3its & USART_CR3_EIE) != RESET)
-          || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != RESET)) )
-  {
-    /* SMARTCARD parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_PEF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_PE;
-    }
-
-    /* SMARTCARD frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_FE;
-    }
-
-    /* SMARTCARD noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_NEF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_NE;
-    }
-
-    /* SMARTCARD Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_OREF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_ORE;
-    }
-
-    /* SMARTCARD receiver timeout interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_RTOF) != RESET) && ((cr1its & USART_CR1_RTOIE) != RESET))
-    {
-      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_RTOF);
-
-      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_RTO;
-    }
-
-    /* Call SMARTCARD Error Call back function if need be --------------------------*/
-    if(hsmartcard->ErrorCode != HAL_SMARTCARD_ERROR_NONE)
-    {
-      /* SMARTCARD in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        SMARTCARD_Receive_IT(hsmartcard);
-      }
-
-      /* If Error is to be considered as blocking :
-          - Receiver Timeout error in Reception
-          - Overrun error in Reception
-          - any error occurs in DMA mode reception
-      */
-      if (   ((hsmartcard->ErrorCode & (HAL_SMARTCARD_ERROR_RTO | HAL_SMARTCARD_ERROR_ORE)) != RESET)
-          || (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the SMARTCARD state ready to be able to start again the process,
-           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        SMARTCARD_EndRxTransfer(hsmartcard);
-
-        /* Disable the SMARTCARD DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-          /* Abort the SMARTCARD DMA Rx channel */
-          if(hsmartcard->hdmarx != NULL)
-          {
-            /* Set the SMARTCARD DMA Abort callback : 
-               will lead to call HAL_SMARTCARD_ErrorCallback() at end of DMA abort procedure */
-            hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
-            {
-              /* Call Directly hsmartcard->hdmarx->XferAbortCallback function in case of error */
-              hsmartcard->hdmarx->XferAbortCallback(hsmartcard->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_SMARTCARD_ErrorCallback(hsmartcard);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_SMARTCARD_ErrorCallback(hsmartcard);
-        }
-      }
-      /* other error type to be considered as blocking :
-          - Frame error in Transmission
-      */
-      else if ((hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX) && ((hsmartcard->ErrorCode & HAL_SMARTCARD_ERROR_FE) != RESET))
-      {
-        /* Blocking error : transfer is aborted
-           Set the SMARTCARD state ready to be able to start again the process,
-           Disable Tx Interrupts, and disable Tx DMA request, if ongoing */
-        SMARTCARD_EndTxTransfer(hsmartcard);
-
-        /* Disable the SMARTCARD DMA Tx request if enabled */
-        if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
-        {
-          CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-          /* Abort the SMARTCARD DMA Tx channel */
-          if(hsmartcard->hdmatx != NULL)
-          {
-            /* Set the SMARTCARD DMA Abort callback : 
-               will lead to call HAL_SMARTCARD_ErrorCallback() at end of DMA abort procedure */
-            hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMAAbortOnError;
-
-            /* Abort DMA TX */
-            if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
-            {
-              /* Call Directly hsmartcard->hdmatx->XferAbortCallback function in case of error */
-              hsmartcard->hdmatx->XferAbortCallback(hsmartcard->hdmatx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_SMARTCARD_ErrorCallback(hsmartcard);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_SMARTCARD_ErrorCallback(hsmartcard);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_SMARTCARD_ErrorCallback(hsmartcard);
-        hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-  /* SMARTCARD in mode Receiver, end of block interruption ------------------------*/
-  if(((isrflags & USART_ISR_EOBF) != RESET) && ((cr1its & USART_CR1_EOBIE) != RESET))
-  {
-    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-    __HAL_UNLOCK(hsmartcard);
-    HAL_SMARTCARD_RxCpltCallback(hsmartcard);
-    /* Clear EOBF interrupt after HAL_SMARTCARD_RxCpltCallback() call for the End of Block information
-     * to be available during HAL_SMARTCARD_RxCpltCallback() processing */
-    __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_EOBF);
-    return;
-  }
-
-  /* SMARTCARD in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    SMARTCARD_Transmit_IT(hsmartcard);
-    return;
-  }
-
-  /* SMARTCARD in mode Transmitter (transmission end) ------------------------*/
-  if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_TC) != RESET) &&(__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_TC) != RESET))
-  {
-    SMARTCARD_EndTransmit_IT(hsmartcard);
-    return;
-  }
-}
-
-/**
-  * @brief  Tx Transfer completed callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Transfer completed callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD error callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD Abort Complete callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_AbortCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD Abort Complete callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_AbortTransmitCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_AbortTransmitCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  SMARTCARD Abort Receive Complete callback.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_AbortReceiveCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmartcard);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_AbortReceiveCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Exported_Functions_Group3 Peripheral State and Errors functions
-  *  @brief   SMARTCARD State and Errors functions
-  *
-@verbatim
-  ==============================================================================
-                  ##### Peripheral State and Errors functions #####
-  ==============================================================================
-  [..]
-    This subsection provides a set of functions allowing to return the State of SmartCard
-    handle and also return Peripheral Errors occurred during communication process
-     (+) HAL_SMARTCARD_GetState() API can be helpful to check in run-time the state
-         of the SMARTCARD peripheral.
-     (+) HAL_SMARTCARD_GetError() checks in run-time errors that could occur during
-         communication.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the SMARTCARD handle state.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval SMARTCARD handle state
-  */
-HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Return SMARTCARD handle state */
-  uint32_t temp1= 0x00U, temp2 = 0x00U;
-  temp1 = hsmartcard->gState;
-  temp2 = hsmartcard->RxState;
-
-  return (HAL_SMARTCARD_StateTypeDef)(temp1 | temp2);
-}
-
-/**
-  * @brief  Return the SMARTCARD handle error code.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval SMARTCARD handle Error Code
-*/
-uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  return hsmartcard->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup SMARTCARD_Private_Functions SMARTCARD Private Functions
-  * @{
-  */
-
-/**
-  * @brief Configure the SMARTCARD associated USART peripheral.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t tmpreg                          = 0x00000000U;
-  SMARTCARD_ClockSourceTypeDef clocksource = SMARTCARD_CLOCKSOURCE_UNDEFINED;
-  HAL_StatusTypeDef ret                    = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
-  assert_param(IS_SMARTCARD_BAUDRATE(hsmartcard->Init.BaudRate));
-  assert_param(IS_SMARTCARD_WORD_LENGTH(hsmartcard->Init.WordLength));
-  assert_param(IS_SMARTCARD_STOPBITS(hsmartcard->Init.StopBits));
-  assert_param(IS_SMARTCARD_PARITY(hsmartcard->Init.Parity));
-  assert_param(IS_SMARTCARD_MODE(hsmartcard->Init.Mode));
-  assert_param(IS_SMARTCARD_POLARITY(hsmartcard->Init.CLKPolarity));
-  assert_param(IS_SMARTCARD_PHASE(hsmartcard->Init.CLKPhase));
-  assert_param(IS_SMARTCARD_LASTBIT(hsmartcard->Init.CLKLastBit));
-  assert_param(IS_SMARTCARD_ONE_BIT_SAMPLE(hsmartcard->Init.OneBitSampling));
-  assert_param(IS_SMARTCARD_NACK(hsmartcard->Init.NACKEnable));
-  assert_param(IS_SMARTCARD_TIMEOUT(hsmartcard->Init.TimeOutEnable));
-  assert_param(IS_SMARTCARD_AUTORETRY_COUNT(hsmartcard->Init.AutoRetryCount));
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-  /* In SmartCard mode, M and PCE are forced to 1 (8 bits + parity).
-   * Oversampling is forced to 16 (OVER8 = 0).
-   * Configure the Parity and Mode:
-   *  set PS bit according to hsmartcard->Init.Parity value
-   *  set TE and RE bits according to hsmartcard->Init.Mode value */
-  tmpreg = (uint32_t) hsmartcard->Init.Parity | hsmartcard->Init.Mode;
-  tmpreg |= (uint32_t) hsmartcard->Init.WordLength;
-  MODIFY_REG(hsmartcard->Instance->CR1, USART_CR1_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR2 Configuration -----------------------*/
-  tmpreg = hsmartcard->Init.StopBits;
-  /* Synchronous mode is activated by default */
-  tmpreg |= (uint32_t) USART_CR2_CLKEN | hsmartcard->Init.CLKPolarity;
-  tmpreg |= (uint32_t) hsmartcard->Init.CLKPhase | hsmartcard->Init.CLKLastBit;
-  tmpreg |= (uint32_t) hsmartcard->Init.TimeOutEnable;
-  MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  /* Configure
-   * - one-bit sampling method versus three samples' majority rule
-   *   according to hsmartcard->Init.OneBitSampling
-   * - NACK transmission in case of parity error according
-   *   to hsmartcard->Init.NACKEnable
-   * - autoretry counter according to hsmartcard->Init.AutoRetryCount     */
-  tmpreg =  (uint32_t) hsmartcard->Init.OneBitSampling | hsmartcard->Init.NACKEnable;
-  tmpreg |= ((uint32_t)hsmartcard->Init.AutoRetryCount << SMARTCARD_CR3_SCARCNT_LSB_POS);
-  MODIFY_REG(hsmartcard->Instance-> CR3,USART_CR3_FIELDS, tmpreg);
-
-  /*-------------------------- USART GTPR Configuration ----------------------*/
-  tmpreg = (hsmartcard->Init.Prescaler | ((uint32_t)hsmartcard->Init.GuardTime << SMARTCARD_GTPR_GT_LSB_POS));
-  MODIFY_REG(hsmartcard->Instance->GTPR, (USART_GTPR_GT|USART_GTPR_PSC), tmpreg);
-
-  /*-------------------------- USART RTOR Configuration ----------------------*/
-  tmpreg =   ((uint32_t)hsmartcard->Init.BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS);
-  if (hsmartcard->Init.TimeOutEnable == SMARTCARD_TIMEOUT_ENABLE)
-  {
-    assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue));
-    tmpreg |=  (uint32_t) hsmartcard->Init.TimeOutValue;
-  }
-  MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO|USART_RTOR_BLEN), tmpreg);
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource);
-  switch (clocksource)
-  {
-    case SMARTCARD_CLOCKSOURCE_PCLK1:
-      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_HSI:
-      hsmartcard->Instance->BRR = (uint16_t)((HSI_VALUE + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_SYSCLK:
-      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_LSE:
-      hsmartcard->Instance->BRR = (uint16_t)((LSE_VALUE + (hsmartcard->Init.BaudRate/2U)) / hsmartcard->Init.BaudRate);
-      break;
-    case SMARTCARD_CLOCKSOURCE_UNDEFINED:
-    default:
-      ret = HAL_ERROR;
-      break;
-  }
-
-  return ret;
-}
-
-
-/**
-  * @brief Configure the SMARTCARD associated USART peripheral advanced features.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check whether the set of advanced features to configure is properly set */
-  assert_param(IS_SMARTCARD_ADVFEATURE_INIT(hsmartcard->AdvancedInit.AdvFeatureInit));
-
-  /* if required, configure TX pin active level inversion */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_TXINV(hsmartcard->AdvancedInit.TxPinLevelInvert));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_TXINV, hsmartcard->AdvancedInit.TxPinLevelInvert);
-  }
-
-  /* if required, configure RX pin active level inversion */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_RXINV(hsmartcard->AdvancedInit.RxPinLevelInvert));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_RXINV, hsmartcard->AdvancedInit.RxPinLevelInvert);
-  }
-
-  /* if required, configure data inversion */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DATAINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_DATAINV(hsmartcard->AdvancedInit.DataInvert));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_DATAINV, hsmartcard->AdvancedInit.DataInvert);
-  }
-
-  /* if required, configure RX/TX pins swap */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_SWAP_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_SWAP(hsmartcard->AdvancedInit.Swap));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_SWAP, hsmartcard->AdvancedInit.Swap);
-  }
-
-  /* if required, configure RX overrun detection disabling */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT))
-  {
-    assert_param(IS_SMARTCARD_OVERRUN(hsmartcard->AdvancedInit.OverrunDisable));
-    MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_OVRDIS, hsmartcard->AdvancedInit.OverrunDisable);
-  }
-
-  /* if required, configure DMA disabling on reception error */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_DMAONRXERROR(hsmartcard->AdvancedInit.DMADisableonRxError));
-    MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_DDRE, hsmartcard->AdvancedInit.DMADisableonRxError);
-  }
-
-  /* if required, configure MSB first on communication line */
-  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_MSBFIRST_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_MSBFIRST(hsmartcard->AdvancedInit.MSBFirst));
-    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_MSBFIRST, hsmartcard->AdvancedInit.MSBFirst);
-  }
-
-}
-
-/**
-  * @brief Check the SMARTCARD Idle State.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  uint32_t tickstart = 0U;
-
-  /* Initialize the SMARTCARD ErrorCode */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
-     Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature. 
-  */
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-  if (IS_UART_WAKEUP_FROMSTOP_INSTANCE(hsmartcard->Instance))
-  {
-    /* Check if the Transmitter is enabled */
-    if((hsmartcard->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-    {
-      /* Wait until TEACK flag is set */
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_TEACK, RESET, tickstart, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Check if the Receiver is enabled */
-    if((hsmartcard->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-    {
-      /* Wait until REACK flag is set */
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_REACK, RESET, tickstart, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-  /* Initialize the SMARTCARD states */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hsmartcard);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle SMARTCARD Communication Timeout.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param  Flag Specifies the SMARTCARD flag to check.
-  * @param  Status The new Flag status (SET or RESET).
-  * @param  Tickstart Tick start value
-  * @param  Timeout Timeout duration.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_SMARTCARD_GET_FLAG(hsmartcard, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-        hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-        hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hsmartcard);
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  End ongoing Tx transfer on SMARTCARD peripheral (following error detection or Transmit completion).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *               the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable TXEIE, TCIE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Tx process, restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-}
-
-
-/**
-  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *               the configuration information for the specified SMARTCARD module.
-  * @retval None
-  */
-static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Rx process, restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-}
-
-
-/**
-  * @brief  DMA SMARTCARD transmit process complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-  hsmartcard->TxXferCount = 0U;
-
-  /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-  in the SMARTCARD associated USART CR3 register */
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
-
-  /* Enable the SMARTCARD Transmit Complete Interrupt */
-  __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_TC);
-}
-
-/**
-  * @brief  DMA SMARTCARD receive process complete callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-  hsmartcard->RxXferCount = 0U;
-
-  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
-     in the SMARTCARD associated USART CR3 register */
-  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
-
-  /* At end of Rx process, restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  HAL_SMARTCARD_RxCpltCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD communication error callback.
-  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
-  *              the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-
-  /* Stop SMARTCARD DMA Tx request if ongoing */
-  if (  (hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX)
-      &&(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT)) )
-  {
-    hsmartcard->TxXferCount = 0U;
-    SMARTCARD_EndTxTransfer(hsmartcard);
-  }
-
-  /* Stop SMARTCARD DMA Rx request if ongoing */
-  if (  (hsmartcard->RxState == HAL_SMARTCARD_STATE_BUSY_RX)
-      &&(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR)) )
-  {
-    hsmartcard->RxXferCount = 0U;
-    SMARTCARD_EndRxTransfer(hsmartcard);
-  }
-
-  hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_DMA;
-  HAL_SMARTCARD_ErrorCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-  hsmartcard->RxXferCount = 0U;
-  hsmartcard->TxXferCount = 0U;
-
-  HAL_SMARTCARD_ErrorCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef* )(hdma->Parent);
-  
-  hsmartcard->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hsmartcard->hdmarx != NULL)
-  {
-    if(hsmartcard->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hsmartcard->TxXferCount = 0U;
-  hsmartcard->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
-}
-
-
-/**
-  * @brief  DMA SMARTCARD Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef* )(hdma->Parent);
-  
-  hsmartcard->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(hsmartcard->hdmatx != NULL)
-  {
-    if(hsmartcard->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  hsmartcard->TxXferCount = 0U;
-  hsmartcard->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
-  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
-}
-
-
-/**
-  * @brief  DMA SMARTCARD Tx communication abort callback, when initiated by user by a call to
-  *         HAL_SMARTCARD_AbortTransmit_IT API (Abort only Tx transfer)
-  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
-  *         and leads to user Tx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
-
-  hsmartcard->TxXferCount = 0U;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
-
-  /* Restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
-}
-
-/**
-  * @brief  DMA SMARTCARD Rx communication abort callback, when initiated by user by a call to
-  *         HAL_SMARTCARD_AbortReceive_IT API (Abort only Rx transfer)
-  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
-  *         and leads to user Rx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsmartcard = ( SMARTCARD_HandleTypeDef* )(hdma->Parent);
-
-  hsmartcard->RxXferCount = 0U;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
-
-  /* Restore hsmartcard->RxState to Ready */
-  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
-}
-
-/**
-  * @brief Send an amount of data in non-blocking mode.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMARTCARD module.
-  *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_SMARTCARD_Transmit_IT()
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check that a Tx process is ongoing */
-  if (hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX)
-  {
-    if(hsmartcard->TxXferCount == 0U)
-    {
-      /* Disable the SMARTCARD Transmit Data Register Empty Interrupt */
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_TXEIE);
-
-      /* Enable the SMARTCARD Transmit Complete Interrupt */
-      __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_TC);
-
-      return HAL_OK;
-    }
-    else
-    {
-      hsmartcard->Instance->TDR = (*hsmartcard->pTxBuffPtr++ & (uint8_t)0xFFU);
-      hsmartcard->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Wrap up transmission in non-blocking mode.
-  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Disable the SMARTCARD Transmit Complete Interrupt */
-  __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_TC);
-
-  /* Check if a receive process is ongoing or not. If not disable ERR IT */
-  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
-    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-  }
-
-  /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */
-  if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX)
-  {
-    /* Disable the Peripheral first to update modes */
-    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
-    /* Enable the Peripheral */
-    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
-  }
-  
-  /* Tx process is ended, restore hsmartcard->gState to Ready */
-  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-  HAL_SMARTCARD_TxCpltCallback(hsmartcard);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Receive an amount of data in non-blocking mode.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMARTCARD module.
-  *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_SMARTCARD_Receive_IT().
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-  /* Check that a Rx process is ongoing */
-  if (hsmartcard->RxState == HAL_SMARTCARD_STATE_BUSY_RX)
-  {
-    *hsmartcard->pRxBuffPtr++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0xFFU);
-
-    if(--hsmartcard->RxXferCount == 0U)
-    {
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RXNEIE);
-
-      /* Check if a transmit process is ongoing or not. If not disable ERR IT */
-      if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-      {
-        /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-        CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
-      }
-
-      /* Disable the SMARTCARD Parity Error Interrupt */
-      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
-
-      hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
-
-      HAL_SMARTCARD_RxCpltCallback(hsmartcard);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_SMARTCARD_SEND_REQ(hsmartcard, SMARTCARD_RXDATA_FLUSH_REQUEST);
-
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_smartcard_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_smartcard_ex.c
deleted file mode 100644
index 3f764d30..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_smartcard_ex.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_smartcard_ex.c
-  * @author  MCD Application Team
-  * @brief   SMARTCARD HAL module driver.
-  *          This file provides extended firmware functions to manage the following
-  *          functionalities of the SmartCard.
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions
-  *
-  *
-  @verbatim
-  =============================================================================
-               ##### SMARTCARD peripheral extended features  #####
-  =============================================================================
-  [..]
-  The Extended SMARTCARD HAL driver can be used as follows:
-
-    (#) After having configured the SMARTCARD basic features with HAL_SMARTCARD_Init(),
-        then program SMARTCARD advanced features if required (TX/RX pins swap, TimeOut,
-        auto-retry counter,...) in the hsmartcard AdvancedInit structure.
-
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SMARTCARDEx SMARTCARDEx
-  * @brief SMARTCARD Extended HAL module driver
-  * @{
-  */
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup SMARTCARDEx_Exported_Functions  SMARTCARD Extended Exported Functions
-  * @{
-  */
-
-/** @defgroup SMARTCARDEx_Exported_Functions_Group1 Extended Peripheral Control functions
-  * @brief    Extended control functions
-  *
-@verbatim
-  ===============================================================================
-                      ##### Peripheral Control functions #####
-  ===============================================================================
-  [..]
-  This subsection provides a set of functions allowing to initialize the SMARTCARD.
-     (+) HAL_SMARTCARDEx_BlockLength_Config() API allows to configure the Block Length on the fly
-     (+) HAL_SMARTCARDEx_TimeOut_Config() API allows to configure the receiver timeout value on the fly
-     (+) HAL_SMARTCARDEx_EnableReceiverTimeOut() API enables the receiver timeout feature
-     (+) HAL_SMARTCARDEx_DisableReceiverTimeOut() API disables the receiver timeout feature
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Update on the fly the SMARTCARD block length in RTOR register.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param BlockLength SMARTCARD block length (8-bit long at most)
-  * @retval None
-  */
-void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength)
-{
-  MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_BLEN, ((uint32_t)BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS));
-}
-
-/**
-  * @brief Update on the fly the receiver timeout value in RTOR register.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @param TimeOutValue receiver timeout value in number of baud blocks. The timeout
-  *                     value must be less or equal to 0x0FFFFFFFF.
-  * @retval None
-  */
-void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue)
-{
-  assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue));
-  MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_RTO, TimeOutValue);
-}
-
-/**
-  * @brief Enable the SMARTCARD receiver timeout feature.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-    /* Set the USART RTOEN bit */
-    SET_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Disable the SMARTCARD receiver timeout feature.
-  * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *                    the configuration information for the specified SMARTCARD module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard)
-{
-
-  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmartcard);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
-
-    /* Clear the USART RTOEN bit */
-    CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN);
-
-    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmartcard);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_smbus.c b/lib/hal-stm32f0/source/stm32f0xx_hal_smbus.c
deleted file mode 100644
index c693b6e8..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_smbus.c
+++ /dev/null
@@ -1,2172 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_smbus.c
-  * @author  MCD Application Team
-  * @brief   SMBUS HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the System Management Bus (SMBus) peripheral,
-  *          based on I2C principles of operation :
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral State and Errors functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-    [..]
-    The SMBUS HAL driver can be used as follows:
-
-    (#) Declare a SMBUS_HandleTypeDef handle structure, for example:
-        SMBUS_HandleTypeDef  hsmbus;
-
-    (#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API:
-        (##) Enable the SMBUSx interface clock
-        (##) SMBUS pins configuration
-            (+++) Enable the clock for the SMBUS GPIOs
-            (+++) Configure SMBUS pins as alternate function open-drain
-        (##) NVIC configuration if you need to use interrupt process
-            (+++) Configure the SMBUSx interrupt priority
-            (+++) Enable the NVIC SMBUS IRQ Channel
-
-    (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing mode,
-        Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
-        Peripheral mode and Packet Error Check mode in the hsmbus Init structure.
-
-    (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API:
-        (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-             by calling the customized HAL_SMBUS_MspInit(&hsmbus) API.
-
-    (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady()
-
-    (#) For SMBUS IO operations, only one mode of operations is available within this driver
-
-    *** Interrupt mode IO operation ***
-    ===================================
-    [..]
-      (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Transmit_IT()
-      (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback()
-      (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Receive_IT()
-      (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback()
-      (+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT()
-      (++) The associated previous transfer callback is called at the end of abort process
-      (++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit
-      (++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive
-      (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode
-           using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT()
-      (++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and user can
-           add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
-      (++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_ListenCpltCallback()
-      (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Transmit_IT()
-      (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback()
-      (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Receive_IT()
-      (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback()
-      (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT()
-      (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
-           to check the Alert Error Code using function HAL_SMBUS_GetError()
-      (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError()
-      (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can
-           add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
-           to check the Error Code using function HAL_SMBUS_GetError()
-
-     *** SMBUS HAL driver macros list ***
-     ==================================
-     [..]
-       Below the list of most used macros in SMBUS HAL driver.
-
-      (+) __HAL_SMBUS_ENABLE:      Enable the SMBUS peripheral
-      (+) __HAL_SMBUS_DISABLE:     Disable the SMBUS peripheral
-      (+) __HAL_SMBUS_GET_FLAG:    Check whether the specified SMBUS flag is set or not
-      (+) __HAL_SMBUS_CLEAR_FLAG:  Clear the specified SMBUS pending flag
-      (+) __HAL_SMBUS_ENABLE_IT:   Enable the specified SMBUS interrupt
-      (+) __HAL_SMBUS_DISABLE_IT:  Disable the specified SMBUS interrupt
-
-     [..]
-       (@) You can refer to the SMBUS HAL driver header file for more useful macros
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SMBUS SMBUS
-  * @brief SMBUS HAL module driver
-  * @{
-  */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup SMBUS_Private_Define SMBUS Private Constants
-  * @{
-  */
-#define TIMING_CLEAR_MASK   (0xF0FFFFFFU)      /*!< SMBUS TIMING clear register Mask */
-#define HAL_TIMEOUT_ADDR    (10000U)           /*!< 10 s  */
-#define HAL_TIMEOUT_BUSY    (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_DIR     (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_RXNE    (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_STOPF   (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_TC      (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_TCR     (25U)              /*!< 25 ms */
-#define HAL_TIMEOUT_TXIS    (25U)              /*!< 25 ms */
-#define MAX_NBYTE_SIZE      255U
-/**
-  * @}
-  */
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
-  * @{
-  */
-static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
-
-static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
-static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
-static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus);
-static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus);
-
-static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus);
-
-static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus);
-
-static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions
-  * @{
-  */
-
-/** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and
-          deinitialize the SMBUSx peripheral:
-
-      (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
-          all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
-
-      (+) Call the function HAL_SMBUS_Init() to configure the selected device with
-          the selected configuration:
-        (++) Clock Timing
-        (++) Bus Timeout
-        (++) Analog Filer mode
-        (++) Own Address 1
-        (++) Addressing mode (Master, Slave)
-        (++) Dual Addressing mode
-        (++) Own Address 2
-        (++) Own Address 2 Mask
-        (++) General call mode
-        (++) Nostretch mode
-        (++) Packet Error Check mode
-        (++) Peripheral mode
-
-
-      (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
-          of the selected SMBUSx peripheral.
-
-      (+) Enable/Disable Analog/Digital filters with HAL_SMBUS_ConfigAnalogFilter() and
-          HAL_SMBUS_ConfigDigitalFilter().
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the SMBUS according to the specified parameters
-  *         in the SMBUS_InitTypeDef and initialize the associated handle.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Check the SMBUS handle allocation */
-  if (hsmbus == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter));
-  assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1));
-  assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode));
-  assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode));
-  assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2));
-  assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks));
-  assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode));
-  assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode));
-  assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode));
-  assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hsmbus->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC */
-    HAL_SMBUS_MspInit(hsmbus);
-  }
-
-  hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-  /* Disable the selected SMBUS peripheral */
-  __HAL_SMBUS_DISABLE(hsmbus);
-
-  /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
-  /* Configure SMBUSx: Frequency range */
-  hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK;
-
-  /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
-  /* Configure SMBUSx: Bus Timeout  */
-  hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN;
-  hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN;
-  hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout;
-
-  /*---------------------------- SMBUSx OAR1 Configuration -----------------------*/
-  /* Configure SMBUSx: Own Address1 and ack own address1 mode */
-  hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
-
-  if (hsmbus->Init.OwnAddress1 != 0U)
-  {
-    if (hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
-    {
-      hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1);
-    }
-    else /* SMBUS_ADDRESSINGMODE_10BIT */
-    {
-      hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1);
-    }
-  }
-
-  /*---------------------------- SMBUSx CR2 Configuration ------------------------*/
-  /* Configure SMBUSx: Addressing Master mode */
-  if (hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
-  {
-    hsmbus->Instance->CR2 = (I2C_CR2_ADD10);
-  }
-  /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
-  /* AUTOEND and NACK bit will be manage during Transfer process */
-  hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
-
-  /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
-  /* Configure SMBUSx: Dual mode and Own Address2 */
-  hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8U));
-
-  /*---------------------------- SMBUSx CR1 Configuration ------------------------*/
-  /* Configure SMBUSx: Generalcall and NoStretch mode */
-  hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
-
-  /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
-  if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE)
-      && ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)))
-  {
-    hsmbus->Instance->CR1 |= I2C_CR1_SBC;
-  }
-
-  /* Enable the selected SMBUS peripheral */
-  __HAL_SMBUS_ENABLE(hsmbus);
-
-  hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-  hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-  hsmbus->State = HAL_SMBUS_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitialize the SMBUS peripheral.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Check the SMBUS handle allocation */
-  if (hsmbus == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
-
-  hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-  /* Disable the SMBUS Peripheral Clock */
-  __HAL_SMBUS_DISABLE(hsmbus);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_SMBUS_MspDeInit(hsmbus);
-
-  hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-  hsmbus->PreviousState =  HAL_SMBUS_STATE_RESET;
-  hsmbus->State = HAL_SMBUS_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hsmbus);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the SMBUS MSP.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the SMBUS MSP.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Configure Analog noise filter.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  AnalogFilter This parameter can be one of the following values:
-  *         @arg @ref SMBUS_ANALOGFILTER_ENABLE
-  *         @arg @ref SMBUS_ANALOGFILTER_DISABLE
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_ANALOG_FILTER(AnalogFilter));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-    /* Disable the selected SMBUS peripheral */
-    __HAL_SMBUS_DISABLE(hsmbus);
-
-    /* Reset ANOFF bit */
-    hsmbus->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
-
-    /* Set analog filter bit*/
-    hsmbus->Instance->CR1 |= AnalogFilter;
-
-    __HAL_SMBUS_ENABLE(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Configure Digital noise filter.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_DIGITAL_FILTER(DigitalFilter));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
-    /* Disable the selected SMBUS peripheral */
-    __HAL_SMBUS_DISABLE(hsmbus);
-
-    /* Get the old register value */
-    tmpreg = hsmbus->Instance->CR1;
-
-    /* Reset I2C DNF bits [11:8] */
-    tmpreg &= ~(I2C_CR1_DNF);
-
-    /* Set I2Cx DNF coefficient */
-    tmpreg |= DigitalFilter << I2C_CR1_DNF_Pos;
-
-    /* Store the new register value */
-    hsmbus->Instance->CR1 = tmpreg;
-
-    __HAL_SMBUS_ENABLE(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
- *  @brief   Data transfers functions
- *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to manage the SMBUS data
-    transfers.
-
-    (#) Blocking mode function to check if device is ready for usage is :
-        (++) HAL_SMBUS_IsDeviceReady()
-
-    (#) There is only one mode of transfer:
-       (++) Non-Blocking mode : The communication is performed using Interrupts.
-            These functions return the status of the transfer startup.
-            The end of the data processing will be indicated through the
-            dedicated SMBUS IRQ when using Interrupt mode.
-
-    (#) Non-Blocking mode functions with Interrupt are :
-        (++) HAL_SMBUS_Master_Transmit_IT()
-        (++) HAL_SMBUS_Master_Receive_IT()
-        (++) HAL_SMBUS_Slave_Transmit_IT()
-        (++) HAL_SMBUS_Slave_Receive_IT()
-        (++) HAL_SMBUS_EnableListen_IT() or alias HAL_SMBUS_EnableListen_IT()
-        (++) HAL_SMBUS_DisableListen_IT()
-        (++) HAL_SMBUS_EnableAlert_IT()
-        (++) HAL_SMBUS_DisableAlert_IT()
-
-    (#) A set of Transfer Complete Callbacks are provided in non-Blocking mode:
-        (++) HAL_SMBUS_MasterTxCpltCallback()
-        (++) HAL_SMBUS_MasterRxCpltCallback()
-        (++) HAL_SMBUS_SlaveTxCpltCallback()
-        (++) HAL_SMBUS_SlaveRxCpltCallback()
-        (++) HAL_SMBUS_AddrCallback()
-        (++) HAL_SMBUS_ListenCpltCallback()
-        (++) HAL_SMBUS_ErrorCallback()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Transmit in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* In case of Quick command, remove autoend mode */
-    /* Manage the stop generation by software */
-    if (hsmbus->pBuffPtr == NULL)
-    {
-      hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
-    }
-
-    if (Size > MAX_NBYTE_SIZE)
-    {
-      hsmbus->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hsmbus->XferSize = Size;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
-    if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
-    {
-      SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
-    }
-    else
-    {
-      /* If transfer direction not change, do not generate Restart Condition */
-      /* Mean Previous state is same as current state */
-      if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(hsmbus->XferOptions) == 0))
-      {
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-      }
-      /* Else transfer direction change, so generate Restart with new transfer direction */
-      else
-      {
-        /* Convert OTHER_xxx XferOptions if any */
-        SMBUS_ConvertOtherXferOptions(hsmbus);
-
-        /* Handle Transfer */
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
-      }
-
-      /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
-      /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-      if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-      {
-        hsmbus->XferSize--;
-        hsmbus->XferCount--;
-      }
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* In case of Quick command, remove autoend mode */
-    /* Manage the stop generation by software */
-    if (hsmbus->pBuffPtr == NULL)
-    {
-      hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
-    }
-
-    if (Size > MAX_NBYTE_SIZE)
-    {
-      hsmbus->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hsmbus->XferSize = Size;
-    }
-
-    /* Send Slave Address */
-    /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
-    if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
-    {
-      SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, SMBUS_RELOAD_MODE  | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
-    }
-    else
-    {
-      /* If transfer direction not change, do not generate Restart Condition */
-      /* Mean Previous state is same as current state */
-      if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(hsmbus->XferOptions) == 0))
-      {
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-      }
-      /* Else transfer direction change, so generate Restart with new transfer direction */
-      else
-      {
-        /* Convert OTHER_xxx XferOptions if any */
-        SMBUS_ConvertOtherXferOptions(hsmbus);
-
-        /* Handle Transfer */
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
-      }
-    }
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Abort a master/host SMBUS process communication with Interrupt.
-  * @note   This abort can be called only if state is ready
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
-{
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    /* Keep the same state as previous */
-    /* to perform as well the call of the corresponding end of transfer callback */
-    if (hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
-    }
-    else if (hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
-    }
-    else
-    {
-      /* Wrong usage of abort function */
-      /* This function should be used only in case of abort monitored by master device */
-      return HAL_ERROR;
-    }
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
-    /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
-    SMBUS_TransferConfig(hsmbus, DevAddress, 1U, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
-    }
-    else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Transmit in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX);
-
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Set SBC bit to manage Acknowledge at each bit */
-    hsmbus->Instance->CR1 |= I2C_CR1_SBC;
-
-    /* Enable Address Acknowledge */
-    hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* Convert OTHER_xxx XferOptions if any */
-    SMBUS_ConvertOtherXferOptions(hsmbus);
-
-    if (Size > MAX_NBYTE_SIZE)
-    {
-      hsmbus->XferSize = MAX_NBYTE_SIZE;
-    }
-    else
-    {
-      hsmbus->XferSize = Size;
-    }
-
-    /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
-    if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
-    {
-      SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
-    }
-    else
-    {
-      /* Set NBYTE to transmit */
-      SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-
-      /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
-      /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-      if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-      {
-        hsmbus->XferSize--;
-        hsmbus->XferCount--;
-      }
-    }
-
-    /* Clear ADDR flag after prepare the transfer parameters */
-    /* This action will generate an acknowledge to the HOST */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    /* REnable ADDR interrupt */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Receive in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  pData Pointer to data buffer
-  * @param  Size Amount of data to be sent
-  * @param  XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
-  /* Check the parameters */
-  assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
-
-  if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-  {
-    if ((pData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
-    SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX);
-
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    /* Set SBC bit to manage Acknowledge at each bit */
-    hsmbus->Instance->CR1 |= I2C_CR1_SBC;
-
-    /* Enable Address Acknowledge */
-    hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
-
-    /* Prepare transfer parameters */
-    hsmbus->pBuffPtr = pData;
-    hsmbus->XferSize = Size;
-    hsmbus->XferCount = Size;
-    hsmbus->XferOptions = XferOptions;
-
-    /* Convert OTHER_xxx XferOptions if any */
-    SMBUS_ConvertOtherXferOptions(hsmbus);
-
-    /* Set NBYTE to receive */
-    /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
-    /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
-    /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
-    /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
-    if ((hsmbus->XferSize == 1U) || ((hsmbus->XferSize == 2U) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
-    {
-      SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-    }
-    else
-    {
-      SMBUS_TransferConfig(hsmbus, 0U, 1U, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
-    }
-
-    /* Clear ADDR flag after prepare the transfer parameters */
-    /* This action will generate an acknowledge to the HOST */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Note : The SMBUS interrupts must be enabled after unlocking current process
-              to avoid the risk of SMBUS interrupt handle execution before current
-              process unlock */
-    /* REnable ADDR interrupt */
-    SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Enable the Address listen mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  hsmbus->State = HAL_SMBUS_STATE_LISTEN;
-
-  /* Enable the Address Match interrupt */
-  SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Disable the Address listen mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Disable Address listen mode only if a transfer is not ongoing */
-  if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-  {
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Disable the Address Match interrupt */
-    SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Enable the SMBUS alert mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUSx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Enable SMBus alert */
-  hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
-
-  /* Clear ALERT flag */
-  __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
-
-  /* Enable Alert Interrupt */
-  SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Disable the SMBUS alert mode with Interrupt.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUSx peripheral.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Enable SMBus alert */
-  hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
-
-  /* Disable Alert Interrupt */
-  SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Check if target device is ready for communication.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  DevAddress Target device address: The device 7 bits address value
-  *         in datasheet must be shift at right before call interface
-  * @param  Trials Number of trials
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-
-  __IO uint32_t SMBUS_Trials = 0U;
-
-  if (hsmbus->State == HAL_SMBUS_STATE_READY)
-  {
-    if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
-    {
-      return HAL_BUSY;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsmbus);
-
-    hsmbus->State = HAL_SMBUS_STATE_BUSY;
-    hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
-    do
-    {
-      /* Generate Start */
-      hsmbus->Instance->CR2 = SMBUS_GENERATE_START(hsmbus->Init.AddressingMode, DevAddress);
-
-      /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
-      /* Wait until STOPF flag is set or a NACK flag is set*/
-      tickstart = HAL_GetTick();
-      while ((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
-      {
-        if (Timeout != HAL_MAX_DELAY)
-        {
-          if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-          {
-            /* Device is ready */
-            hsmbus->State = HAL_SMBUS_STATE_READY;
-
-            /* Process Unlocked */
-            __HAL_UNLOCK(hsmbus);
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-
-      /* Check if the NACKF flag has not been set */
-      if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET)
-      {
-        /* Wait until STOPF flag is reset */
-        if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-        /* Device is ready */
-        hsmbus->State = HAL_SMBUS_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hsmbus);
-
-        return HAL_OK;
-      }
-      else
-      {
-        /* Wait until STOPF flag is reset */
-        if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear NACK Flag */
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-        /* Clear STOP Flag, auto generated with autoend*/
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-      }
-
-      /* Check if the maximum allowed number of trials has been reached */
-      if (SMBUS_Trials++ == Trials)
-      {
-        /* Generate Stop */
-        hsmbus->Instance->CR2 |= I2C_CR2_STOP;
-
-        /* Wait until STOPF flag is reset */
-        if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
-        {
-          return HAL_TIMEOUT;
-        }
-
-        /* Clear STOP Flag */
-        __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-      }
-    }
-    while (SMBUS_Trials < Trials);
-
-    hsmbus->State = HAL_SMBUS_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    return HAL_TIMEOUT;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
- * @{
- */
-
-/**
-  * @brief  Handle SMBUS event interrupt request.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint32_t tmpisrvalue = 0U;
-
-  /* Use a local variable to store the current ISR flags */
-  /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
-  tmpisrvalue = SMBUS_GET_ISR_REG(hsmbus);
-
-  /* SMBUS in mode Transmitter ---------------------------------------------------*/
-  if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
-  {
-    /* Slave mode selected */
-    if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
-    {
-      SMBUS_Slave_ISR(hsmbus);
-    }
-    /* Master mode selected */
-    else if ((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      SMBUS_Master_ISR(hsmbus);
-    }
-  }
-
-  /* SMBUS in mode Receiver ----------------------------------------------------*/
-  if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
-  {
-    /* Slave mode selected */
-    if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
-    {
-      SMBUS_Slave_ISR(hsmbus);
-    }
-    /* Master mode selected */
-    else if ((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      SMBUS_Master_ISR(hsmbus);
-    }
-  }
-
-  /* SMBUS in mode Listener Only --------------------------------------------------*/
-  if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))
-      && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
-  {
-    if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
-    {
-      SMBUS_Slave_ISR(hsmbus);
-    }
-  }
-}
-
-/**
-  * @brief  Handle SMBUS error interrupt request.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
-{
-  SMBUS_ITErrorHandler(hsmbus);
-}
-
-/**
-  * @brief  Master Tx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MasterTxCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Master Rx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_MasterRxCpltCallback() could be implemented in the user file
-   */
-}
-
-/** @brief  Slave Tx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_SlaveTxCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Rx Transfer completed callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_SlaveRxCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Slave Address Match callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  TransferDirection Master request Transfer Direction (Write/Read)
-  * @param  AddrMatchCode Address Match Code
-  * @retval None
-  */
-__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-  UNUSED(TransferDirection);
-  UNUSED(AddrMatchCode);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_AddrCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Listen Complete callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_ListenCpltCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  SMBUS error callback.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval None
-  */
-__weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsmbus);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SMBUS_ErrorCallback() could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
- *  @brief   Peripheral State and Errors functions
- *
-@verbatim
- ===============================================================================
-            ##### Peripheral State and Errors functions #####
- ===============================================================================
-    [..]
-    This subsection permits to get in run-time the status of the peripheral
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the SMBUS handle state.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL state
-  */
-uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* Return SMBUS handle state */
-  return hsmbus->State;
-}
-
-/**
-* @brief  Return the SMBUS error code.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *              the configuration information for the specified SMBUS.
-* @retval SMBUS Error Code
-*/
-uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus)
-{
-  return hsmbus->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
- *  @brief   Data transfers Private functions
-  * @{
-  */
-
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Master Mode.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint16_t DevAddress;
-
-  /* Process Locked */
-  __HAL_LOCK(hsmbus);
-
-  if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
-  {
-    /* Clear NACK Flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-    /* Set corresponding Error Code */
-    /* No need to generate STOP, it is automatically done */
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Call the Error callback to inform upper layer */
-    HAL_SMBUS_ErrorCallback(hsmbus);
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
-  {
-    /* Check and treat errors if errors occurs during STOP process */
-    SMBUS_ITErrorHandler(hsmbus);
-
-    /* Call the corresponding callback to inform upper layer of End of Transfer */
-    if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-    {
-      /* Disable Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-
-      /* Clear STOP Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-      /* Clear Configuration Register 2 */
-      SMBUS_RESET_CR2(hsmbus);
-
-      /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
-      /* Disable the selected SMBUS peripheral */
-      __HAL_SMBUS_DISABLE(hsmbus);
-
-      hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-      hsmbus->State = HAL_SMBUS_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* REenable the selected SMBUS peripheral */
-      __HAL_SMBUS_ENABLE(hsmbus);
-
-      HAL_SMBUS_MasterTxCpltCallback(hsmbus);
-    }
-    else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-    {
-      /* Store Last receive data if any */
-      if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
-      {
-        /* Read data from RXDR */
-        (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-
-        if ((hsmbus->XferSize > 0U))
-        {
-          hsmbus->XferSize--;
-          hsmbus->XferCount--;
-        }
-      }
-
-      /* Disable Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-
-      /* Clear STOP Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-      /* Clear Configuration Register 2 */
-      SMBUS_RESET_CR2(hsmbus);
-
-      hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-      hsmbus->State = HAL_SMBUS_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      HAL_SMBUS_MasterRxCpltCallback(hsmbus);
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
-  {
-    /* Read data from RXDR */
-    (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-    hsmbus->XferSize--;
-    hsmbus->XferCount--;
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
-  {
-    /* Write data to TXDR */
-    hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
-    hsmbus->XferSize--;
-    hsmbus->XferCount--;
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
-  {
-    if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount != 0U))
-    {
-      DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
-
-      if (hsmbus->XferCount > MAX_NBYTE_SIZE)
-      {
-        SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
-        hsmbus->XferSize = MAX_NBYTE_SIZE;
-      }
-      else
-      {
-        hsmbus->XferSize = hsmbus->XferCount;
-        SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-        /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
-        /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-        if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-        {
-          hsmbus->XferSize--;
-          hsmbus->XferCount--;
-        }
-      }
-    }
-    else if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount == 0U))
-    {
-      /* Call TxCpltCallback() if no stop mode is set */
-      if (SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
-      {
-        /* Call the corresponding callback to inform upper layer of End of Transfer */
-        if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-        {
-          /* Disable Interrupt */
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterTxCpltCallback(hsmbus);
-        }
-        else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-        {
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterRxCpltCallback(hsmbus);
-        }
-      }
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
-  {
-    if (hsmbus->XferCount == 0U)
-    {
-      /* Specific use case for Quick command */
-      if (hsmbus->pBuffPtr == NULL)
-      {
-        /* Generate a Stop command */
-        hsmbus->Instance->CR2 |= I2C_CR2_STOP;
-      }
-      /* Call TxCpltCallback() if no stop mode is set */
-      else if (SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
-      {
-        /* No Generate Stop, to permit restart mode */
-        /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */
-
-        /* Call the corresponding callback to inform upper layer of End of Transfer */
-        if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
-        {
-          /* Disable Interrupt */
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterTxCpltCallback(hsmbus);
-        }
-        else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
-        {
-          SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          HAL_SMBUS_MasterRxCpltCallback(hsmbus);
-        }
-      }
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hsmbus);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint8_t TransferDirection = 0U;
-  uint16_t SlaveAddrCode = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(hsmbus);
-
-  if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
-  {
-    /* Check that SMBUS transfer finished */
-    /* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
-    /* Mean XferCount == 0*/
-    /* So clear Flag NACKF only */
-    if (hsmbus->XferCount == 0U)
-    {
-      /* Clear NACK Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-    }
-    else
-    {
-      /* if no, error usecase, a Non-Acknowledge of last Data is generated by the HOST*/
-      /* Clear NACK Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
-      /* Set HAL State to "Idle" State, mean to LISTEN state */
-      /* So reset Slave Busy state */
-      hsmbus->PreviousState = hsmbus->State;
-      hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
-      hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
-
-      /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
-
-      /* Set ErrorCode corresponding to a Non-Acknowledge */
-      hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* Call the Error callback to inform upper layer */
-      HAL_SMBUS_ErrorCallback(hsmbus);
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
-  {
-    TransferDirection = SMBUS_GET_DIR(hsmbus);
-    SlaveAddrCode = SMBUS_GET_ADDR_MATCH(hsmbus);
-
-    /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
-    /* Other ADDRInterrupt will be treat in next Listen usecase */
-    __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsmbus);
-
-    /* Call Slave Addr callback */
-    HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode);
-  }
-  else if ((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
-  {
-    if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
-    {
-      /* Read data from RXDR */
-      (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-      hsmbus->XferSize--;
-      hsmbus->XferCount--;
-
-      if (hsmbus->XferCount == 1U)
-      {
-        /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
-        /* or only the last Byte of Transfer */
-        /* So reset the RELOAD bit mode */
-        hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
-        SMBUS_TransferConfig(hsmbus, 0U , 1U , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-      }
-      else if (hsmbus->XferCount == 0U)
-      {
-        /* Last Byte is received, disable Interrupt */
-        SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-
-        /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */
-        hsmbus->PreviousState = hsmbus->State;
-        hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hsmbus);
-
-        /* Call the Rx complete callback to inform upper layer of the end of receive process */
-        HAL_SMBUS_SlaveRxCpltCallback(hsmbus);
-      }
-      else
-      {
-        /* Set Reload for next Bytes */
-        SMBUS_TransferConfig(hsmbus, 0U, 1U, SMBUS_RELOAD_MODE  | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
-
-        /* Ack last Byte Read */
-        hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
-      }
-    }
-    else if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
-    {
-      if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount != 0U))
-      {
-        if (hsmbus->XferCount > MAX_NBYTE_SIZE)
-        {
-          SMBUS_TransferConfig(hsmbus, 0U, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
-          hsmbus->XferSize = MAX_NBYTE_SIZE;
-        }
-        else
-        {
-          hsmbus->XferSize = hsmbus->XferCount;
-          SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
-          /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
-          /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
-          if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
-          {
-            hsmbus->XferSize--;
-            hsmbus->XferCount--;
-          }
-        }
-      }
-    }
-  }
-  else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
-  {
-    /* Write data to TXDR only if XferCount not reach "0" */
-    /* A TXIS flag can be set, during STOP treatment      */
-    /* Check if all Data have already been sent */
-    /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
-    if (hsmbus->XferCount > 0U)
-    {
-      /* Write data to TXDR */
-      hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
-      hsmbus->XferCount--;
-      hsmbus->XferSize--;
-    }
-
-    if (hsmbus->XferCount == 0U)
-    {
-      /* Last Byte is Transmitted */
-      /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
-      hsmbus->PreviousState = hsmbus->State;
-      hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* Call the Tx complete callback to inform upper layer of the end of transmit process */
-      HAL_SMBUS_SlaveTxCpltCallback(hsmbus);
-    }
-  }
-
-  /* Check if STOPF is set */
-  if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
-  {
-    if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
-    {
-      /* Store Last receive data if any */
-      if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
-      {
-        /* Read data from RXDR */
-        (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
-
-        if ((hsmbus->XferSize > 0U))
-        {
-          hsmbus->XferSize--;
-          hsmbus->XferCount--;
-        }
-      }
-
-      /* Disable RX and TX Interrupts */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
-
-      /* Disable ADDR Interrupt */
-      SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
-      /* Disable Address Acknowledge */
-      hsmbus->Instance->CR2 |= I2C_CR2_NACK;
-
-      /* Clear Configuration Register 2 */
-      SMBUS_RESET_CR2(hsmbus);
-
-      /* Clear STOP Flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
-      /* Clear ADDR flag */
-      __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
-
-      hsmbus->XferOptions = 0U;
-      hsmbus->PreviousState = hsmbus->State;
-      hsmbus->State = HAL_SMBUS_STATE_READY;
-
-      /* Process Unlocked */
-      __HAL_UNLOCK(hsmbus);
-
-      /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
-      HAL_SMBUS_ListenCpltCallback(hsmbus);
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hsmbus);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Manage the enabling of Interrupts.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
-  {
-    /* Enable ERR interrupt */
-    tmpisr |= SMBUS_IT_ERRI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
-  {
-    /* Enable ADDR, STOP interrupt */
-    tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
-  {
-    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
-    tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
-  {
-    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
-    tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI;
-  }
-
-  /* Enable interrupts only at the end */
-  /* to avoid the risk of SMBUS interrupt handle execution before */
-  /* all interrupts requested done */
-  __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr);
-
-  return HAL_OK;
-}
-/**
-  * @brief  Manage the disabling of Interrupts.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
-{
-  uint32_t tmpisr = 0U;
-
-  if (((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY))
-  {
-    /* Disable ERR interrupt */
-    tmpisr |= SMBUS_IT_ERRI;
-  }
-
-  if ((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
-  {
-    /* Disable TC, STOP, NACK, TXI interrupt */
-    tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI;
-
-    if ((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
-        && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
-    {
-      /* Disable ERR interrupt */
-      tmpisr |= SMBUS_IT_ERRI;
-    }
-
-    if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
-    {
-      /* Disable STOPI, NACKI */
-      tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
-    }
-  }
-
-  if ((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
-  {
-    /* Disable TC, STOP, NACK, RXI interrupt */
-    tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI;
-
-    if ((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
-        && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
-    {
-      /* Disable ERR interrupt */
-      tmpisr |= SMBUS_IT_ERRI;
-    }
-
-    if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
-    {
-      /* Disable STOPI, NACKI */
-      tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
-    }
-  }
-
-  if ((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
-  {
-    /* Enable ADDR, STOP interrupt */
-    tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI;
-
-    if (SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
-    {
-      /* Disable ERR interrupt */
-      tmpisr |= SMBUS_IT_ERRI;
-    }
-  }
-
-  /* Disable interrupts only at the end */
-  /* to avoid a breaking situation like at "t" time */
-  /* all disable interrupts request are not done */
-  __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  SMBUS interrupts error handler.
-  * @param  hsmbus SMBUS handle.
-  * @retval None
-  */
-static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
-{
-  uint32_t itflags   = READ_REG(hsmbus->Instance->ISR);
-  uint32_t itsources = READ_REG(hsmbus->Instance->CR1);
-
-  /* SMBUS Bus error interrupt occurred ------------------------------------*/
-  if (((itflags & SMBUS_FLAG_BERR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
-
-    /* Clear BERR flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
-  }
-
-  /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
-  if (((itflags & SMBUS_FLAG_OVR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
-
-    /* Clear OVR flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
-  }
-
-  /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
-  if (((itflags & SMBUS_FLAG_ARLO) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
-
-    /* Clear ARLO flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
-  }
-
-  /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
-  if (((itflags & SMBUS_FLAG_TIMEOUT) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
-
-    /* Clear TIMEOUT flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
-  }
-
-  /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
-  if (((itflags & SMBUS_FLAG_ALERT) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
-
-    /* Clear ALERT flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
-  }
-
-  /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
-  if (((itflags & SMBUS_FLAG_PECERR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
-  {
-    hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
-
-    /* Clear PEC error flag */
-    __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
-  }
-
-  /* Call the Error Callback in case of Error detected */
-  if ((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE) && (hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
-  {
-    /* Do not Reset the HAL state in case of ALERT error */
-    if ((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
-    {
-      if (((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
-          || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
-      {
-        /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
-        /* keep HAL_SMBUS_STATE_LISTEN if set */
-        hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
-        hsmbus->State = HAL_SMBUS_STATE_LISTEN;
-      }
-    }
-
-    /* Call the Error callback to inform upper layer */
-    HAL_SMBUS_ErrorCallback(hsmbus);
-  }
-}
-
-/**
-  * @brief  Handle SMBUS Communication Timeout.
-  * @param  hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
-  *                the configuration information for the specified SMBUS.
-  * @param  Flag Specifies the SMBUS flag to check.
-  * @param  Status The new Flag status (SET or RESET).
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
-{
-  uint32_t tickstart = HAL_GetTick();
-
-  /* Wait until flag is set */
-  if (Status == RESET)
-  {
-    while (__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
-    {
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
-      {
-        if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-        {
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  else
-  {
-    while (__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
-    {
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
-      {
-        if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
-        {
-          hsmbus->PreviousState = hsmbus->State;
-          hsmbus->State = HAL_SMBUS_STATE_READY;
-
-          /* Process Unlocked */
-          __HAL_UNLOCK(hsmbus);
-
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
-  * @param  hsmbus SMBUS handle.
-  * @param  DevAddress specifies the slave address to be programmed.
-  * @param  Size specifies the number of bytes to be programmed.
-  *   This parameter must be a value between 0 and 255.
-  * @param  Mode New state of the SMBUS START condition generation.
-  *   This parameter can be one or a combination  of the following values:
-  *     @arg @ref SMBUS_RELOAD_MODE Enable Reload mode.
-  *     @arg @ref SMBUS_AUTOEND_MODE Enable Automatic end mode.
-  *     @arg @ref SMBUS_SOFTEND_MODE Enable Software end mode and Reload mode.
-  *     @arg @ref SMBUS_SENDPEC_MODE Enable Packet Error Calculation mode.
-  * @param  Request New state of the SMBUS START condition generation.
-  *   This parameter can be one of the following values:
-  *     @arg @ref SMBUS_NO_STARTSTOP Don't Generate stop and start condition.
-  *     @arg @ref SMBUS_GENERATE_STOP Generate stop condition (Size should be set to 0).
-  *     @arg @ref SMBUS_GENERATE_START_READ Generate Restart for read request.
-  *     @arg @ref SMBUS_GENERATE_START_WRITE Generate Restart for write request.
-  * @retval None
-  */
-static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus,  uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
-{
-  uint32_t tmpreg = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
-  assert_param(IS_SMBUS_TRANSFER_MODE(Mode));
-  assert_param(IS_SMBUS_TRANSFER_REQUEST(Request));
-
-  /* Get the CR2 register value */
-  tmpreg = hsmbus->Instance->CR2;
-
-  /* clear tmpreg specific bits */
-  tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
-
-  /* update tmpreg */
-  tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16U) & I2C_CR2_NBYTES) | \
-                       (uint32_t)Mode | (uint32_t)Request);
-
-  /* update CR2 register */
-  hsmbus->Instance->CR2 = tmpreg;
-}
-
-/**
-  * @brief  Convert SMBUSx OTHER_xxx XferOptions to functionnal XferOptions.
-  * @param  hsmbus SMBUS handle.
-  * @retval None
-  */
-static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus)
-{
-  /* if user set XferOptions to SMBUS_OTHER_FRAME_NO_PEC   */
-  /* it request implicitly to generate a restart condition */
-  /* set XferOptions to SMBUS_FIRST_FRAME                  */
-  if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_NO_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_FRAME;
-  }
-  /* else if user set XferOptions to SMBUS_OTHER_FRAME_WITH_PEC */
-  /* it request implicitly to generate a restart condition      */
-  /* set XferOptions to SMBUS_FIRST_FRAME | SMBUS_SENDPEC_MODE  */
-  else if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_WITH_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_FRAME | SMBUS_SENDPEC_MODE;
-  }
-  /* else if user set XferOptions to SMBUS_OTHER_AND_LAST_FRAME_NO_PEC */
-  /* it request implicitly to generate a restart condition             */
-  /* then generate a stop condition at the end of transfer             */
-  /* set XferOptions to SMBUS_FIRST_AND_LAST_FRAME_NO_PEC              */
-  else if (hsmbus->XferOptions == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_AND_LAST_FRAME_NO_PEC;
-  }
-  /* else if user set XferOptions to SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC */
-  /* it request implicitly to generate a restart condition               */
-  /* then generate a stop condition at the end of transfer               */
-  /* set XferOptions to SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC              */
-  else if (hsmbus->XferOptions == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)
-  {
-    hsmbus->XferOptions = SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC;
-  }
-}
-/**
-  * @}
-  */
-
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_spi.c b/lib/hal-stm32f0/source/stm32f0xx_hal_spi.c
deleted file mode 100644
index 1fc6912e..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_spi.c
+++ /dev/null
@@ -1,3910 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_spi.c
-  * @author  MCD Application Team
-  * @brief   SPI HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Serial Peripheral Interface (SPI) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State functions
-  *
-  @verbatim
-  ==============================================================================
-                        ##### How to use this driver #####
-  ==============================================================================
-    [..]
-      The SPI HAL driver can be used as follows:
-
-      (#) Declare a SPI_HandleTypeDef handle structure, for example:
-          SPI_HandleTypeDef  hspi;
-
-      (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
-          (##) Enable the SPIx interface clock
-          (##) SPI pins configuration
-              (+++) Enable the clock for the SPI GPIOs
-              (+++) Configure these SPI pins as alternate function push-pull
-          (##) NVIC configuration if you need to use interrupt process
-              (+++) Configure the SPIx interrupt priority
-              (+++) Enable the NVIC SPI IRQ handle
-          (##) DMA Configuration if you need to use DMA process
-              (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Stream/Channel
-              (+++) Enable the DMAx clock
-              (+++) Configure the DMA handle parameters
-              (+++) Configure the DMA Tx or Rx Stream/Channel
-              (+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
-              (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel
-
-      (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
-          management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
-
-      (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
-          (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-              by calling the customized HAL_SPI_MspInit() API.
-     [..]
-       Circular mode restriction:
-      (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
-          (##) Master 2Lines RxOnly
-          (##) Master 1Line Rx
-      (#) The CRC feature is not managed when the DMA circular mode is enabled
-      (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
-          the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
-     [..]
-       Master Receive mode restriction:
-      (#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=0) or
-          bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI
-          does not initiate a new transfer the following procedure has to be respected:
-          (##) HAL_SPI_DeInit()
-          (##) HAL_SPI_Init()
-     [..]
-       The HAL drivers do not allow reaching all supported SPI frequencies in the different SPI
-       modes. Refer to the source code (stm32xxxx_hal_spi.c header) to get a summary of the
-       maximum SPI frequency that can be reached with a data size of 8 or 16 bits, depending on
-       the APBx peripheral clock frequency (fPCLK) used by the SPI instance.
-
-     [..]
-       Data buffer address alignment restriction:
-      (#) In case more than 1 byte is requested to be transferred, the HAL SPI uses 16-bit access for data buffer.
-          But there is no support for unaligned accesses on the Cortex-M0 processor.
-          So, if the user wants to transfer more than 1 byte, it shall ensure that 16-bit aligned address is used for:
-          (##) pData parameter in HAL_SPI_Transmit(), HAL_SPI_Transmit_IT(), HAL_SPI_Receive() and HAL_SPI_Receive_IT()
-          (##) pTxData and pRxData parameters in HAL_SPI_TransmitReceive() and HAL_SPI_TransmitReceive_IT()
-      (#) There is no such restriction when going through DMA by using HAL_SPI_Transmit_DMA(), HAL_SPI_Receive_DMA()
-          and HAL_SPI_TransmitReceive_DMA().
-
-  @endverbatim
-
-  Additional table :
-
-       DataSize = SPI_DATASIZE_8BIT:
-       +----------------------------------------------------------------------------------------------+
-       |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
-       | Process | Tranfert mode  |---------------------|----------------------|----------------------|
-       |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
-       |==============================================================================================|
-       |    T    |     Polling    | Fpclk/4  | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
-       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    /    |     Interrupt  | Fpclk/4  | Fpclk/16 |    NA     |    NA    |    NA     |   NA     |
-       |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
-       |=========|================|==========|==========|===========|==========|===========|==========|
-       |         |     Polling    | Fpclk/4  | Fpclk/8  | Fpclk/16  | Fpclk/8  | Fpclk/8   | Fpclk/8  |
-       |         |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    R    |     Interrupt  | Fpclk/8  | Fpclk/16 | Fpclk/8   | Fpclk/8  | Fpclk/8   | Fpclk/4  |
-       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |         |       DMA      | Fpclk/4  | Fpclk/2  | Fpclk/2   | Fpclk/16 | Fpclk/2   | Fpclk/16 |
-       |=========|================|==========|==========|===========|==========|===========|==========|
-       |         |     Polling    | Fpclk/8  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/8  |
-       |         |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    T    |     Interrupt  | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/16  | Fpclk/8  |
-       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/16 |
-       +----------------------------------------------------------------------------------------------+
-
-       DataSize = SPI_DATASIZE_16BIT:
-       +----------------------------------------------------------------------------------------------+
-       |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
-       | Process | Tranfert mode  |---------------------|----------------------|----------------------|
-       |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
-       |==============================================================================================|
-       |    T    |     Polling    | Fpclk/4  | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
-       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    /    |     Interrupt  | Fpclk/4  | Fpclk/16 |    NA     |    NA    |    NA     |   NA     |
-       |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
-       |=========|================|==========|==========|===========|==========|===========|==========|
-       |         |     Polling    | Fpclk/4  | Fpclk/8  | Fpclk/16  | Fpclk/8  | Fpclk/8   | Fpclk/8  |
-       |         |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    R    |     Interrupt  | Fpclk/8  | Fpclk/16 | Fpclk/8   | Fpclk/8  | Fpclk/8   | Fpclk/4  |
-       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |         |       DMA      | Fpclk/4  | Fpclk/2  | Fpclk/2   | Fpclk/16 | Fpclk/2   | Fpclk/16 |
-       |=========|================|==========|==========|===========|==========|===========|==========|
-       |         |     Polling    | Fpclk/8  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/8  |
-       |         |----------------|----------|----------|-----------|----------|-----------|----------|
-       |    T    |     Interrupt  | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/16  | Fpclk/8  |
-       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
-       |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/16 |
-       +----------------------------------------------------------------------------------------------+
-       @note The max SPI frequency depend on SPI data size (4bits, 5bits,..., 8bits,...15bits, 16bits),
-             SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
-       @note
-            (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
-            (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
-            (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
-
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SPI SPI
-  * @brief SPI HAL module driver
-  * @{
-  */
-#ifdef HAL_SPI_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private defines -----------------------------------------------------------*/
-/** @defgroup SPI_Private_Constants SPI Private Constants
-  * @{
-  */
-#define SPI_DEFAULT_TIMEOUT 100U
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup SPI_Private_Functions SPI Private Functions
-  * @{
-  */
-static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
-static void SPI_DMAError(DMA_HandleTypeDef *hdma);
-static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State,
-                                                       uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
-                                                       uint32_t Timeout, uint32_t Tickstart);
-static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
-static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
-static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
-static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
-#if (USE_SPI_CRC != 0U)
-static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
-static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
-#endif /* USE_SPI_CRC */
-static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi);
-static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi);
-static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
-static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
-static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
-static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
-static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @defgroup SPI_Exported_Functions SPI Exported Functions
-  * @{
-  */
-
-/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
- *  @brief    Initialization and Configuration functions
- *
-@verbatim
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This subsection provides a set of functions allowing to initialize and
-          de-initialize the SPIx peripheral:
-
-      (+) User must implement HAL_SPI_MspInit() function in which he configures
-          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
-
-      (+) Call the function HAL_SPI_Init() to configure the selected device with
-          the selected configuration:
-        (++) Mode
-        (++) Direction
-        (++) Data Size
-        (++) Clock Polarity and Phase
-        (++) NSS Management
-        (++) BaudRate Prescaler
-        (++) FirstBit
-        (++) TIMode
-        (++) CRC Calculation
-        (++) CRC Polynomial if CRC enabled
-        (++) CRC Length, used only with Data8 and Data16
-        (++) FIFO reception threshold
-
-      (+) Call the function HAL_SPI_DeInit() to restore the default configuration
-          of the selected SPIx peripheral.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the SPI according to the specified parameters
-  *         in the SPI_InitTypeDef and initialize the associated handle.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
-{
-  uint32_t frxth;
-
-  /* Check the SPI handle allocation */
-  if (hspi == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
-  assert_param(IS_SPI_MODE(hspi->Init.Mode));
-  assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
-  assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
-  assert_param(IS_SPI_NSS(hspi->Init.NSS));
-  assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode));
-  assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
-  assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
-  assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
-  if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
-  {
-    assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
-    assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
-  }
-#if (USE_SPI_CRC != 0U)
-  assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
-    assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
-  }
-#else
-  hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
-#endif /* USE_SPI_CRC */
-
-  if (hspi->State == HAL_SPI_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    hspi->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
-    HAL_SPI_MspInit(hspi);
-  }
-
-  hspi->State = HAL_SPI_STATE_BUSY;
-
-  /* Disable the selected SPI peripheral */
-  __HAL_SPI_DISABLE(hspi);
-
-  /* Align by default the rs fifo threshold on the data size */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    frxth = SPI_RXFIFO_THRESHOLD_HF;
-  }
-  else
-  {
-    frxth = SPI_RXFIFO_THRESHOLD_QF;
-  }
-
-  /* CRC calculation is valid only for 16Bit and 8 Bit */
-  if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT))
-  {
-    /* CRC must be disabled */
-    hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
-  }
-
-  /* Align the CRC Length on the data size */
-  if (hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
-  {
-    /* CRC Length aligned on the data size : value set by default */
-    if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-    {
-      hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
-    }
-    else
-    {
-      hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
-    }
-  }
-
-  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
-  /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
-  Communication speed, First bit and CRC calculation state */
-  WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction |
-                                  hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
-                                  hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit  | hspi->Init.CRCCalculation));
-#if (USE_SPI_CRC != 0U)
-  /* Configure : CRC Length */
-  if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
-  {
-    hspi->Instance->CR1 |= SPI_CR1_CRCL;
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo Threshold */
-  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode |
-                                  hspi->Init.NSSPMode | hspi->Init.DataSize) | frxth);
-
-#if (USE_SPI_CRC != 0U)
-  /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
-  /* Configure : CRC Polynomial */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
-  }
-#endif /* USE_SPI_CRC */
-
-#if defined(SPI_I2SCFGR_I2SMOD)
-  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
-  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
-#endif /* SPI_I2SCFGR_I2SMOD */
-
-  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  hspi->State     = HAL_SPI_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  De-Initialize the SPI peripheral.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
-{
-  /* Check the SPI handle allocation */
-  if (hspi == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check SPI Instance parameter */
-  assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
-
-  hspi->State = HAL_SPI_STATE_BUSY;
-
-  /* Disable the SPI Peripheral Clock */
-  __HAL_SPI_DISABLE(hspi);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
-  HAL_SPI_MspDeInit(hspi);
-
-  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  hspi->State = HAL_SPI_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(hspi);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initialize the SPI MSP.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_MspInit should be implemented in the user file
-   */
-}
-
-/**
-  * @brief  De-Initialize the SPI MSP.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_MspDeInit should be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_Exported_Functions_Group2 IO operation functions
- *  @brief   Data transfers functions
- *
-@verbatim
-  ==============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
- [..]
-    This subsection provides a set of functions allowing to manage the SPI
-    data transfers.
-
-    [..] The SPI supports master and slave mode :
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode: The communication is performed in polling mode.
-            The HAL status of all data processing is returned by the same function
-            after finishing transfer.
-       (++) No-Blocking mode: The communication is performed using Interrupts
-            or DMA, These APIs return the HAL status.
-            The end of the data processing will be indicated through the
-            dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
-            using DMA mode.
-            The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
-            will be executed respectively at the end of the transmit or Receive process
-            The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
-
-    (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
-        exist for 1Line (simplex) and 2Lines (full duplex) modes.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Transmit an amount of data in blocking mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size > 1U))
-  {
-    /* in this case, 16-bit access is performed on Data
-       So, check Data is 16-bit aligned address */
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pData));
-  }
-
-  /* Check Direction parameter */
-  assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
-
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  /* Init tickstart for timeout management*/
-  tickstart = HAL_GetTick();
-
-  if (hspi->State != HAL_SPI_STATE_READY)
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Set the transaction information */
-  hspi->State       = HAL_SPI_STATE_BUSY_TX;
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = (uint8_t *)pData;
-  hspi->TxXferSize  = Size;
-  hspi->TxXferCount = Size;
-
-  /*Init field not used in handle to zero */
-  hspi->pRxBuffPtr  = (uint8_t *)NULL;
-  hspi->RxXferSize  = 0U;
-  hspi->RxXferCount = 0U;
-  hspi->TxISR       = NULL;
-  hspi->RxISR       = NULL;
-
-  /* Configure communication direction : 1Line */
-  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
-  {
-    SPI_1LINE_TX(hspi);
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SPI_RESET_CRC(hspi);
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-  /* Transmit data in 16 Bit mode */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01U))
-    {
-      hspi->Instance->DR = *((uint16_t *)pData);
-      pData += sizeof(uint16_t);
-      hspi->TxXferCount--;
-    }
-    /* Transmit data in 16 Bit mode */
-    while (hspi->TxXferCount > 0U)
-    {
-      /* Wait until TXE flag is set to send data */
-      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
-      {
-        hspi->Instance->DR = *((uint16_t *)pData);
-        pData += sizeof(uint16_t);
-        hspi->TxXferCount--;
-      }
-      else
-      {
-        /* Timeout management */
-        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
-        {
-          errorcode = HAL_TIMEOUT;
-          goto error;
-        }
-      }
-    }
-  }
-  /* Transmit data in 8 Bit mode */
-  else
-  {
-    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01U))
-    {
-      if (hspi->TxXferCount > 1U)
-      {
-        /* write on the data register in packing mode */
-        hspi->Instance->DR = *((uint16_t *)pData);
-        pData += sizeof(uint16_t);
-        hspi->TxXferCount -= 2U;
-      }
-      else
-      {
-        *((__IO uint8_t *)&hspi->Instance->DR) = (*pData++);
-        hspi->TxXferCount--;
-      }
-    }
-    while (hspi->TxXferCount > 0U)
-    {
-      /* Wait until TXE flag is set to send data */
-      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
-      {
-        if (hspi->TxXferCount > 1U)
-        {
-          /* write on the data register in packing mode */
-          hspi->Instance->DR = *((uint16_t *)pData);
-          pData += sizeof(uint16_t);
-          hspi->TxXferCount -= 2U;
-        }
-        else
-        {
-          *((__IO uint8_t *)&hspi->Instance->DR) = (*pData++);
-          hspi->TxXferCount--;
-        }
-      }
-      else
-      {
-        /* Timeout management */
-        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
-        {
-          errorcode = HAL_TIMEOUT;
-          goto error;
-        }
-      }
-    }
-  }
-#if (USE_SPI_CRC != 0U)
-  /* Enable CRC Transmission */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Check the end of the transaction */
-  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
-  }
-
-  /* Clear overrun flag in 2 Lines communication mode because received is not read */
-  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
-  {
-    __HAL_SPI_CLEAR_OVRFLAG(hspi);
-  }
-
-  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-  {
-    errorcode = HAL_ERROR;
-  }
-
-error:
-  hspi->State = HAL_SPI_STATE_READY;
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Receive an amount of data in blocking mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be received
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-#if (USE_SPI_CRC != 0U)
-  __IO uint16_t tmpreg = 0U;
-#endif /* USE_SPI_CRC */
-  uint32_t tickstart = 0U;
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size > 1U))
-  {
-    /* in this case, 16-bit access is performed on Data
-       So, check Data is 16-bit aligned address */
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pData));
-  }
-
-  if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
-  {
-    hspi->State = HAL_SPI_STATE_BUSY_RX;
-    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
-    return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
-  }
-
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  /* Init tickstart for timeout management*/
-  tickstart = HAL_GetTick();
-
-  if (hspi->State != HAL_SPI_STATE_READY)
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Set the transaction information */
-  hspi->State       = HAL_SPI_STATE_BUSY_RX;
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = (uint8_t *)pData;
-  hspi->RxXferSize  = Size;
-  hspi->RxXferCount = Size;
-
-  /*Init field not used in handle to zero */
-  hspi->pTxBuffPtr  = (uint8_t *)NULL;
-  hspi->TxXferSize  = 0U;
-  hspi->TxXferCount = 0U;
-  hspi->RxISR       = NULL;
-  hspi->TxISR       = NULL;
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SPI_RESET_CRC(hspi);
-    /* this is done to handle the CRCNEXT before the latest data */
-    hspi->RxXferCount--;
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Set the Rx FiFo threshold */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    /* set fiforxthresold according the reception data length: 16bit */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-  else
-  {
-    /* set fiforxthresold according the reception data length: 8bit */
-    SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-
-  /* Configure communication direction: 1Line */
-  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
-  {
-    SPI_1LINE_RX(hspi);
-  }
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-  /* Receive data in 8 Bit mode */
-  if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT)
-  {
-    /* Transfer loop */
-    while (hspi->RxXferCount > 0U)
-    {
-      /* Check the RXNE flag */
-      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
-      {
-        /* read the received data */
-        (* (uint8_t *)pData) = *(__IO uint8_t *)&hspi->Instance->DR;
-        pData += sizeof(uint8_t);
-        hspi->RxXferCount--;
-      }
-      else
-      {
-        /* Timeout management */
-        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
-        {
-          errorcode = HAL_TIMEOUT;
-          goto error;
-        }
-      }
-    }
-  }
-  else
-  {
-    /* Transfer loop */
-    while (hspi->RxXferCount > 0U)
-    {
-      /* Check the RXNE flag */
-      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
-      {
-        *((uint16_t *)pData) = hspi->Instance->DR;
-        pData += sizeof(uint16_t);
-        hspi->RxXferCount--;
-      }
-      else
-      {
-        /* Timeout management */
-        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
-        {
-          errorcode = HAL_TIMEOUT;
-          goto error;
-        }
-      }
-    }
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Handle the CRC Transmission */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    /* freeze the CRC before the latest data */
-    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-
-    /* Read the latest data */
-    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* the latest data has not been received */
-      errorcode = HAL_TIMEOUT;
-      goto error;
-    }
-
-    /* Receive last data in 16 Bit mode */
-    if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-    {
-      *((uint16_t *)pData) = hspi->Instance->DR;
-    }
-    /* Receive last data in 8 Bit mode */
-    else
-    {
-      (*(uint8_t *)pData) = *(__IO uint8_t *)&hspi->Instance->DR;
-    }
-
-    /* Wait the CRC data */
-    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-      errorcode = HAL_TIMEOUT;
-      goto error;
-    }
-
-    /* Read CRC to Flush DR and RXNE flag */
-    if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
-    {
-      tmpreg = hspi->Instance->DR;
-      /* To avoid GCC warning */
-      UNUSED(tmpreg);
-    }
-    else
-    {
-      tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-      /* To avoid GCC warning */
-      UNUSED(tmpreg);
-
-      if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
-      {
-        if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout, tickstart) != HAL_OK)
-        {
-          /* Error on the CRC reception */
-          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-          errorcode = HAL_TIMEOUT;
-          goto error;
-        }
-        tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-        /* To avoid GCC warning */
-        UNUSED(tmpreg);
-      }
-    }
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Check the end of the transaction */
-  if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Check if CRC error occurred */
-  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-  }
-#endif /* USE_SPI_CRC */
-
-  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-  {
-    errorcode = HAL_ERROR;
-  }
-
-error :
-  hspi->State = HAL_SPI_STATE_READY;
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Transmit and Receive an amount of data in blocking mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pTxData pointer to transmission data buffer
-  * @param  pRxData pointer to reception data buffer
-  * @param  Size amount of data to be sent and received
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
-                                          uint32_t Timeout)
-{
-  uint32_t tmp = 0U, tmp1 = 0U;
-#if (USE_SPI_CRC != 0U)
-  __IO uint16_t tmpreg = 0U;
-#endif /* USE_SPI_CRC */
-  uint32_t tickstart = 0U;
-  /* Variable used to alternate Rx and Tx during transfer */
-  uint32_t txallowed = 1U;
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size > 1U))
-  {
-    /* in this case, 16-bit access is performed on Data
-       So, check Data is 16-bit aligned address */
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pTxData));
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pRxData));
-  }
-
-  /* Check Direction parameter */
-  assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
-
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  /* Init tickstart for timeout management*/
-  tickstart = HAL_GetTick();
-
-  tmp  = hspi->State;
-  tmp1 = hspi->Init.Mode;
-
-  if (!((tmp == HAL_SPI_STATE_READY) || \
-        ((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
-  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
-  {
-    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
-  }
-
-  /* Set the transaction information */
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
-  hspi->RxXferCount = Size;
-  hspi->RxXferSize  = Size;
-  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
-  hspi->TxXferCount = Size;
-  hspi->TxXferSize  = Size;
-
-  /*Init field not used in handle to zero */
-  hspi->RxISR       = NULL;
-  hspi->TxISR       = NULL;
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SPI_RESET_CRC(hspi);
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Set the Rx Fifo threshold */
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount > 1U))
-  {
-    /* set fiforxthreshold according the reception data length: 16bit */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-  else
-  {
-    /* set fiforxthreshold according the reception data length: 8bit */
-    SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-  /* Transmit and Receive data in 16 Bit mode */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01U))
-    {
-      hspi->Instance->DR = *((uint16_t *)pTxData);
-      pTxData += sizeof(uint16_t);
-      hspi->TxXferCount--;
-    }
-    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
-    {
-      /* Check TXE flag */
-      if (txallowed && (hspi->TxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)))
-      {
-        hspi->Instance->DR = *((uint16_t *)pTxData);
-        pTxData += sizeof(uint16_t);
-        hspi->TxXferCount--;
-        /* Next Data is a reception (Rx). Tx not allowed */
-        txallowed = 0U;
-
-#if (USE_SPI_CRC != 0U)
-        /* Enable CRC Transmission */
-        if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
-        {
-          /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */
-          if (((hspi->Instance->CR1 & SPI_CR1_MSTR) == 0U) && ((hspi->Instance->CR2 & SPI_CR2_NSSP) == SPI_CR2_NSSP))
-          {
-            SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM);
-          }
-          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-        }
-#endif /* USE_SPI_CRC */
-      }
-
-      /* Check RXNE flag */
-      if ((hspi->RxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)))
-      {
-        *((uint16_t *)pRxData) = hspi->Instance->DR;
-        pRxData += sizeof(uint16_t);
-        hspi->RxXferCount--;
-        /* Next Data is a Transmission (Tx). Tx is allowed */
-        txallowed = 1U;
-      }
-      if ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout))
-      {
-        errorcode = HAL_TIMEOUT;
-        goto error;
-      }
-    }
-  }
-  /* Transmit and Receive data in 8 Bit mode */
-  else
-  {
-    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01U))
-    {
-      if (hspi->TxXferCount > 1U)
-      {
-        hspi->Instance->DR = *((uint16_t *)pTxData);
-        pTxData += sizeof(uint16_t);
-        hspi->TxXferCount -= 2U;
-      }
-      else
-      {
-        *(__IO uint8_t *)&hspi->Instance->DR = (*pTxData++);
-        hspi->TxXferCount--;
-      }
-    }
-    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
-    {
-      /* check TXE flag */
-      if (txallowed && (hspi->TxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)))
-      {
-        if (hspi->TxXferCount > 1U)
-        {
-          hspi->Instance->DR = *((uint16_t *)pTxData);
-          pTxData += sizeof(uint16_t);
-          hspi->TxXferCount -= 2U;
-        }
-        else
-        {
-          *(__IO uint8_t *)&hspi->Instance->DR = (*pTxData++);
-          hspi->TxXferCount--;
-        }
-        /* Next Data is a reception (Rx). Tx not allowed */
-        txallowed = 0U;
-
-#if (USE_SPI_CRC != 0U)
-        /* Enable CRC Transmission */
-        if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
-        {
-          /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */
-          if (((hspi->Instance->CR1 & SPI_CR1_MSTR) == 0U) && ((hspi->Instance->CR2 & SPI_CR2_NSSP) == SPI_CR2_NSSP))
-          {
-            SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM);
-          }
-          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-        }
-#endif /* USE_SPI_CRC */
-      }
-
-      /* Wait until RXNE flag is reset */
-      if ((hspi->RxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)))
-      {
-        if (hspi->RxXferCount > 1U)
-        {
-          *((uint16_t *)pRxData) = hspi->Instance->DR;
-          pRxData += sizeof(uint16_t);
-          hspi->RxXferCount -= 2U;
-          if (hspi->RxXferCount <= 1U)
-          {
-            /* set fiforxthresold before to switch on 8 bit data size */
-            SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-          }
-        }
-        else
-        {
-          (*(uint8_t *)pRxData++) = *(__IO uint8_t *)&hspi->Instance->DR;
-          hspi->RxXferCount--;
-        }
-        /* Next Data is a Transmission (Tx). Tx is allowed */
-        txallowed = 1U;
-      }
-      if ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout))
-      {
-        errorcode = HAL_TIMEOUT;
-        goto error;
-      }
-    }
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Read CRC from DR to close CRC calculation process */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    /* Wait until TXE flag */
-    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
-    {
-      /* Error on the CRC reception */
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-      errorcode = HAL_TIMEOUT;
-      goto error;
-    }
-    /* Read CRC */
-    if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
-    {
-      tmpreg = hspi->Instance->DR;
-      /* To avoid GCC warning */
-      UNUSED(tmpreg);
-    }
-    else
-    {
-      tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-      /* To avoid GCC warning */
-      UNUSED(tmpreg);
-
-      if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
-      {
-        if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
-        {
-          /* Error on the CRC reception */
-          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-          errorcode = HAL_TIMEOUT;
-          goto error;
-        }
-        tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-        /* To avoid GCC warning */
-        UNUSED(tmpreg);
-      }
-    }
-  }
-
-  /* Check if CRC error occurred */
-  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-    /* Clear CRC Flag */
-    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-
-    errorcode = HAL_ERROR;
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Check the end of the transaction */
-  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
-  }
-
-  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-  {
-    errorcode = HAL_ERROR;
-  }
-
-error :
-  hspi->State = HAL_SPI_STATE_READY;
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Transmit an amount of data in non-blocking mode with Interrupt.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size > 1U))
-  {
-    /* in this case, 16-bit access is performed on Data
-       So, check Data is 16-bit aligned address */
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pData));
-  }
-
-  /* Check Direction parameter */
-  assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
-
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  if ((pData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  if (hspi->State != HAL_SPI_STATE_READY)
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  /* Set the transaction information */
-  hspi->State       = HAL_SPI_STATE_BUSY_TX;
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = (uint8_t *)pData;
-  hspi->TxXferSize  = Size;
-  hspi->TxXferCount = Size;
-
-  /* Init field not used in handle to zero */
-  hspi->pRxBuffPtr  = (uint8_t *)NULL;
-  hspi->RxXferSize  = 0U;
-  hspi->RxXferCount = 0U;
-  hspi->RxISR       = NULL;
-
-  /* Set the function for IT treatment */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    hspi->TxISR = SPI_TxISR_16BIT;
-  }
-  else
-  {
-    hspi->TxISR = SPI_TxISR_8BIT;
-  }
-
-  /* Configure communication direction : 1Line */
-  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
-  {
-    SPI_1LINE_TX(hspi);
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SPI_RESET_CRC(hspi);
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Enable TXE and ERR interrupt */
-  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
-
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-error :
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Receive an amount of data in non-blocking mode with Interrupt.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size > 1U))
-  {
-    /* in this case, 16-bit access is performed on Data
-       So, check Data is 16-bit aligned address */
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pData));
-  }
-
-  if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
-  {
-    hspi->State = HAL_SPI_STATE_BUSY_RX;
-    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
-    return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
-  }
-
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  if (hspi->State != HAL_SPI_STATE_READY)
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Set the transaction information */
-  hspi->State       = HAL_SPI_STATE_BUSY_RX;
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = (uint8_t *)pData;
-  hspi->RxXferSize  = Size;
-  hspi->RxXferCount = Size;
-
-  /* Init field not used in handle to zero */
-  hspi->pTxBuffPtr  = (uint8_t *)NULL;
-  hspi->TxXferSize  = 0U;
-  hspi->TxXferCount = 0U;
-  hspi->TxISR       = NULL;
-
-  /* Check the data size to adapt Rx threshold and the set the function for IT treatment */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    /* Set fiforxthresold according the reception data length: 16 bit */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-    hspi->RxISR = SPI_RxISR_16BIT;
-  }
-  else
-  {
-    /* Set fiforxthresold according the reception data length: 8 bit */
-    SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-    hspi->RxISR = SPI_RxISR_8BIT;
-  }
-
-  /* Configure communication direction : 1Line */
-  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
-  {
-    SPI_1LINE_RX(hspi);
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    hspi->CRCSize = 1U;
-    if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
-    {
-      hspi->CRCSize = 2U;
-    }
-    SPI_RESET_CRC(hspi);
-  }
-  else
-  {
-    hspi->CRCSize = 0U;
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Enable TXE and ERR interrupt */
-  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-
-  /* Note : The SPI must be enabled after unlocking current process
-            to avoid the risk of SPI interrupt handle execution before current
-            process unlock */
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-error :
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Transmit and Receive an amount of data in non-blocking mode with Interrupt.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pTxData pointer to transmission data buffer
-  * @param  pRxData pointer to reception data buffer
-  * @param  Size amount of data to be sent and received
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
-{
-  uint32_t tmp = 0U, tmp1 = 0U;
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size > 1U))
-  {
-    /* in this case, 16-bit access is performed on Data
-       So, check Data is 16-bit aligned address */
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pTxData));
-    assert_param(IS_SPI_16BIT_ALIGNED_ADDRESS(pRxData));
-  }
-
-  /* Check Direction parameter */
-  assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
-
-  /* Process locked */
-  __HAL_LOCK(hspi);
-
-  tmp  = hspi->State;
-  tmp1 = hspi->Init.Mode;
-
-  if (!((tmp == HAL_SPI_STATE_READY) || \
-        ((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
-  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
-  {
-    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
-  }
-
-  /* Set the transaction information */
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
-  hspi->TxXferSize  = Size;
-  hspi->TxXferCount = Size;
-  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
-  hspi->RxXferSize  = Size;
-  hspi->RxXferCount = Size;
-
-  /* Set the function for IT treatment */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    hspi->RxISR     = SPI_2linesRxISR_16BIT;
-    hspi->TxISR     = SPI_2linesTxISR_16BIT;
-  }
-  else
-  {
-    hspi->RxISR     = SPI_2linesRxISR_8BIT;
-    hspi->TxISR     = SPI_2linesTxISR_8BIT;
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    hspi->CRCSize = 1U;
-    if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
-    {
-      hspi->CRCSize = 2U;
-    }
-    SPI_RESET_CRC(hspi);
-  }
-  else
-  {
-    hspi->CRCSize = 0U;
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Check if packing mode is enabled and if there is more than 2 data to receive */
-  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount >= 2U))
-  {
-    /* Set fiforxthresold according the reception data length: 16 bit */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-  else
-  {
-    /* Set fiforxthresold according the reception data length: 8 bit */
-    SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-
-  /* Enable TXE, RXNE and ERR interrupt */
-  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-error :
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Transmit an amount of data in non-blocking mode with DMA.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @param  Size amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  /* check tx dma handle */
-  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
-
-  /* Check Direction parameter */
-  assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
-
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  if (hspi->State != HAL_SPI_STATE_READY)
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Set the transaction information */
-  hspi->State       = HAL_SPI_STATE_BUSY_TX;
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = (uint8_t *)pData;
-  hspi->TxXferSize  = Size;
-  hspi->TxXferCount = Size;
-
-  /* Init field not used in handle to zero */
-  hspi->pRxBuffPtr  = (uint8_t *)NULL;
-  hspi->TxISR       = NULL;
-  hspi->RxISR       = NULL;
-  hspi->RxXferSize  = 0U;
-  hspi->RxXferCount = 0U;
-
-  /* Configure communication direction : 1Line */
-  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
-  {
-    SPI_1LINE_TX(hspi);
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SPI_RESET_CRC(hspi);
-  }
-#endif /* USE_SPI_CRC */
-
-  /* Set the SPI TxDMA Half transfer complete callback */
-  hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
-
-  /* Set the SPI TxDMA transfer complete callback */
-  hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
-
-  /* Set the DMA error callback */
-  hspi->hdmatx->XferErrorCallback = SPI_DMAError;
-
-  /* Set the DMA AbortCpltCallback */
-  hspi->hdmatx->XferAbortCallback = NULL;
-
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-  /* Packing mode is enabled only if the DMA setting is HALWORD */
-  if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
-  {
-    /* Check the even/odd of the data size + crc if enabled */
-    if ((hspi->TxXferCount & 0x1U) == 0U)
-    {
-      CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-      hspi->TxXferCount = (hspi->TxXferCount >> 1U);
-    }
-    else
-    {
-      SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-      hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U;
-    }
-  }
-
-  /* Enable the Tx DMA Stream/Channel */
-  HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-  /* Enable the SPI Error Interrupt Bit */
-  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
-
-  /* Enable Tx DMA Request */
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-error :
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Receive an amount of data in non-blocking mode with DMA.
-  * @note   In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pData pointer to data buffer
-  * @note   When the CRC feature is enabled the pData Length must be Size + 1.
-  * @param  Size amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
-{
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  /* check rx dma handle */
-  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
-
-  if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
-  {
-    hspi->State = HAL_SPI_STATE_BUSY_RX;
-
-    /* check tx dma handle */
-    assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
-
-    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
-    return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
-  }
-
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  if (hspi->State != HAL_SPI_STATE_READY)
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Set the transaction information */
-  hspi->State       = HAL_SPI_STATE_BUSY_RX;
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = (uint8_t *)pData;
-  hspi->RxXferSize  = Size;
-  hspi->RxXferCount = Size;
-
-  /*Init field not used in handle to zero */
-  hspi->RxISR       = NULL;
-  hspi->TxISR       = NULL;
-  hspi->TxXferSize  = 0U;
-  hspi->TxXferCount = 0U;
-
-  /* Configure communication direction : 1Line */
-  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
-  {
-    SPI_1LINE_RX(hspi);
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SPI_RESET_CRC(hspi);
-  }
-#endif /* USE_SPI_CRC */
-
-#if defined (STM32F030x6) || defined (STM32F030x8) || defined (STM32F031x6)|| defined (STM32F038xx) || defined (STM32F051x8) || defined (STM32F058xx)
-  /* Packing mode management is enabled by the DMA settings */
-  if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
-  {
-    /* Restriction the DMA data received is not allowed in this mode */
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-#endif
-
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    /* Set fiforxthresold according the reception data length: 16bit */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-  else
-  {
-    /* Set fiforxthresold according the reception data length: 8bit */
-    SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-
-    if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
-    {
-      /* set fiforxthresold according the reception data length: 16bit */
-      CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-
-      if ((hspi->RxXferCount & 0x1U) == 0x0U)
-      {
-        CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = hspi->RxXferCount >> 1U;
-      }
-      else
-      {
-        SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U;
-      }
-    }
-  }
-
-  /* Set the SPI RxDMA Half transfer complete callback */
-  hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
-
-  /* Set the SPI Rx DMA transfer complete callback */
-  hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
-
-  /* Set the DMA error callback */
-  hspi->hdmarx->XferErrorCallback = SPI_DMAError;
-
-  /* Set the DMA AbortCpltCallback */
-  hspi->hdmarx->XferAbortCallback = NULL;
-
-  /* Enable the Rx DMA Stream/Channel  */
-  HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-
-  /* Enable the SPI Error Interrupt Bit */
-  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
-
-  /* Enable Rx DMA Request */
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-error:
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Transmit and Receive an amount of data in non-blocking mode with DMA.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  pTxData pointer to transmission data buffer
-  * @param  pRxData pointer to reception data buffer
-  * @note   When the CRC feature is enabled the pRxData Length must be Size + 1
-  * @param  Size amount of data to be sent
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
-                                              uint16_t Size)
-{
-  uint32_t tmp = 0U, tmp1 = 0U;
-  HAL_StatusTypeDef errorcode = HAL_OK;
-
-  /* check rx & tx dma handles */
-  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
-  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
-
-  /* Check Direction parameter */
-  assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
-
-  /* Process locked */
-  __HAL_LOCK(hspi);
-
-  tmp  = hspi->State;
-  tmp1 = hspi->Init.Mode;
-  if (!((tmp == HAL_SPI_STATE_READY) ||
-        ((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
-  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
-  {
-    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
-  }
-
-  /* Set the transaction information */
-  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
-  hspi->TxXferSize  = Size;
-  hspi->TxXferCount = Size;
-  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
-  hspi->RxXferSize  = Size;
-  hspi->RxXferCount = Size;
-
-  /* Init field not used in handle to zero */
-  hspi->RxISR       = NULL;
-  hspi->TxISR       = NULL;
-
-#if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation */
-  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    SPI_RESET_CRC(hspi);
-  }
-#endif /* USE_SPI_CRC */
-
-#if defined (STM32F030x6) || defined (STM32F030x8) || defined (STM32F031x6) || defined (STM32F038xx) || defined (STM32F051x8) || defined (STM32F058xx)
-  /* packing mode management is enabled by the DMA settings */
-  if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
-  {
-    /* Restriction the DMA data received is not allowed in this mode */
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-#endif
-
-
-  /* Reset the threshold bit */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX | SPI_CR2_LDMARX);
-
-  /* The packing mode management is enabled by the DMA settings according the spi data size */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    /* Set fiforxthreshold according the reception data length: 16bit */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-  else
-  {
-    /* Set fiforxthresold according the reception data length: 8bit */
-    SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-
-    if (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
-    {
-      if ((hspi->TxXferSize & 0x1U) == 0x0U)
-      {
-        CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-        hspi->TxXferCount = hspi->TxXferCount >> 1U;
-      }
-      else
-      {
-        SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-        hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U;
-      }
-    }
-
-    if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
-    {
-      /* Set fiforxthresold according the reception data length: 16bit */
-      CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-
-      if ((hspi->RxXferCount & 0x1U) == 0x0U)
-      {
-        CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = hspi->RxXferCount >> 1U;
-      }
-      else
-      {
-        SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U;
-      }
-    }
-  }
-
-  /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
-  if (hspi->State == HAL_SPI_STATE_BUSY_RX)
-  {
-    /* Set the SPI Rx DMA Half transfer complete callback */
-    hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
-    hspi->hdmarx->XferCpltCallback     = SPI_DMAReceiveCplt;
-  }
-  else
-  {
-    /* Set the SPI Tx/Rx DMA Half transfer complete callback */
-    hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
-    hspi->hdmarx->XferCpltCallback     = SPI_DMATransmitReceiveCplt;
-  }
-
-  /* Set the DMA error callback */
-  hspi->hdmarx->XferErrorCallback = SPI_DMAError;
-
-  /* Set the DMA AbortCpltCallback */
-  hspi->hdmarx->XferAbortCallback = NULL;
-
-  /* Enable the Rx DMA Stream/Channel  */
-  HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
-
-  /* Enable Rx DMA Request */
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-  /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
-  is performed in DMA reception complete callback  */
-  hspi->hdmatx->XferHalfCpltCallback = NULL;
-  hspi->hdmatx->XferCpltCallback     = NULL;
-  hspi->hdmatx->XferErrorCallback    = NULL;
-  hspi->hdmatx->XferAbortCallback    = NULL;
-
-  /* Enable the Tx DMA Stream/Channel  */
-  HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
-
-  /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
-    __HAL_SPI_ENABLE(hspi);
-  }
-  /* Enable the SPI Error Interrupt Bit */
-  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
-
-  /* Enable Tx DMA Request */
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-error :
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-  return errorcode;
-}
-
-/**
-  * @brief  Abort ongoing transfer (blocking mode).
-  * @param  hspi SPI handle.
-  * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
-  *         started in Interrupt or DMA mode.
-  *         This procedure performs following operations :
-  *           - Disable SPI Interrupts (depending of transfer direction)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
-{
-  HAL_StatusTypeDef errorcode;
-  __IO uint32_t count, resetcount;
-
-  /* Initialized local variable  */
-  errorcode = HAL_OK;
-  resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
-  count = resetcount;
-
-  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
-  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
-  {
-    hspi->TxISR = SPI_AbortTx_ISR;
-    /* Wait HAL_SPI_STATE_ABORT state */
-    do
-    {
-      if (count-- == 0U)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
-        break;
-      }
-    }
-    while (hspi->State != HAL_SPI_STATE_ABORT);
-    /* Reset Timeout Counter */
-    count = resetcount;
-  }
-
-  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
-  {
-    hspi->RxISR = SPI_AbortRx_ISR;
-    /* Wait HAL_SPI_STATE_ABORT state */
-    do
-    {
-      if (count-- == 0U)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
-        break;
-      }
-    }
-    while (hspi->State != HAL_SPI_STATE_ABORT);
-    /* Reset Timeout Counter */
-    count = resetcount;
-  }
-
-  /* Clear ERRIE interrupts in case of DMA Mode */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
-
-  /* Disable the SPI DMA Tx or SPI DMA Rx request if enabled */
-  if ((HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)))
-  {
-    /* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */
-    if (hspi->hdmatx != NULL)
-    {
-      /* Set the SPI DMA Abort callback :
-      will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
-      hspi->hdmatx->XferAbortCallback = NULL;
-
-      /* Abort DMA Tx Handle linked to SPI Peripheral */
-      if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK)
-      {
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-
-      /* Disable Tx DMA Request */
-      CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN));
-
-      if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-      {
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-
-      /* Disable SPI Peripheral */
-      __HAL_SPI_DISABLE(hspi);
-
-      /* Empty the FRLVL fifo */
-      if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-      {
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-    }
-    /* Abort the SPI DMA Rx Stream/Channel : use blocking DMA Abort API (no callback) */
-    if (hspi->hdmarx != NULL)
-    {
-      /* Set the SPI DMA Abort callback :
-      will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
-      hspi->hdmarx->XferAbortCallback = NULL;
-
-      /* Abort DMA Rx Handle linked to SPI Peripheral */
-      if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK)
-      {
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-
-      /* Disable peripheral */
-      __HAL_SPI_DISABLE(hspi);
-
-      /* Control the BSY flag */
-      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-      {
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-
-      /* Empty the FRLVL fifo */
-      if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-      {
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-
-      /* Disable Rx DMA Request */
-      CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN));
-    }
-  }
-  /* Reset Tx and Rx transfer counters */
-  hspi->RxXferCount = 0U;
-  hspi->TxXferCount = 0U;
-
-  /* Check error during Abort procedure */
-  if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
-  {
-    /* return HAL_Error in case of error during Abort procedure */
-    errorcode = HAL_ERROR;
-  }
-  else
-  {
-    /* Reset errorCode */
-    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  }
-
-  /* Clear the Error flags in the SR register */
-  __HAL_SPI_CLEAR_OVRFLAG(hspi);
-  __HAL_SPI_CLEAR_FREFLAG(hspi);
-
-  /* Restore hspi->state to ready */
-  hspi->State = HAL_SPI_STATE_READY;
-
-  return errorcode;
-}
-
-/**
-  * @brief  Abort ongoing transfer (Interrupt mode).
-  * @param  hspi SPI handle.
-  * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
-  *         started in Interrupt or DMA mode.
-  *         This procedure performs following operations :
-  *           - Disable SPI Interrupts (depending of transfer direction)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
-{
-  HAL_StatusTypeDef errorcode;
-  uint32_t abortcplt ;
-  __IO uint32_t count, resetcount;
-
-  /* Initialized local variable  */
-  errorcode = HAL_OK;
-  abortcplt = 1U;
-  resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
-  count = resetcount;
-
-  /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */
-  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
-  {
-    hspi->TxISR = SPI_AbortTx_ISR;
-    /* Wait HAL_SPI_STATE_ABORT state */
-    do
-    {
-      if (count-- == 0U)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
-        break;
-      }
-    }
-    while (hspi->State != HAL_SPI_STATE_ABORT);
-    /* Reset Timeout Counter */
-    count = resetcount;
-  }
-
-  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
-  {
-    hspi->RxISR = SPI_AbortRx_ISR;
-    /* Wait HAL_SPI_STATE_ABORT state */
-    do
-    {
-      if (count-- == 0U)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
-        break;
-      }
-    }
-    while (hspi->State != HAL_SPI_STATE_ABORT);
-    /* Reset Timeout Counter */
-    count = resetcount;
-  }
-
-  /* Clear ERRIE interrupts in case of DMA Mode */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if (hspi->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
-    {
-      hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback;
-    }
-    else
-    {
-      hspi->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if (hspi->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
-    {
-      hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback;
-    }
-    else
-    {
-      hspi->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-
-  /* Disable the SPI DMA Tx or the SPI Rx request if enabled */
-  if ((HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) && (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)))
-  {
-    /* Abort the SPI DMA Tx Stream/Channel */
-    if (hspi->hdmatx != NULL)
-    {
-      /* Abort DMA Tx Handle linked to SPI Peripheral */
-      if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
-      {
-        hspi->hdmatx->XferAbortCallback = NULL;
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-    /* Abort the SPI DMA Rx Stream/Channel */
-    if (hspi->hdmarx != NULL)
-    {
-      /* Abort DMA Rx Handle linked to SPI Peripheral */
-      if (HAL_DMA_Abort_IT(hspi->hdmarx) !=  HAL_OK)
-      {
-        hspi->hdmarx->XferAbortCallback = NULL;
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-        abortcplt = 1U;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* Disable the SPI DMA Tx or the SPI Rx request if enabled */
-  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
-  {
-    /* Abort the SPI DMA Tx Stream/Channel */
-    if (hspi->hdmatx != NULL)
-    {
-      /* Abort DMA Tx Handle linked to SPI Peripheral */
-      if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
-      {
-        hspi->hdmatx->XferAbortCallback = NULL;
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-  /* Disable the SPI DMA Tx or the SPI Rx request if enabled */
-  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
-  {
-    /* Abort the SPI DMA Rx Stream/Channel */
-    if (hspi->hdmarx != NULL)
-    {
-      /* Abort DMA Rx Handle linked to SPI Peripheral */
-      if (HAL_DMA_Abort_IT(hspi->hdmarx) !=  HAL_OK)
-      {
-        hspi->hdmarx->XferAbortCallback = NULL;
-        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  if (abortcplt == 1U)
-  {
-    /* Reset Tx and Rx transfer counters */
-    hspi->RxXferCount = 0U;
-    hspi->TxXferCount = 0U;
-
-    /* Check error during Abort procedure */
-    if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
-    {
-      /* return HAL_Error in case of error during Abort procedure */
-      errorcode = HAL_ERROR;
-    }
-    else
-    {
-      /* Reset errorCode */
-      hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-    }
-
-    /* Clear the Error flags in the SR register */
-    __HAL_SPI_CLEAR_OVRFLAG(hspi);
-    __HAL_SPI_CLEAR_FREFLAG(hspi);
-
-    /* Restore hspi->State to Ready */
-    hspi->State = HAL_SPI_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_SPI_AbortCpltCallback(hspi);
-  }
-
-  return errorcode;
-}
-
-/**
-  * @brief  Pause the DMA Transfer.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for the specified SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
-{
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  /* Disable the SPI DMA Tx & Rx requests */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Resume the DMA Transfer.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for the specified SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
-{
-  /* Process Locked */
-  __HAL_LOCK(hspi);
-
-  /* Enable the SPI DMA Tx & Rx requests */
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(hspi);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Stop the DMA Transfer.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for the specified SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
-     when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
-     and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
-     */
-
-  /* Abort the SPI DMA tx Stream/Channel  */
-  if (hspi->hdmatx != NULL)
-  {
-    HAL_DMA_Abort(hspi->hdmatx);
-  }
-  /* Abort the SPI DMA rx Stream/Channel  */
-  if (hspi->hdmarx != NULL)
-  {
-    HAL_DMA_Abort(hspi->hdmarx);
-  }
-
-  /* Disable the SPI DMA Tx & Rx requests */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
-  hspi->State = HAL_SPI_STATE_READY;
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle SPI interrupt request.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for the specified SPI module.
-  * @retval None
-  */
-void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
-{
-  uint32_t itsource = hspi->Instance->CR2;
-  uint32_t itflag   = hspi->Instance->SR;
-
-  /* SPI in mode Receiver ----------------------------------------------------*/
-  if (((itflag & SPI_FLAG_OVR) == RESET) &&
-      ((itflag & SPI_FLAG_RXNE) != RESET) && ((itsource & SPI_IT_RXNE) != RESET))
-  {
-    hspi->RxISR(hspi);
-    return;
-  }
-
-  /* SPI in mode Transmitter -------------------------------------------------*/
-  if (((itflag & SPI_FLAG_TXE) != RESET) && ((itsource & SPI_IT_TXE) != RESET))
-  {
-    hspi->TxISR(hspi);
-    return;
-  }
-
-  /* SPI in Error Treatment --------------------------------------------------*/
-  if (((itflag & (SPI_FLAG_MODF | SPI_FLAG_OVR | SPI_FLAG_FRE)) != RESET) && ((itsource & SPI_IT_ERR) != RESET))
-  {
-    /* SPI Overrun error interrupt occurred ----------------------------------*/
-    if ((itflag & SPI_FLAG_OVR) != RESET)
-    {
-      if (hspi->State != HAL_SPI_STATE_BUSY_TX)
-      {
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
-        __HAL_SPI_CLEAR_OVRFLAG(hspi);
-      }
-      else
-      {
-        __HAL_SPI_CLEAR_OVRFLAG(hspi);
-        return;
-      }
-    }
-
-    /* SPI Mode Fault error interrupt occurred -------------------------------*/
-    if ((itflag & SPI_FLAG_MODF) != RESET)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
-      __HAL_SPI_CLEAR_MODFFLAG(hspi);
-    }
-
-    /* SPI Frame error interrupt occurred ------------------------------------*/
-    if ((itflag & SPI_FLAG_FRE) != RESET)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
-      __HAL_SPI_CLEAR_FREFLAG(hspi);
-    }
-
-    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-    {
-      /* Disable all interrupts */
-      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
-
-      hspi->State = HAL_SPI_STATE_READY;
-      /* Disable the SPI DMA requests if enabled */
-      if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
-      {
-        CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
-
-        /* Abort the SPI DMA Rx channel */
-        if (hspi->hdmarx != NULL)
-        {
-          /* Set the SPI DMA Abort callback :
-          will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
-          hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
-          HAL_DMA_Abort_IT(hspi->hdmarx);
-        }
-        /* Abort the SPI DMA Tx channel */
-        if (hspi->hdmatx != NULL)
-        {
-          /* Set the SPI DMA Abort callback :
-          will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
-          hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
-          HAL_DMA_Abort_IT(hspi->hdmatx);
-        }
-      }
-      else
-      {
-        /* Call user error callback */
-        HAL_SPI_ErrorCallback(hspi);
-      }
-    }
-    return;
-  }
-}
-
-/**
-  * @brief Tx Transfer completed callback.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_TxCpltCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief Rx Transfer completed callback.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_RxCpltCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief Tx and Rx Transfer completed callback.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_TxRxCpltCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief Tx Half Transfer completed callback.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
-   */
-}
-
-/**
-  * @brief Rx Half Transfer completed callback.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
-   */
-}
-
-/**
-  * @brief Tx and Rx Half Transfer callback.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
-   */
-}
-
-/**
-  * @brief SPI error callback.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_ErrorCallback should be implemented in the user file
-   */
-  /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
-            and user can use HAL_SPI_GetError() API to check the latest error occurred
-   */
-}
-
-/**
-  * @brief  SPI Abort Complete callback.
-  * @param  hspi SPI handle.
-  * @retval None
-  */
-__weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hspi);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_SPI_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
-  * @brief   SPI control functions
-  *
-@verbatim
- ===============================================================================
-                      ##### Peripheral State and Errors functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to control the SPI.
-     (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
-     (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the SPI handle state.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval SPI state
-  */
-HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
-{
-  /* Return SPI handle state */
-  return hspi->State;
-}
-
-/**
-  * @brief  Return the SPI error code.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval SPI error code in bitmap format
-  */
-uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
-{
-  /* Return SPI ErrorCode */
-  return hspi->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup SPI_Private_Functions
-  * @brief   Private functions
-  * @{
-  */
-
-/**
-  * @brief DMA SPI transmit process complete callback.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-  uint32_t tickstart = 0U;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* DMA Normal Mode */
-  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
-  {
-    /* Disable ERR interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
-
-    /* Disable Tx DMA Request */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-    /* Check the end of the transaction */
-    if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    /* Clear overrun flag in 2 Lines communication mode because received data is not read */
-    if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
-    {
-      __HAL_SPI_CLEAR_OVRFLAG(hspi);
-    }
-
-    hspi->TxXferCount = 0U;
-    hspi->State = HAL_SPI_STATE_READY;
-
-    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-    {
-      HAL_SPI_ErrorCallback(hspi);
-      return;
-    }
-  }
-  HAL_SPI_TxCpltCallback(hspi);
-}
-
-/**
-  * @brief DMA SPI receive process complete callback.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-  uint32_t tickstart = 0U;
-#if (USE_SPI_CRC != 0U)
-  __IO uint16_t tmpreg = 0U;
-#endif /* USE_SPI_CRC */
-
-  /* Init tickstart for timeout management*/
-  tickstart = HAL_GetTick();
-
-  /* DMA Normal Mode */
-  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
-  {
-    /* Disable ERR interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
-
-#if (USE_SPI_CRC != 0U)
-    /* CRC handling */
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Wait until RXNE flag */
-      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-      {
-        /* Error on the CRC reception */
-        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-      }
-      /* Read CRC */
-      if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-      {
-        tmpreg = hspi->Instance->DR;
-        /* To avoid GCC warning */
-        UNUSED(tmpreg);
-      }
-      else
-      {
-        tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-        /* To avoid GCC warning */
-        UNUSED(tmpreg);
-
-        if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
-        {
-          if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-          {
-            /* Error on the CRC reception */
-            SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-          }
-          tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-          /* To avoid GCC warning */
-          UNUSED(tmpreg);
-        }
-      }
-    }
-#endif /* USE_SPI_CRC */
-
-    /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
-
-    /* Check the end of the transaction */
-    if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-    {
-      hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
-    }
-
-    hspi->RxXferCount = 0U;
-    hspi->State = HAL_SPI_STATE_READY;
-
-#if (USE_SPI_CRC != 0U)
-    /* Check if CRC error occurred */
-    if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-      __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-    }
-#endif /* USE_SPI_CRC */
-
-    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-    {
-      HAL_SPI_ErrorCallback(hspi);
-      return;
-    }
-  }
-  HAL_SPI_RxCpltCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI transmit receive process complete callback.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-  uint32_t tickstart = 0U;
-#if (USE_SPI_CRC != 0U)
-  __IO int16_t tmpreg = 0U;
-#endif /* USE_SPI_CRC */
-  /* Init tickstart for timeout management*/
-  tickstart = HAL_GetTick();
-
-  /* DMA Normal Mode */
-  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
-  {
-    /* Disable ERR interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
-
-#if (USE_SPI_CRC != 0U)
-    /* CRC handling */
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BIT))
-      {
-        if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT_TIMEOUT,
-                                          tickstart) != HAL_OK)
-        {
-          /* Error on the CRC reception */
-          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-        }
-        /* Read CRC to Flush DR and RXNE flag */
-        tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-        /* To avoid GCC warning */
-        UNUSED(tmpreg);
-      }
-      else
-      {
-        if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-        {
-          /* Error on the CRC reception */
-          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-        }
-        /* Read CRC to Flush DR and RXNE flag */
-        tmpreg = hspi->Instance->DR;
-        /* To avoid GCC warning */
-        UNUSED(tmpreg);
-      }
-    }
-#endif /* USE_SPI_CRC */
-
-    /* Check the end of the transaction */
-    if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    }
-
-    /* Disable Rx/Tx DMA Request */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
-
-    hspi->TxXferCount = 0U;
-    hspi->RxXferCount = 0U;
-    hspi->State = HAL_SPI_STATE_READY;
-
-#if (USE_SPI_CRC != 0U)
-    /* Check if CRC error occurred */
-    if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-      __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-    }
-#endif /* USE_SPI_CRC */
-
-    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-    {
-      HAL_SPI_ErrorCallback(hspi);
-      return;
-    }
-  }
-  HAL_SPI_TxRxCpltCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI half transmit process complete callback.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  HAL_SPI_TxHalfCpltCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI half receive process complete callback
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  HAL_SPI_RxHalfCpltCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI half transmit receive process complete callback.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  HAL_SPI_TxRxHalfCpltCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI communication error callback.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA module.
-  * @retval None
-  */
-static void SPI_DMAError(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Stop the disable DMA transfer on SPI side */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
-
-  SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
-  hspi->State = HAL_SPI_STATE_READY;
-  HAL_SPI_ErrorCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-  hspi->RxXferCount = 0U;
-  hspi->TxXferCount = 0U;
-
-  HAL_SPI_ErrorCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  hspi->hdmatx->XferAbortCallback = NULL;
-
-  /* Disable Tx DMA Request */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
-
-  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  /* Disable SPI Peripheral */
-  __HAL_SPI_DISABLE(hspi);
-
-  /* Empty the FRLVL fifo */
-  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  /* Check if an Abort process is still ongoing */
-  if (hspi->hdmarx != NULL)
-  {
-    if (hspi->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-
-  /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
-  hspi->RxXferCount = 0U;
-  hspi->TxXferCount = 0U;
-
-  /* Check no error during Abort procedure */
-  if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
-  {
-    /* Reset errorCode */
-    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  }
-
-  /* Clear the Error flags in the SR register */
-  __HAL_SPI_CLEAR_OVRFLAG(hspi);
-  __HAL_SPI_CLEAR_FREFLAG(hspi);
-
-  /* Restore hspi->State to Ready */
-  hspi->State  = HAL_SPI_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SPI_AbortCpltCallback(hspi);
-}
-
-/**
-  * @brief  DMA SPI Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
-
-  /* Disable SPI Peripheral */
-  __HAL_SPI_DISABLE(hspi);
-
-  hspi->hdmarx->XferAbortCallback = NULL;
-
-  /* Disable Rx DMA Request */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-  /* Control the BSY flag */
-  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  /* Empty the FRLVL fifo */
-  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  /* Check if an Abort process is still ongoing */
-  if (hspi->hdmatx != NULL)
-  {
-    if (hspi->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-
-  /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
-  hspi->RxXferCount = 0U;
-  hspi->TxXferCount = 0U;
-
-  /* Check no error during Abort procedure */
-  if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
-  {
-    /* Reset errorCode */
-    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  }
-
-  /* Clear the Error flags in the SR register */
-  __HAL_SPI_CLEAR_OVRFLAG(hspi);
-  __HAL_SPI_CLEAR_FREFLAG(hspi);
-
-  /* Restore hspi->State to Ready */
-  hspi->State  = HAL_SPI_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_SPI_AbortCpltCallback(hspi);
-}
-
-/**
-  * @brief  Rx 8-bit handler for Transmit and Receive in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  /* Receive data in packing mode */
-  if (hspi->RxXferCount > 1U)
-  {
-    *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
-    hspi->pRxBuffPtr += sizeof(uint16_t);
-    hspi->RxXferCount -= 2U;
-    if (hspi->RxXferCount == 1U)
-    {
-      /* set fiforxthresold according the reception data length: 8bit */
-      SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-    }
-  }
-  /* Receive data in 8 Bit mode */
-  else
-  {
-    *hspi->pRxBuffPtr++ = *((__IO uint8_t *)&hspi->Instance->DR);
-    hspi->RxXferCount--;
-  }
-
-  /* check end of the reception */
-  if (hspi->RxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-      hspi->RxISR =  SPI_2linesRxISR_8BITCRC;
-      return;
-    }
-#endif /* USE_SPI_CRC */
-
-    /* Disable RXNE  and ERR interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-
-    if (hspi->TxXferCount == 0U)
-    {
-      SPI_CloseRxTx_ISR(hspi);
-    }
-  }
-}
-
-#if (USE_SPI_CRC != 0U)
-/**
-  * @brief  Rx 8-bit handler for Transmit and Receive in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
-{
-  __IO uint8_t tmpreg = 0U;
-
-  /* Read data register to flush CRC */
-  tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
-
-  /* To avoid GCC warning */
-  UNUSED(tmpreg);
-
-  hspi->CRCSize--;
-
-  /* check end of the reception */
-  if (hspi->CRCSize == 0U)
-  {
-    /* Disable RXNE and ERR interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-
-    if (hspi->TxXferCount == 0U)
-    {
-      SPI_CloseRxTx_ISR(hspi);
-    }
-  }
-}
-#endif /* USE_SPI_CRC */
-
-/**
-  * @brief  Tx 8-bit handler for Transmit and Receive in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  /* Transmit data in packing Bit mode */
-  if (hspi->TxXferCount >= 2U)
-  {
-    hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
-    hspi->pTxBuffPtr += sizeof(uint16_t);
-    hspi->TxXferCount -= 2U;
-  }
-  /* Transmit data in 8 Bit mode */
-  else
-  {
-    *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
-    hspi->TxXferCount--;
-  }
-
-  /* check the end of the transmission */
-  if (hspi->TxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Set CRC Next Bit to send CRC */
-      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-      /* Disable TXE interrupt */
-      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
-      return;
-    }
-#endif /* USE_SPI_CRC */
-
-    /* Disable TXE interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
-
-    if (hspi->RxXferCount == 0U)
-    {
-      SPI_CloseRxTx_ISR(hspi);
-    }
-  }
-}
-
-/**
-  * @brief  Rx 16-bit handler for Transmit and Receive in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  /* Receive data in 16 Bit mode */
-  *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
-  hspi->pRxBuffPtr += sizeof(uint16_t);
-  hspi->RxXferCount--;
-
-  if (hspi->RxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      hspi->RxISR =  SPI_2linesRxISR_16BITCRC;
-      return;
-    }
-#endif /* USE_SPI_CRC */
-
-    /* Disable RXNE interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
-
-    if (hspi->TxXferCount == 0U)
-    {
-      SPI_CloseRxTx_ISR(hspi);
-    }
-  }
-}
-
-#if (USE_SPI_CRC != 0U)
-/**
-  * @brief  Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
-{
-  /* Receive data in 16 Bit mode */
-  __IO uint16_t tmpreg = 0U;
-
-  /* Read data register to flush CRC */
-  tmpreg = hspi->Instance->DR;
-
-  /* To avoid GCC warning */
-  UNUSED(tmpreg);
-
-  /* Disable RXNE interrupt */
-  __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
-
-  SPI_CloseRxTx_ISR(hspi);
-}
-#endif /* USE_SPI_CRC */
-
-/**
-  * @brief  Tx 16-bit handler for Transmit and Receive in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  /* Transmit data in 16 Bit mode */
-  hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
-  hspi->pTxBuffPtr += sizeof(uint16_t);
-  hspi->TxXferCount--;
-
-  /* Enable CRC Transmission */
-  if (hspi->TxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Set CRC Next Bit to send CRC */
-      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-      /* Disable TXE interrupt */
-      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
-      return;
-    }
-#endif /* USE_SPI_CRC */
-
-    /* Disable TXE interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
-
-    if (hspi->RxXferCount == 0U)
-    {
-      SPI_CloseRxTx_ISR(hspi);
-    }
-  }
-}
-
-#if (USE_SPI_CRC != 0U)
-/**
-  * @brief  Manage the CRC 8-bit receive in Interrupt context.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
-{
-  __IO uint8_t tmpreg = 0U;
-
-  /* Read data register to flush CRC */
-  tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
-
-  /* To avoid GCC warning */
-  UNUSED(tmpreg);
-
-  hspi->CRCSize--;
-
-  if (hspi->CRCSize == 0U)
-  {
-    SPI_CloseRx_ISR(hspi);
-  }
-}
-#endif /* USE_SPI_CRC */
-
-/**
-  * @brief  Manage the receive 8-bit in Interrupt context.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  *hspi->pRxBuffPtr++ = (*(__IO uint8_t *)&hspi->Instance->DR);
-  hspi->RxXferCount--;
-
-#if (USE_SPI_CRC != 0U)
-  /* Enable CRC Transmission */
-  if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
-  {
-    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-  }
-#endif /* USE_SPI_CRC */
-
-  if (hspi->RxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      hspi->RxISR =  SPI_RxISR_8BITCRC;
-      return;
-    }
-#endif /* USE_SPI_CRC */
-    SPI_CloseRx_ISR(hspi);
-  }
-}
-
-#if (USE_SPI_CRC != 0U)
-/**
-  * @brief  Manage the CRC 16-bit receive in Interrupt context.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
-{
-  __IO uint16_t tmpreg = 0U;
-
-  /* Read data register to flush CRC */
-  tmpreg = hspi->Instance->DR;
-
-  /* To avoid GCC warning */
-  UNUSED(tmpreg);
-
-  /* Disable RXNE and ERR interrupt */
-  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-
-  SPI_CloseRx_ISR(hspi);
-}
-#endif /* USE_SPI_CRC */
-
-/**
-  * @brief  Manage the 16-bit receive in Interrupt context.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
-  hspi->pRxBuffPtr += sizeof(uint16_t);
-  hspi->RxXferCount--;
-
-#if (USE_SPI_CRC != 0U)
-  /* Enable CRC Transmission */
-  if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
-  {
-    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-  }
-#endif /* USE_SPI_CRC */
-
-  if (hspi->RxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      hspi->RxISR = SPI_RxISR_16BITCRC;
-      return;
-    }
-#endif /* USE_SPI_CRC */
-    SPI_CloseRx_ISR(hspi);
-  }
-}
-
-/**
-  * @brief  Handle the data 8-bit transmit in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
-  hspi->TxXferCount--;
-
-  if (hspi->TxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Enable CRC Transmission */
-      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-    }
-#endif /* USE_SPI_CRC */
-    SPI_CloseTx_ISR(hspi);
-  }
-}
-
-/**
-  * @brief  Handle the data 16-bit transmit in Interrupt mode.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
-{
-  /* Transmit data in 16 Bit mode */
-  hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
-  hspi->pTxBuffPtr += sizeof(uint16_t);
-  hspi->TxXferCount--;
-
-  if (hspi->TxXferCount == 0U)
-  {
-#if (USE_SPI_CRC != 0U)
-    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-    {
-      /* Enable CRC Transmission */
-      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
-    }
-#endif /* USE_SPI_CRC */
-    SPI_CloseTx_ISR(hspi);
-  }
-}
-
-/**
-  * @brief Handle SPI Communication Timeout.
-  * @param hspi pointer to a SPI_HandleTypeDef structure that contains
-  *              the configuration information for SPI module.
-  * @param Flag SPI flag to check
-  * @param State flag state to check
-  * @param Timeout Timeout duration
-  * @param Tickstart tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State,
-                                                       uint32_t Timeout, uint32_t Tickstart)
-{
-  while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
-  {
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) >= Timeout))
-      {
-        /* Disable the SPI and reset the CRC: the CRC value should be cleared
-        on both master and slave sides in order to resynchronize the master
-        and slave for their respective CRC calculation */
-
-        /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
-        __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-
-        if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
-                                                     || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-        {
-          /* Disable SPI peripheral */
-          __HAL_SPI_DISABLE(hspi);
-        }
-
-        /* Reset CRC Calculation */
-        if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-        {
-          SPI_RESET_CRC(hspi);
-        }
-
-        hspi->State = HAL_SPI_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hspi);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Handle SPI FIFO Communication Timeout.
-  * @param hspi pointer to a SPI_HandleTypeDef structure that contains
-  *              the configuration information for SPI module.
-  * @param Fifo Fifo to check
-  * @param State Fifo state to check
-  * @param Timeout Timeout duration
-  * @param Tickstart tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
-                                                       uint32_t Timeout, uint32_t Tickstart)
-{
-  __IO uint8_t tmpreg;
-
-  while ((hspi->Instance->SR & Fifo) != State)
-  {
-    if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
-    {
-      tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
-      /* To avoid GCC warning */
-      UNUSED(tmpreg);
-    }
-
-    if (Timeout != HAL_MAX_DELAY)
-    {
-      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) >= Timeout))
-      {
-        /* Disable the SPI and reset the CRC: the CRC value should be cleared
-           on both master and slave sides in order to resynchronize the master
-           and slave for their respective CRC calculation */
-
-        /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
-        __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-
-        if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
-                                                     || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-        {
-          /* Disable SPI peripheral */
-          __HAL_SPI_DISABLE(hspi);
-        }
-
-        /* Reset CRC Calculation */
-        if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-        {
-          SPI_RESET_CRC(hspi);
-        }
-
-        hspi->State = HAL_SPI_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hspi);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle the check of the RX transaction complete.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param  Timeout Timeout duration
-  * @param  Tickstart tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi,  uint32_t Timeout, uint32_t Tickstart)
-{
-  if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
-                                               || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-  {
-    /* Disable SPI peripheral */
-    __HAL_SPI_DISABLE(hspi);
-  }
-
-  /* Control the BSY flag */
-  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    return HAL_TIMEOUT;
-  }
-
-  if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
-                                               || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-  {
-    /* Empty the FRLVL fifo */
-    if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-      return HAL_TIMEOUT;
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle the check of the RXTX or TX transaction complete.
-  * @param  hspi SPI handle
-  * @param  Timeout Timeout duration
-  * @param  Tickstart tick start value
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
-{
-  /* Control if the TX fifo is empty */
-  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    return HAL_TIMEOUT;
-  }
-
-  /* Control the BSY flag */
-  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    return HAL_TIMEOUT;
-  }
-
-  /* Control if the RX fifo is empty */
-  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-    return HAL_TIMEOUT;
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle the end of the RXTX transaction.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
-{
-  uint32_t tickstart = 0U;
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* Disable ERR interrupt */
-  __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
-
-  /* Check the end of the transaction */
-  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-  }
-
-#if (USE_SPI_CRC != 0U)
-  /* Check if CRC error occurred */
-  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
-  {
-    hspi->State = HAL_SPI_STATE_READY;
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-    HAL_SPI_ErrorCallback(hspi);
-  }
-  else
-  {
-#endif /* USE_SPI_CRC */
-    if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
-    {
-      if (hspi->State == HAL_SPI_STATE_BUSY_RX)
-      {
-        hspi->State = HAL_SPI_STATE_READY;
-        HAL_SPI_RxCpltCallback(hspi);
-      }
-      else
-      {
-        hspi->State = HAL_SPI_STATE_READY;
-        HAL_SPI_TxRxCpltCallback(hspi);
-      }
-    }
-    else
-    {
-      hspi->State = HAL_SPI_STATE_READY;
-      HAL_SPI_ErrorCallback(hspi);
-    }
-#if (USE_SPI_CRC != 0U)
-  }
-#endif /* USE_SPI_CRC */
-}
-
-/**
-  * @brief  Handle the end of the RX transaction.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
-{
-  /* Disable RXNE and ERR interrupt */
-  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
-
-  /* Check the end of the transaction */
-  if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-  }
-  hspi->State = HAL_SPI_STATE_READY;
-
-#if (USE_SPI_CRC != 0U)
-  /* Check if CRC error occurred */
-  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
-    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-    HAL_SPI_ErrorCallback(hspi);
-  }
-  else
-  {
-#endif /* USE_SPI_CRC */
-    if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
-    {
-      HAL_SPI_RxCpltCallback(hspi);
-    }
-    else
-    {
-      HAL_SPI_ErrorCallback(hspi);
-    }
-#if (USE_SPI_CRC != 0U)
-  }
-#endif /* USE_SPI_CRC */
-}
-
-/**
-  * @brief  Handle the end of the TX transaction.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
-{
-  uint32_t tickstart = 0U;
-
-  /* Init tickstart for timeout management*/
-  tickstart = HAL_GetTick();
-
-  /* Disable TXE and ERR interrupt */
-  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
-
-  /* Check the end of the transaction */
-  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
-  {
-    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
-  }
-
-  /* Clear overrun flag in 2 Lines communication mode because received is not read */
-  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
-  {
-    __HAL_SPI_CLEAR_OVRFLAG(hspi);
-  }
-
-  hspi->State = HAL_SPI_STATE_READY;
-  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-  {
-    HAL_SPI_ErrorCallback(hspi);
-  }
-  else
-  {
-    HAL_SPI_TxCpltCallback(hspi);
-  }
-}
-
-/**
-  * @brief  Handle abort a Rx transaction.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi)
-{
-  __IO uint32_t count;
-
-  /* Disable SPI Peripheral */
-  __HAL_SPI_DISABLE(hspi);
-
-  count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
-
-  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
-  CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE));
-
-  /* Check RXNEIE is disabled */
-  do
-  {
-    if (count-- == 0U)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
-      break;
-    }
-  }
-  while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE));
-
-  /* Control the BSY flag */
-  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  /* Empty the FRLVL fifo */
-  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  hspi->State = HAL_SPI_STATE_ABORT;
-}
-
-/**
-  * @brief  Handle abort a Tx or Rx/Tx transaction.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @retval None
-  */
-static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi)
-{
-  __IO uint32_t count;
-
-  count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
-
-  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
-  CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE));
-
-  /* Check TXEIE is disabled */
-  do
-  {
-    if (count-- == 0U)
-    {
-      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
-      break;
-    }
-  }
-  while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE));
-
-  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  /* Disable SPI Peripheral */
-  __HAL_SPI_DISABLE(hspi);
-
-  /* Empty the FRLVL fifo */
-  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
-  }
-
-  hspi->State = HAL_SPI_STATE_ABORT;
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_spi_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_spi_ex.c
deleted file mode 100644
index 2ae2a39e..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_spi_ex.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_spi_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended SPI HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          SPI peripheral extended functionalities :
-  *           + IO operation functions
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup SPIEx SPIEx
-  * @brief SPI Extended HAL module driver
-  * @{
-  */
-#ifdef HAL_SPI_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private defines -----------------------------------------------------------*/
-/** @defgroup SPIEx_Private_Constants SPIEx Private Constants
-  * @{
-  */
-#define SPI_FIFO_SIZE       4
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
-  * @{
-  */
-
-/** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
-  *  @brief   Data transfers functions
-  *
-@verbatim
-  ==============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
- [..]
-    This subsection provides a set of extended functions to manage the SPI
-    data transfers.
-
-    (#) Rx data flush function:
-        (++) HAL_SPIEx_FlushRxFifo()
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Flush the RX fifo.
-  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for the specified SPI module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi)
-{
-  __IO uint32_t tmpreg;
-  uint8_t  count = 0U;
-  while ((hspi->Instance->SR & SPI_FLAG_FRLVL) !=  SPI_FRLVL_EMPTY)
-  {
-    count++;
-    tmpreg = hspi->Instance->DR;
-    UNUSED(tmpreg); /* To avoid GCC warning */
-    if (count == SPI_FIFO_SIZE)
-    {
-      return HAL_TIMEOUT;
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_tim.c b/lib/hal-stm32f0/source/stm32f0xx_hal_tim.c
deleted file mode 100644
index 459f3624..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_tim.c
+++ /dev/null
@@ -1,5495 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_tim.c
-  * @author  MCD Application Team
-  * @brief   TIM HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Timer (TIM) peripheral:
-  *           + Time Base Initialization
-  *           + Time Base Start
-  *           + Time Base Start Interruption
-  *           + Time Base Start DMA
-  *           + Time Output Compare/PWM Initialization
-  *           + Time Output Compare/PWM Channel Configuration
-  *           + Time Output Compare/PWM  Start
-  *           + Time Output Compare/PWM  Start Interruption
-  *           + Time Output Compare/PWM Start DMA
-  *           + Time Input Capture Initialization
-  *           + Time Input Capture Channel Configuration
-  *           + Time Input Capture Start
-  *           + Time Input Capture Start Interruption 
-  *           + Time Input Capture Start DMA
-  *           + Time One Pulse Initialization
-  *           + Time One Pulse Channel Configuration
-  *           + Time One Pulse Start 
-  *           + Time Encoder Interface Initialization
-  *           + Time Encoder Interface Start
-  *           + Time Encoder Interface Start Interruption
-  *           + Time Encoder Interface Start DMA
-  *           + Commutation Event configuration with Interruption and DMA
-  *           + Time OCRef clear configuration
-  *           + Time External Clock configuration
-  @verbatim
-  ==============================================================================
-                      ##### TIMER Generic features #####
-  ==============================================================================
-  [..] The Timer features include:
-       (#) 16-bit up, down, up/down auto-reload counter.
-       (#) 16-bit programmable prescaler allowing dividing (also on the fly) the 
-           counter clock frequency either by any factor between 1 and 65536.
-       (#) Up to 4 independent channels for:
-           (++) Input Capture
-           (++) Output Compare
-           (++) PWM generation (Edge and Center-aligned Mode)
-           (++) One-pulse mode output
-
-            ##### How to use this driver #####
-  ==============================================================================
-    [..]
-     (#) Initialize the TIM low level resources by implementing the following functions 
-         depending from feature used :
-           (++) Time Base : HAL_TIM_Base_MspInit()
-           (++) Input Capture : HAL_TIM_IC_MspInit()
-           (++) Output Compare : HAL_TIM_OC_MspInit()
-           (++) PWM generation : HAL_TIM_PWM_MspInit()
-           (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
-           (++) Encoder mode output : HAL_TIM_Encoder_MspInit()
-
-     (#) Initialize the TIM low level resources :
-        (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
-        (##) TIM pins configuration
-            (+++) Enable the clock for the TIM GPIOs using the following function:
-             __HAL_RCC_GPIOx_CLK_ENABLE();
-            (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
-
-     (#) The external Clock can be configured, if needed (the default clock is the 
-         internal clock from the APBx), using the following function:
-         HAL_TIM_ConfigClockSource, the clock configuration should be done before 
-         any start function.
-
-     (#) Configure the TIM in the desired functioning mode using one of the 
-       Initialization function of this driver:
-       (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
-       (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an 
-            Output Compare signal.
-       (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a 
-            PWM signal.
-       (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an 
-            external signal.
-         (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer 
-              in One Pulse Mode.
-       (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
-
-     (#) Activate the TIM peripheral using one of the start functions depending from the feature used:
-           (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT()
-           (++) Input Capture :  HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT()
-           (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT()
-           (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT()
-           (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT()
-           (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT().
-
-     (#) The DMA Burst is managed with the two following functions:
-         HAL_TIM_DMABurst_WriteStart()
-         HAL_TIM_DMABurst_ReadStart()
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup TIM TIM
-  * @brief TIM HAL module driver
-  * @{
-  */
-
-#ifdef HAL_TIM_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/** @defgroup TIM_Private_Functions TIM_Private_Functions
-  * @{
-  */
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
-static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter);
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
-static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter);
-static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter);
-static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t InputTriggerSource);
-static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
-static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
-static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
-                                     TIM_SlaveConfigTypeDef * sSlaveConfig);
-
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup TIM_Exported_Functions TIM Exported Functions
-  * @{
-  */
-
-/** @defgroup TIM_Exported_Functions_Group1 Time Base functions 
- *  @brief    Time Base functions 
- *
-@verbatim 
-  ==============================================================================
-              ##### Time Base functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM base.
-    (+) De-initialize the TIM base.
-    (+) Start the Time Base.
-    (+) Stop the Time Base.
-    (+) Start the Time Base and enable interrupt.
-    (+) Stop the Time Base and disable interrupt.
-    (+) Start the Time Base and enable DMA transfer.
-    (+) Stop the Time Base and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Time base Unit according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim TIM Base handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC */
-    HAL_TIM_Base_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Set the Time Base configuration */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM Base peripheral 
-  * @param  htim TIM Base handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_TIM_Base_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Base MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Base_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Base MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Base_MspDeInit could be implemented in the user file
-   */
-}
-
-
-/**
-  * @brief  Starts the TIM Base generation.
-  * @param  htim TIM handle
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Change the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Base generation.
-  * @param  htim TIM handle
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Base generation in interrupt mode.
-  * @param  htim TIM handle
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-   /* Enable the TIM Update interrupt */
-   __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
-
-   /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Base generation in interrupt mode.
-  * @param  htim TIM handle
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  /* Disable the TIM Update interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Base generation in DMA mode.
-  * @param  htim TIM handle
-  * @param  pData The source Buffer address.
-  * @param  Length The length of data to be transferred from memory to peripheral.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((pData == 0 ) && (Length > 0))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  /* Set the DMA Period elapsed callback */
-  htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
-
-  /* Set the DMA error callback */
-  htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-
-  /* Enable the DMA channel */
-  HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
-
-  /* Enable the TIM Update DMA request */
-  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Base generation in DMA mode.
-  * @param  htim TIM handle
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
-
-  /* Disable the TIM Update DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions 
- *  @brief    Time Output Compare functions 
- *
-@verbatim 
-  ==============================================================================
-                  ##### Time Output Compare functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM Output Compare.
-    (+) De-initialize the TIM Output Compare.
-    (+) Start the Time Output Compare.
-    (+) Stop the Time Output Compare.
-    (+) Start the Time Output Compare and enable interrupt.
-    (+) Stop the Time Output Compare and disable interrupt.
-    (+) Start the Time Output Compare and enable DMA transfer.
-    (+) Stop the Time Output Compare and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Output Compare according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim TIM Output Compare handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_OC_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Init the base time for the Output Compare */
-  TIM_Base_SetConfig(htim->Instance,  &htim->Init);
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM peripheral 
-  * @param  htim TIM Output Compare handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-   htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
-  HAL_TIM_OC_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Output Compare MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OC_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Output Compare MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OC_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation.
-  * @param  htim TIM Output Compare handle 
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected 
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Enable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Disable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation in interrupt mode.
-  * @param  htim TIM OC handle
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation in interrupt mode.
-  * @param  htim TIM Output Compare handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation in DMA mode.
-  * @param  htim TIM Output Compare handle
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData The source Buffer address.
-  * @param  Length The length of data to be transferred from memory to TIM peripheral
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if(((uint32_t)pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
-
-      /* Enable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
-
-      /* Enable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
-
-      /* Enable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-     /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
-
-      /* Enable the TIM Capture/Compare 4 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation in DMA mode.
-  * @param  htim TIM Output Compare handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Output compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group3 Time PWM functions 
- *  @brief    Time PWM functions 
- *
-@verbatim 
-  ==============================================================================
-                          ##### Time PWM functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM OPWM.
-    (+) De-initialize the TIM PWM.
-    (+) Start the Time PWM.
-    (+) Stop the Time PWM.
-    (+) Start the Time PWM and enable interrupt.
-    (+) Stop the Time PWM and disable interrupt.
-    (+) Start the Time PWM and enable DMA transfer.
-    (+) Stop the Time PWM and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM PWM Time Base according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_PWM_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Init the base time for the PWM */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM peripheral 
-  * @param  htim TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
-  HAL_TIM_PWM_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM PWM MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_PWM_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM PWM MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_PWM_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the PWM signal generation.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Enable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the PWM signal generation.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Disable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the PWM signal generation in interrupt mode.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the PWM signal generation in interrupt mode.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM PWM signal generation in DMA mode.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData The source Buffer address.
-  * @param  Length The length of data to be transferred from memory to TIM peripheral
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if(((uint32_t)pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
-
-      /* Enable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
-
-      /* Enable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
-
-      /* Enable the TIM Output Capture/Compare 3 request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-     /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
-
-      /* Enable the TIM Capture/Compare 4 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM PWM signal generation in DMA mode.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Capture compare channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions 
- *  @brief    Time Input Capture functions 
- *
-@verbatim 
-  ==============================================================================
-              ##### Time Input Capture functions #####
-  ==============================================================================
- [..]
-   This section provides functions allowing to:
-   (+) Initialize and configure the TIM Input Capture.
-   (+) De-initialize the TIM Input Capture.
-   (+) Start the Time Input Capture.
-   (+) Stop the Time Input Capture.
-   (+) Start the Time Input Capture and enable interrupt.
-   (+) Stop the Time Input Capture and disable interrupt.
-   (+) Start the Time Input Capture and enable DMA transfer.
-   (+) Stop the Time Input Capture and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Input Capture Time base according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim TIM Input Capture handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_IC_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Init the base time for the input capture */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM peripheral 
-  * @param  htim TIM Input Capture handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
-  HAL_TIM_IC_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Input Capture MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_IC_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Input Capture MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_IC_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM Input Capture measurement.
-  * @param  htim TIM Input Capture handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Enable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Input Capture measurement.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  /* Disable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Input Capture measurement in interrupt mode.
-  * @param  htim TIM Input Capture handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-  /* Enable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Input Capture measurement in interrupt mode.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Input Capture measurement in DMA mode.
-  * @param  htim TIM Input Capture handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData The destination Buffer address.
-  * @param  Length The length of data to be transferred from TIM peripheral to memory.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 2  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 3  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
-
-      /* Enable the TIM Capture/Compare 4  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Input Capture measurement in DMA mode.
-  * @param  htim TIM Input Capture handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3  DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4  DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Input Capture channel */
-  TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions 
- *  @brief    Time One Pulse functions 
- *
-@verbatim 
-  ==============================================================================
-                        ##### Time One Pulse functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM One Pulse.
-    (+) De-initialize the TIM One Pulse.
-    (+) Start the Time One Pulse.
-    (+) Stop the Time One Pulse.
-    (+) Start the Time One Pulse and enable interrupt.
-    (+) Stop the Time One Pulse and disable interrupt.
-    (+) Start the Time One Pulse and enable DMA transfer.
-    (+) Stop the Time One Pulse and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM One Pulse Time Base according to the specified
-  *         parameters in the TIM_HandleTypeDef and create the associated handle.
-  * @param  htim TIM OnePulse handle
-  * @param  OnePulseMode Select the One pulse mode.
-  *         This parameter can be one of the following values:
-  *            @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
-  *            @arg TIM_OPMODE_REPETITIVE: Repetitive pulses wil be generated.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
-{
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_OPM_MODE(OnePulseMode));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_OnePulse_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Configure the Time base in the One Pulse Mode */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Reset the OPM Bit */
-  htim->Instance->CR1 &= ~TIM_CR1_OPM;
-
-  /* Configure the OPM Mode */
-  htim->Instance->CR1 |= OnePulseMode;
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM One Pulse 
-  * @param  htim TIM One Pulse handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_TIM_OnePulse_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM One Pulse MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OnePulse_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM One Pulse MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM One Pulse signal generation.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Enable the Capture compare and the Input Capture channels 
-    (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-    if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-    if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output 
-    in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together 
-
-    No need to enable the counter, it's enabled automatically by hardware 
-    (the counter starts in response to a stimulus and generate a pulse */
-
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM One Pulse signal generation.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channels to be disable
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Disable the Capture compare and the Input Capture channels 
-  (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-  if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-  if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output 
-  in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
-
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM One Pulse signal generation in interrupt mode.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Enable the Capture compare and the Input Capture channels 
-    (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-    if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-    if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output 
-    in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together 
-
-    No need to enable the counter, it's enabled automatically by hardware 
-    (the counter starts in response to a stimulus and generate a pulse */
-
-  /* Enable the TIM Capture/Compare 1 interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-
-  /* Enable the TIM Capture/Compare 2 interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Enable the main output */
-    __HAL_TIM_MOE_ENABLE(htim);
-  }
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM One Pulse signal generation in interrupt mode.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Disable the TIM Capture/Compare 1 interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-
-  /* Disable the TIM Capture/Compare 2 interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-
-  /* Disable the Capture compare and the Input Capture channels 
-  (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
-  if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
-  if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output 
-  in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-  if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
-  {
-    /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-  }
-
-  /* Disable the Peripheral */
-   __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions 
- *  @brief    Time Encoder functions 
- *
-@verbatim 
-  ==============================================================================
-                          ##### Time Encoder functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure the TIM Encoder.
-    (+) De-initialize the TIM Encoder.
-    (+) Start the Time Encoder.
-    (+) Stop the Time Encoder.
-    (+) Start the Time Encoder and enable interrupt.
-    (+) Stop the Time Encoder and disable interrupt.
-    (+) Start the Time Encoder and enable DMA transfer.
-    (+) Stop the Time Encoder and disable DMA transfer.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Encoder Interface and create the associated handle.
-  * @param  htim TIM Encoder Interface handle
-  * @param  sConfig TIM Encoder Interface configuration structure
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim,  TIM_Encoder_InitTypeDef* sConfig)
-{
-  uint32_t tmpsmcr = 0U;
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-  assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
-  assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
-  assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
-  assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
-  assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
-  assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
-  assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
-  assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
-  assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIM_Encoder_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Reset the SMS bits */
-  htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-
-  /* Configure the Time base in the Encoder Mode */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = htim->Instance->SMCR;
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = htim->Instance->CCMR1;
-
-  /* Get the TIMx CCER register value */
-  tmpccer = htim->Instance->CCER;
-
-  /* Set the encoder Mode */
-  tmpsmcr |= sConfig->EncoderMode;
-
-  /* Select the Capture Compare 1 and the Capture Compare 2 as input */
-  tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
-  tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U));
-
-  /* Set the the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
-  tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
-  tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
-  tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U);
-  tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U);
-
-  /* Set the TI1 and the TI2 Polarities */
-  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
-  tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
-  tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
-
-  /* Write to TIMx SMCR */
-  htim->Instance->SMCR = tmpsmcr;
-
-  /* Write to TIMx CCMR1 */
-  htim->Instance->CCMR1 = tmpccmr1;
-
-  /* Write to TIMx CCER */
-  htim->Instance->CCER = tmpccer;
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  DeInitializes the TIM Encoder interface 
-  * @param  htim TIM Encoder handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_TIM_Encoder_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Encoder Interface MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Encoder_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Encoder Interface MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM Encoder Interface.
-  * @param  htim TIM Encoder Interface handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-  /* Enable the encoder interface channels */
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-      break;
-  }
-    case TIM_CHANNEL_2:
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-      break;
-  }
-    default :
-  {
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-     break;
-    }
-  }
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Encoder Interface.
-  * @param  htim TIM Encoder Interface handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-    assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-   /* Disable the Input Capture channels 1 and 2
-    (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-  {
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-      break;
-  }
-    case TIM_CHANNEL_2:
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-      break;
-  }
-    default :
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-     break;
-    }
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Encoder Interface in interrupt mode.
-  * @param  htim TIM Encoder Interface handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-  /* Enable the encoder interface channels */
-  /* Enable the capture compare Interrupts 1 and/or 2 */
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-    __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-      break;
-  }
-    case TIM_CHANNEL_2:
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-    __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-      break;
-  }
-    default :
-  {
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-     TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-     __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-     __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-     break;
-    }
-  }
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Encoder Interface in interrupt mode.
-  * @param  htim TIM Encoder Interface handle
-  * @param  Channel TIM Channels to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-  /* Disable the Input Capture channels 1 and 2
-    (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
-  if(Channel == TIM_CHANNEL_1)
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
-    /* Disable the capture compare Interrupts 1 */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-  }
-  else if(Channel == TIM_CHANNEL_2)
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-    /* Disable the capture compare Interrupts 2 */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-  }
-  else
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-    /* Disable the capture compare Interrupts 1 and 2 */
-    __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Encoder Interface in DMA mode.
-  * @param  htim TIM Encoder Interface handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @param  pData1 The destination Buffer address for IC1.
-  * @param  pData2 The destination Buffer address for IC2.
-  * @param  Length The length of data to be transferred from TIM peripheral to memory.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length);
-
-      /* Enable the TIM Input Capture DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-
-      /* Enable the Peripheral */
-      __HAL_TIM_ENABLE(htim);
-
-      /* Enable the Capture compare channel */
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError;
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
-
-      /* Enable the TIM Input Capture  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-
-      /* Enable the Peripheral */
-      __HAL_TIM_ENABLE(htim);
-
-      /* Enable the Capture compare channel */
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-    }
-    break;
-
-    case TIM_CHANNEL_ALL:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
-
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
-
-     /* Enable the Peripheral */
-      __HAL_TIM_ENABLE(htim);
-
-      /* Enable the Capture compare channel */
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-      TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
-
-      /* Enable the TIM Input Capture  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-      /* Enable the TIM Input Capture  DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    default:
-    break;
-  }
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Encoder Interface in DMA mode.
-  * @param  htim TIM Encoder Interface handle
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
-
-  /* Disable the Input Capture channels 1 and 2
-    (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
-  if(Channel == TIM_CHANNEL_1)
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
-    /* Disable the capture compare DMA Request 1 */
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-  }
-  else if(Channel == TIM_CHANNEL_2)
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-    /* Disable the capture compare DMA Request 2 */
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-  }
-  else
-  {
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-    TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
-
-    /* Disable the capture compare DMA Request 1 and 2 */
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-  }
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-/** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management 
- *  @brief    IRQ handler management 
- *
-@verbatim 
-  ==============================================================================
-                        ##### IRQ handler management #####
-  ==============================================================================
-  [..]
-    This section provides Timer IRQ handler function.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  This function handles TIM interrupts requests.
-  * @param  htim TIM  handle
-  * @retval None
-  */
-void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
-{
-  /* Capture compare 1 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET)
-    {
-      {
-        __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
-        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-
-        /* Input capture event */
-        if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
-        {
-          HAL_TIM_IC_CaptureCallback(htim);
-        }
-        /* Output compare event */
-        else
-        {
-          HAL_TIM_OC_DelayElapsedCallback(htim);
-          HAL_TIM_PWM_PulseFinishedCallback(htim);
-        }
-        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-      }
-    }
-  }
-  /* Capture compare 2 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-      /* Input capture event */
-      if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
-      {
-        HAL_TIM_IC_CaptureCallback(htim);
-      }
-      /* Output compare event */
-      else
-      {
-        HAL_TIM_OC_DelayElapsedCallback(htim);
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-    }
-  }
-  /* Capture compare 3 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-      /* Input capture event */
-      if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
-      {
-        HAL_TIM_IC_CaptureCallback(htim);
-      }
-      /* Output compare event */
-      else
-      {
-        HAL_TIM_OC_DelayElapsedCallback(htim);
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-    }
-  }
-  /* Capture compare 4 event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-      /* Input capture event */
-      if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
-      {
-        HAL_TIM_IC_CaptureCallback(htim);
-      }
-      /* Output compare event */
-      else
-      {
-        HAL_TIM_OC_DelayElapsedCallback(htim);
-        HAL_TIM_PWM_PulseFinishedCallback(htim);
-      }
-      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-    }
-  }
-  /* TIM Update event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
-      HAL_TIM_PeriodElapsedCallback(htim);
-    }
-  }
-  /* TIM Break input event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
-      HAL_TIMEx_BreakCallback(htim);
-    }
-  }
-  /* TIM Trigger detection event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
-      HAL_TIM_TriggerCallback(htim);
-    }
-  }
-  /* TIM commutation event */
-  if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
-  {
-    if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET)
-    {
-      __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
-      HAL_TIMEx_CommutationCallback(htim);
-    }
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
- *  @brief   	Peripheral Control functions 
- *
-@verbatim 
-  ==============================================================================
-                   ##### Peripheral Control functions #####
-  ==============================================================================
- [..]
-   This section provides functions allowing to:
-      (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
-      (+) Configure External Clock source.
-      (+) Configure Complementary channels, break features and dead time.
-      (+) Configure Master and the Slave synchronization.
-      (+) Configure the DMA Burst Mode.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the TIM Output Compare Channels according to the specified
-  *         parameters in the TIM_OC_InitTypeDef.
-  * @param  htim TIM Output Compare handle
-  * @param  sConfig TIM Output Compare configuration structure
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CHANNELS(Channel));
-  assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
-  assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
-
-  /* Check input state */
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      /* Configure the TIM Channel 1 in Output Compare */
-      TIM_OC1_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      /* Configure the TIM Channel 2 in Output Compare */
-      TIM_OC2_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-       assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-      /* Configure the TIM Channel 3 in Output Compare */
-      TIM_OC3_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-       /* Configure the TIM Channel 4 in Output Compare */
-       TIM_OC4_SetConfig(htim->Instance, sConfig);
-    }
-    break;
-
-    default:
-    break;
-  }
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Input Capture Channels according to the specified
-  *         parameters in the TIM_IC_InitTypeDef.
-  * @param  htim TIM IC handle
-  * @param  sConfig TIM Input Capture configuration structure
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected 
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
-  assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
-  assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
-  assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
-
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  if (Channel == TIM_CHANNEL_1)
-  {
-    /* TI1 Configuration */
-    TIM_TI1_SetConfig(htim->Instance,
-               sConfig->ICPolarity,
-               sConfig->ICSelection,
-               sConfig->ICFilter);
-
-    /* Reset the IC1PSC Bits */
-    htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
-
-    /* Set the IC1PSC value */
-    htim->Instance->CCMR1 |= sConfig->ICPrescaler;
-  }
-  else if (Channel == TIM_CHANNEL_2)
-  {
-    /* TI2 Configuration */
-    assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-    TIM_TI2_SetConfig(htim->Instance,
-                      sConfig->ICPolarity,
-                      sConfig->ICSelection,
-                      sConfig->ICFilter);
-
-    /* Reset the IC2PSC Bits */
-    htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
-
-    /* Set the IC2PSC value */
-    htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8U);
-  }
-  else if (Channel == TIM_CHANNEL_3)
-  {
-    /* TI3 Configuration */
-    assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
-    TIM_TI3_SetConfig(htim->Instance,
-               sConfig->ICPolarity,
-               sConfig->ICSelection,
-               sConfig->ICFilter);
-
-    /* Reset the IC3PSC Bits */
-    htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
-
-    /* Set the IC3PSC value */
-    htim->Instance->CCMR2 |= sConfig->ICPrescaler;
-  }
-  else
-  {
-    /* TI4 Configuration */
-    assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
-    TIM_TI4_SetConfig(htim->Instance,
-               sConfig->ICPolarity,
-               sConfig->ICSelection,
-               sConfig->ICFilter);
-
-    /* Reset the IC4PSC Bits */
-    htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
-
-    /* Set the IC4PSC value */
-    htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U);
-  }
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM PWM  channels according to the specified
-  *         parameters in the TIM_OC_InitTypeDef.
-  * @param  htim TIM handle
-  * @param  sConfig TIM PWM configuration structure
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel)
-{
-  __HAL_LOCK(htim);
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CHANNELS(Channel));
-  assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
-  assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
-  assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      /* Configure the Channel 1 in PWM mode */
-      TIM_OC1_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel1 */
-      htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
-      htim->Instance->CCMR1 |= sConfig->OCFastMode;
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      /* Configure the Channel 2 in PWM mode */
-      TIM_OC2_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel2 */
-      htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
-
-      /* Configure the Output Fast mode */
-      htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
-      htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-      /* Configure the Channel 3 in PWM mode */
-      TIM_OC3_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel3 */
-      htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
-
-     /* Configure the Output Fast mode */
-      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
-      htim->Instance->CCMR2 |= sConfig->OCFastMode;
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-      /* Configure the Channel 4 in PWM mode */
-      TIM_OC4_SetConfig(htim->Instance, sConfig);
-
-      /* Set the Preload enable bit for channel4 */
-      htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
-
-     /* Configure the Output Fast mode */
-      htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
-      htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM One Pulse Channels according to the specified
-  *         parameters in the TIM_OnePulse_InitTypeDef.
-  * @param  htim TIM One Pulse handle
-  * @param  sConfig TIM One Pulse configuration structure
-  * @param  OutputChannel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @param  InputChannel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim,  TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel,  uint32_t InputChannel)
-{
-  TIM_OC_InitTypeDef temp1;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
-  assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
-
-  if(OutputChannel != InputChannel)
-  {
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Extract the Ouput compare configuration from sConfig structure */
-  temp1.OCMode = sConfig->OCMode;
-  temp1.Pulse = sConfig->Pulse;
-  temp1.OCPolarity = sConfig->OCPolarity;
-  temp1.OCNPolarity = sConfig->OCNPolarity;
-  temp1.OCIdleState = sConfig->OCIdleState;
-  temp1.OCNIdleState = sConfig->OCNIdleState;
-
-    switch (OutputChannel)
-  {
-    case TIM_CHANNEL_1:
-    {
-        assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
-      TIM_OC1_SetConfig(htim->Instance, &temp1);
-    }
-    break;
-    case TIM_CHANNEL_2:
-    {
-        assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-      TIM_OC2_SetConfig(htim->Instance, &temp1);
-    }
-    break;
-    default:
-    break;
-  }
-  switch (InputChannel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
-      TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
-                        sConfig->ICSelection, sConfig->ICFilter);
-
-      /* Reset the IC1PSC Bits */
-    htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
-
-      /* Select the Trigger source */
-        htim->Instance->SMCR &= ~TIM_SMCR_TS;
-      htim->Instance->SMCR |= TIM_TS_TI1FP1;
-
-      /* Select the Slave Mode */
-        htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-      htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
-    }
-    break;
-    case TIM_CHANNEL_2:
-    {
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-      TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
-                 sConfig->ICSelection, sConfig->ICFilter);
-
-      /* Reset the IC2PSC Bits */
-        htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
-
-      /* Select the Trigger source */
-        htim->Instance->SMCR &= ~TIM_SMCR_TS;
-      htim->Instance->SMCR |= TIM_TS_TI2FP2;
-
-      /* Select the Slave Mode */
-        htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-      htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-  else
-  {
-    return HAL_ERROR;
-  }
-}
-
-/**
-  * @brief  Configure the DMA Burst to transfer Data from the memory to the TIM peripheral 
-  * @param  htim TIM handle
-  * @param  BurstBaseAddress TIM Base address from where the DMA will start the Data write
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMABASE_CR1 
-  *            @arg TIM_DMABASE_CR2
-  *            @arg TIM_DMABASE_SMCR
-  *            @arg TIM_DMABASE_DIER
-  *            @arg TIM_DMABASE_SR
-  *            @arg TIM_DMABASE_EGR
-  *            @arg TIM_DMABASE_CCMR1
-  *            @arg TIM_DMABASE_CCMR2
-  *            @arg TIM_DMABASE_CCER
-  *            @arg TIM_DMABASE_CNT 
-  *            @arg TIM_DMABASE_PSC 
-  *            @arg TIM_DMABASE_ARR
-  *            @arg TIM_DMABASE_RCR
-  *            @arg TIM_DMABASE_CCR1
-  *            @arg TIM_DMABASE_CCR2
-  *            @arg TIM_DMABASE_CCR3 
-  *            @arg TIM_DMABASE_CCR4
-  *            @arg TIM_DMABASE_BDTR
-  *            @arg TIM_DMABASE_DCR
-  * @param  BurstRequestSrc TIM DMA Request sources
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMA_UPDATE: TIM update Interrupt source
-  *            @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
-  *            @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
-  *            @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
-  *            @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
-  *            @arg TIM_DMA_COM: TIM Commutation DMA source
-  *            @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
-  * @param  BurstBuffer The Buffer address.
-  * @param  BurstLength DMA Burst length. This parameter can be one value
-  *         between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
-                                              uint32_t  *BurstBuffer, uint32_t  BurstLength)
-{
-return HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength, ((BurstLength) >> 8U) + 1U);
-}
-
-/**
-  * @brief  Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral
-  * @param  htim TIM handle
-  * @param  BurstBaseAddress TIM Base address from where the DMA will start the Data write
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMABASE_CR1
-  *            @arg TIM_DMABASE_CR2
-  *            @arg TIM_DMABASE_SMCR
-  *            @arg TIM_DMABASE_DIER
-  *            @arg TIM_DMABASE_SR
-  *            @arg TIM_DMABASE_EGR
-  *            @arg TIM_DMABASE_CCMR1
-  *            @arg TIM_DMABASE_CCMR2
-  *            @arg TIM_DMABASE_CCER
-  *            @arg TIM_DMABASE_CNT
-  *            @arg TIM_DMABASE_PSC
-  *            @arg TIM_DMABASE_ARR
-  *            @arg TIM_DMABASE_RCR
-  *            @arg TIM_DMABASE_CCR1
-  *            @arg TIM_DMABASE_CCR2
-  *            @arg TIM_DMABASE_CCR3
-  *            @arg TIM_DMABASE_CCR4
-  *            @arg TIM_DMABASE_BDTR
-  *            @arg TIM_DMABASE_DCR
-  * @param  BurstRequestSrc TIM DMA Request sources
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMA_UPDATE: TIM update Interrupt source
-  *            @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
-  *            @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
-  *            @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
-  *            @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
-  *            @arg TIM_DMA_COM: TIM Commutation DMA source
-  *            @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
-  * @param  BurstBuffer The Buffer address.
-  * @param  BurstLength DMA Burst length. This parameter can be one value
-  *         between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
-  * @param  DataLength Data length. This parameter can be one value
-  *         between 1 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
-                                                   uint32_t* BurstBuffer, uint32_t  BurstLength,  uint32_t  DataLength)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-  assert_param(IS_TIM_DMA_LENGTH(BurstLength));
-  assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((BurstBuffer == 0U ) && (BurstLength > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, DataLength);
-    }
-    break;
-    case TIM_DMA_CC1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback =  TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, DataLength);
-    }
-    break;
-    case TIM_DMA_CC2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback =  TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, DataLength);
-    }
-    break;
-    case TIM_DMA_CC3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback =  TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, DataLength);
-    }
-    break;
-    case TIM_DMA_CC4:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback =  TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, DataLength);
-    }
-    break;
-    case TIM_DMA_COM:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback =  TIMEx_DMACommutationCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, DataLength);
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, DataLength);
-    }
-    break;
-    default:
-    break;
-  }
-   /* configure the DMA Burst Mode */
-   htim->Instance->DCR = BurstBaseAddress | BurstLength;
-
-   /* Enable the TIM DMA Request */
-   __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
-
-   htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM DMA Burst mode 
-  * @param  htim TIM handle
-  * @param  BurstRequestSrc TIM DMA Request sources to disable
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-
-  /* Abort the DMA transfer (at least disable the DMA channel) */
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
-    }
-    break;
-    case TIM_DMA_CC1:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
-    }
-    break;
-    case TIM_DMA_CC2:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
-    }
-    break;
-    case TIM_DMA_CC3:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
-    }
-    break;
-    case TIM_DMA_CC4:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
-    }
-    break;
-    case TIM_DMA_COM:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
-    }
-    break;
-    default:
-    break;
-  }
-
-  /* Disable the TIM Update DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the DMA Burst to transfer Data from the TIM peripheral to the memory 
-  * @param  htim TIM handle
-  * @param  BurstBaseAddress TIM Base address from where the DMA will starts the Data read
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMABASE_CR1 
-  *            @arg TIM_DMABASE_CR2
-  *            @arg TIM_DMABASE_SMCR
-  *            @arg TIM_DMABASE_DIER
-  *            @arg TIM_DMABASE_SR
-  *            @arg TIM_DMABASE_EGR
-  *            @arg TIM_DMABASE_CCMR1
-  *            @arg TIM_DMABASE_CCMR2
-  *            @arg TIM_DMABASE_CCER
-  *            @arg TIM_DMABASE_CNT 
-  *            @arg TIM_DMABASE_PSC 
-  *            @arg TIM_DMABASE_ARR
-  *            @arg TIM_DMABASE_RCR
-  *            @arg TIM_DMABASE_CCR1
-  *            @arg TIM_DMABASE_CCR2
-  *            @arg TIM_DMABASE_CCR3 
-  *            @arg TIM_DMABASE_CCR4
-  *            @arg TIM_DMABASE_BDTR
-  *            @arg TIM_DMABASE_DCR
-  * @param  BurstRequestSrc TIM DMA Request sources
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMA_UPDATE: TIM update Interrupt source
-  *            @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
-  *            @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
-  *            @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
-  *            @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
-  *            @arg TIM_DMA_COM: TIM Commutation DMA source
-  *            @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
-  * @param  BurstBuffer The Buffer address.
-  * @param  BurstLength DMA Burst length. This parameter can be one value
-  *         between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
-                                             uint32_t  *BurstBuffer, uint32_t  BurstLength)
-{
-return HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength, ((BurstLength) >> 8U) + 1U);
-}
-
-/**
-  * @brief  Configure the DMA Burst to transfer multiple Data from the TIM peripheral to the memory
-  * @param  htim TIM handle
-  * @param  BurstBaseAddress TIM Base address from where the DMA will starts the Data read
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMABASE_CR1
-  *            @arg TIM_DMABASE_CR2
-  *            @arg TIM_DMABASE_SMCR
-  *            @arg TIM_DMABASE_DIER
-  *            @arg TIM_DMABASE_SR
-  *            @arg TIM_DMABASE_EGR
-  *            @arg TIM_DMABASE_CCMR1
-  *            @arg TIM_DMABASE_CCMR2
-  *            @arg TIM_DMABASE_CCER
-  *            @arg TIM_DMABASE_CNT
-  *            @arg TIM_DMABASE_PSC
-  *            @arg TIM_DMABASE_ARR
-  *            @arg TIM_DMABASE_RCR
-  *            @arg TIM_DMABASE_CCR1
-  *            @arg TIM_DMABASE_CCR2
-  *            @arg TIM_DMABASE_CCR3
-  *            @arg TIM_DMABASE_CCR4
-  *            @arg TIM_DMABASE_BDTR
-  *            @arg TIM_DMABASE_DCR
-  * @param  BurstRequestSrc TIM DMA Request sources
-  *         This parameter can be one of the following values:
-  *            @arg TIM_DMA_UPDATE: TIM update Interrupt source
-  *            @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
-  *            @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
-  *            @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
-  *            @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
-  *            @arg TIM_DMA_COM: TIM Commutation DMA source
-  *            @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
-  * @param  BurstBuffer The Buffer address.
-  * @param  BurstLength DMA Burst length. This parameter can be one value
-  *         between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS.
-  * @param  DataLength Data length. This parameter can be one value
-  *         between 1 and 0xFFFF.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
-                                                  uint32_t  *BurstBuffer, uint32_t  BurstLength, uint32_t  DataLength)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-  assert_param(IS_TIM_DMA_LENGTH(BurstLength));
-  assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if((BurstBuffer == 0U ) && (BurstLength > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-       HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, DataLength);
-    }
-    break;
-    case TIM_DMA_CC1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback =  TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, DataLength);
-    }
-    break;
-    case TIM_DMA_CC2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback =  TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, DataLength);
-    }
-    break;
-    case TIM_DMA_CC3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback =  TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, DataLength);
-    }
-    break;
-    case TIM_DMA_CC4:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback =  TIM_DMACaptureCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, DataLength);
-    }
-    break;
-    case TIM_DMA_COM:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback =  TIMEx_DMACommutationCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, DataLength);
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, DataLength);
-    }
-    break;
-    default:
-    break;
-  }
-
-  /* configure the DMA Burst Mode */
-  htim->Instance->DCR = BurstBaseAddress | BurstLength;
-
-  /* Enable the TIM DMA Request */
-  __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the DMA burst reading 
-  * @param  htim TIM handle
-  * @param  BurstRequestSrc TIM DMA Request sources to disable.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
-
-  /* Abort the DMA transfer (at least disable the DMA channel) */
-  switch(BurstRequestSrc)
-  {
-    case TIM_DMA_UPDATE:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
-    }
-    break;
-    case TIM_DMA_CC1:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
-    }
-    break;
-    case TIM_DMA_CC2:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
-    }
-    break;
-    case TIM_DMA_CC3:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
-    }
-    break;
-    case TIM_DMA_CC4:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
-    }
-    break;
-    case TIM_DMA_COM:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
-    }
-    break;
-    case TIM_DMA_TRIGGER:
-    {
-      HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
-    }
-    break;
-    default:
-    break;
-  }
-
-  /* Disable the TIM Update DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Generate a software event
-  * @param  htim TIM handle
-  * @param  EventSource specifies the event source.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source
-  *            @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source
-  *            @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source
-  *            @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source
-  *            @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source
-  *            @arg TIM_EVENTSOURCE_COM: Timer COM event source 
-  *            @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source
-  *            @arg TIM_EVENTSOURCE_BREAK: Timer Break event source
-  * @note TIM6 and TIM7 can only generate an update event.
-  * @note TIM_EVENTSOURCE_COM and TIM_EVENTSOURCE_BREAK are used only with TIM1, TIM15, TIM16 and TIM17.
-  * @retval HAL status
-  */
-
-HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_EVENT_SOURCE(EventSource));
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
-
-  /* Change the TIM state */
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Set the event sources */
-  htim->Instance->EGR = EventSource;
-
-  /* Change the TIM state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configures the OCRef clear feature
-  * @param  htim TIM handle
-  * @param  sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that
-  *         contains the OCREF clear feature and parameters for the TIM peripheral.
-  * @param  Channel specifies the TIM Channel
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1
-  *            @arg TIM_CHANNEL_2: TIM Channel 2
-  *            @arg TIM_CHANNEL_3: TIM Channel 3
-  *            @arg TIM_CHANNEL_4: TIM Channel 4
-  * @retval HAL status
-  */ 
-__weak HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel)
-{
-  uint32_t tmpsmcr = 0;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
-  assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
-  assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
-  assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  switch (sClearInputConfig->ClearInputSource)
-  {
-    case TIM_CLEARINPUTSOURCE_NONE:
-    {
-      /* Get the TIMx SMCR register value */
-      tmpsmcr = htim->Instance->SMCR;
-      
-      /* Clear the OCREF clear selection bit */
-      tmpsmcr &= ~TIM_SMCR_OCCS;
-
-      /* Clear the ETR Bits */
-      tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
-
-      /* Set TIMx_SMCR */
-      htim->Instance->SMCR = tmpsmcr;
-   }
-    break;
-
-    case TIM_CLEARINPUTSOURCE_ETR:
-    {
-      TIM_ETR_SetConfig(htim->Instance,
-                        sClearInputConfig->ClearInputPrescaler,
-                        sClearInputConfig->ClearInputPolarity,
-                        sClearInputConfig->ClearInputFilter);
-
-      /* Set the OCREF clear selection bit */
-      htim->Instance->SMCR |= TIM_SMCR_OCCS;
-    }
-    break;
-    default:
-    break;
-  }
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-      {
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 1 */
-          htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 1 */
-        htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
-        }
-      }
-      break;
-    case TIM_CHANNEL_2:
-      {
-        assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 2 */
-          htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 2 */
-          htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
-        }
-      }
-    break;
-    case TIM_CHANNEL_3:
-      {
-        assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 3 */
-          htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 3 */
-        htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
-        }
-      }
-    break;
-    case TIM_CHANNEL_4:
-      {
-        assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 4 */
-          htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 4 */
-        htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
-        }
-      }
-    break;
-    default:
-    break;
-  }
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief   Configures the clock source to be used
-  * @param  htim TIM handle
-  * @param  sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
-  *         contains the clock source information for the TIM peripheral.
-  * @retval HAL status
-  */ 
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig)
-{
-  uint32_t tmpsmcr = 0U;
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
-
-  /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
-  tmpsmcr = htim->Instance->SMCR;
-  tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
-  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
-  htim->Instance->SMCR = tmpsmcr;
-
-  switch (sClockSourceConfig->ClockSource)
-  {
-  case TIM_CLOCKSOURCE_INTERNAL:
-    {
-      assert_param(IS_TIM_INSTANCE(htim->Instance));
-      /* Disable slave mode to clock the prescaler directly with the internal clock */
-      htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-    }
-    break;
-
-  case TIM_CLOCKSOURCE_ETRMODE1:
-    {
-      /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/
-      assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
-
-      /* Check ETR input conditioning related parameters */
-      assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      
-      /* Configure the ETR Clock source */
-      TIM_ETR_SetConfig(htim->Instance,
-                        sClockSourceConfig->ClockPrescaler,
-                        sClockSourceConfig->ClockPolarity,
-                        sClockSourceConfig->ClockFilter);
-      /* Get the TIMx SMCR register value */
-      tmpsmcr = htim->Instance->SMCR;
-      /* Reset the SMS and TS Bits */
-      tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
-      /* Select the External clock mode1 and the ETRF trigger */
-      tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
-      /* Write to TIMx SMCR */
-      htim->Instance->SMCR = tmpsmcr;
-    }
-    break;
-
-  case TIM_CLOCKSOURCE_ETRMODE2:
-    {
-      /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/
-      assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance));
-
-      /* Check ETR input conditioning related parameters */
-      assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      
-      /* Configure the ETR Clock source */
-      TIM_ETR_SetConfig(htim->Instance,
-                        sClockSourceConfig->ClockPrescaler,
-                        sClockSourceConfig->ClockPolarity,
-                        sClockSourceConfig->ClockFilter);
-      /* Enable the External clock mode2 */
-      htim->Instance->SMCR |= TIM_SMCR_ECE;
-    }
-    break;
-
-  case TIM_CLOCKSOURCE_TI1:
-    {
-      /* Check whether or not the timer instance supports external clock mode 1 */
-      assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
-
-      /* Check TI1 input conditioning related parameters */
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-      
-      TIM_TI1_ConfigInputStage(htim->Instance,
-                               sClockSourceConfig->ClockPolarity,
-                               sClockSourceConfig->ClockFilter);
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
-    }
-    break;
-  case TIM_CLOCKSOURCE_TI2:
-    {
-      /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/
-      assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
-
-       /* Check TI2 input conditioning related parameters */
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-
-      TIM_TI2_ConfigInputStage(htim->Instance,
-                               sClockSourceConfig->ClockPolarity,
-                               sClockSourceConfig->ClockFilter);
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
-    }
-    break;
-  case TIM_CLOCKSOURCE_TI1ED:
-    {
-      /* Check whether or not the timer instance supports external clock mode 1 */
-      assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
-
-      /* Check TI1 input conditioning related parameters */
-      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
-      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
-
-      TIM_TI1_ConfigInputStage(htim->Instance,
-                               sClockSourceConfig->ClockPolarity,
-                               sClockSourceConfig->ClockFilter);
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
-    }
-    break;
-  case TIM_CLOCKSOURCE_ITR0:
-    {
-      /* Check whether or not the timer instance supports external clock mode 1 */
-      assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
-
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
-    }
-    break;
-  case TIM_CLOCKSOURCE_ITR1:
-    {
-      /* Check whether or not the timer instance supports external clock mode 1 */
-      assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
-
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
-    }
-    break;
-  case TIM_CLOCKSOURCE_ITR2:
-    {
-      /* Check whether or not the timer instance supports external clock mode 1 */
-      assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
-
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
-    }
-    break;
-  case TIM_CLOCKSOURCE_ITR3:
-    {
-      /* Check whether or not the timer instance supports external clock mode 1 */
-      assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
-
-      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
-    }
-    break;
-
-  default:
-    break;
-  }
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Selects the signal connected to the TI1 input: direct from CH1_input
-  *         or a XOR combination between CH1_input, CH2_input & CH3_input
-  * @param  htim TIM handle.
-  * @param  TI1_Selection Indicate whether or not channel 1 is connected to the
-  *         output of a XOR gate.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
-  *            @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
-  *            pins are connected to the TI1 input (XOR combination)
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
-{
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = htim->Instance->CR2;
-
-  /* Reset the TI1 selection */
-  tmpcr2 &= ~TIM_CR2_TI1S;
-
-  /* Set the the TI1 selection */
-  tmpcr2 |= TI1_Selection;
-
-  /* Write to TIMxCR2 */
-  htim->Instance->CR2 = tmpcr2;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configures the TIM in Slave mode
-  * @param  htim TIM handle.
-  * @param  sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that
-  *         contains the selected trigger (internal trigger input, filtered
-  *         timer input or external trigger input) and the ) and the Slave 
-  *         mode (Disable, Reset, Gated, Trigger, External clock mode 1).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
-  assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
-
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
-
-  /* Disable Trigger Interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER);
-
-  /* Disable Trigger DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-    }
-
-/**
-  * @brief  Configures the TIM in Slave mode in interrupt mode
-  * @param  htim TIM handle.
-  * @param  sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that
-  *         contains the selected trigger (internal trigger input, filtered
-  *         timer input or external trigger input) and the ) and the Slave 
-  *         mode (Disable, Reset, Gated, Trigger, External clock mode 1).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim,
-                                                        TIM_SlaveConfigTypeDef * sSlaveConfig)
-    {
-      /* Check the parameters */
-  assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
-  assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
-
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  TIM_SlaveTimer_SetConfig(htim, sSlaveConfig);
-
-  /* Enable Trigger Interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER);
-
-  /* Disable Trigger DMA request */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER);
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Read the captured value from Capture Compare unit
-  * @param  htim TIM handle.
-  * @param  Channel TIM Channels to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1 : TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2 : TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3 : TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4 : TIM Channel 4 selected
-  * @retval Captured value
-  */
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  uint32_t tmpreg = 0U;
-
-  __HAL_LOCK(htim);
-
-  switch (Channel)
-  {
-  case TIM_CHANNEL_1:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-
-      /* Return the capture 1 value */
-      tmpreg =  htim->Instance->CCR1;
-
-      break;
-    }
-  case TIM_CHANNEL_2:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-
-      /* Return the capture 2 value */
-      tmpreg =   htim->Instance->CCR2;
-
-      break;
-    }
-
-  case TIM_CHANNEL_3:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
-
-      /* Return the capture 3 value */
-      tmpreg =   htim->Instance->CCR3;
-
-      break;
-    }
-
-  case TIM_CHANNEL_4:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
-
-      /* Return the capture 4 value */
-      tmpreg =   htim->Instance->CCR4;
-
-      break;
-    }
-
-  default:
-    break;
-  }
-
-  __HAL_UNLOCK(htim);
-  return tmpreg;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
- *  @brief    TIM Callbacks functions 
- *
-@verbatim 
-  ==============================================================================
-                        ##### TIM Callbacks functions #####
-  ==============================================================================
- [..]
-   This section provides TIM callback functions:
-   (+) Timer Period elapsed callback
-   (+) Timer Output Compare callback
-   (+) Timer Input capture callback
-   (+) Timer Trigger callback
-   (+) Timer Error callback
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Period elapsed callback in non blocking mode 
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
-   */
-
-}
-/**
-  * @brief  Output Compare callback in non blocking mode 
-  * @param  htim TIM OC handle
-  * @retval None
-  */
-__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
-   */
-}
-/**
-  * @brief  Input Capture callback in non blocking mode 
-  * @param  htim TIM IC handle
-  * @retval None
-  */
-__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  PWM Pulse finished callback in non blocking mode 
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Hall Trigger detection callback in non blocking mode 
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_TriggerCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Timer error callback in non blocking mode 
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIM_ErrorCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions 
- *  @brief   Peripheral State functions 
- *
-@verbatim 
-  ==============================================================================
-                        ##### Peripheral State functions #####
-  ==============================================================================
-    [..]
-    This subsection permit to get in run-time the status of the peripheral 
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the TIM Base state
-  * @param  htim TIM Base handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM OC state
-  * @param  htim TIM Ouput Compare handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM PWM state
-  * @param  htim TIM handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM Input Capture state
-  * @param  htim TIM IC handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM One Pulse Mode state
-  * @param  htim TIM OPM handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @brief  Return the TIM Encoder Mode state
-  * @param  htim TIM Encoder handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Private_Functions TIM_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  TIM DMA error callback 
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-void TIM_DMAError(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  htim->State= HAL_TIM_STATE_READY;
-
-  HAL_TIM_ErrorCallback(htim);
-}
-
-/**
-  * @brief  TIM DMA Delay Pulse complete callback.
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  htim->State= HAL_TIM_STATE_READY;
-
-  if (hdma == htim->hdma[TIM_DMA_ID_CC1])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-  }
-
-  HAL_TIM_PWM_PulseFinishedCallback(htim);
-
-  htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-/**
-  * @brief  TIM DMA Capture complete callback.
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  htim->State= HAL_TIM_STATE_READY;
-
-  if (hdma == htim->hdma[TIM_DMA_ID_CC1])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
-  }
-  else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
-  {
-    htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
-  }
-
-  HAL_TIM_IC_CaptureCallback(htim);
-
-  htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
-}
-
-/**
-  * @brief  TIM DMA Period Elapse complete callback.
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  htim->State= HAL_TIM_STATE_READY;
-
-  HAL_TIM_PeriodElapsedCallback(htim);
-}
-
-/**
-  * @brief  TIM DMA Trigger callback.
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  htim->State= HAL_TIM_STATE_READY;
-
-  HAL_TIM_TriggerCallback(htim);
-}
-
-/**
-  * @brief  Time Base configuration
-  * @param  TIMx TIM periheral
-  * @param  Structure TIM Base configuration structure
-  * @retval None
-  */
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
-{
-  uint32_t tmpcr1 = 0U;
-  tmpcr1 = TIMx->CR1;
-
-  /* Set TIM Time Base Unit parameters ---------------------------------------*/
-  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
-  {
-    /* Select the Counter Mode */
-    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
-    tmpcr1 |= Structure->CounterMode;
-  }
-
-  if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
-  {
-    /* Set the clock division */
-    tmpcr1 &= ~TIM_CR1_CKD;
-    tmpcr1 |= (uint32_t)Structure->ClockDivision;
-  }
-
-  /* Set the auto-reload preload */
-  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
-
-  TIMx->CR1 = tmpcr1;
-
-  /* Set the Autoreload value */
-  TIMx->ARR = (uint32_t)Structure->Period ;
-
-  /* Set the Prescaler value */
-  TIMx->PSC = (uint32_t)Structure->Prescaler;
-
-  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
-  {
-    /* Set the Repetition Counter value */
-    TIMx->RCR = Structure->RepetitionCounter;
-  }
-
-  /* Generate an update event to reload the Prescaler 
-     and the repetition counter(only for TIM1 and TIM8) value immediatly */
-  TIMx->EGR = TIM_EGR_UG;
-}
-
-/**
-  * @brief  Time Ouput Compare 1 configuration
-  * @param  TIMx to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-   /* Disable the Channel 1: Reset the CC1E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC1E;
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR1;
-
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= ~TIM_CCMR1_OC1M;
-  tmpccmrx &= ~TIM_CCMR1_CC1S;
-  /* Select the Output Compare Mode */
-  tmpccmrx |= OC_Config->OCMode;
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC1P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= OC_Config->OCPolarity;
-
-  if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
-  {
-    /* Check parameters */
-    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
-    /* Reset the Output N Polarity level */
-    tmpccer &= ~TIM_CCER_CC1NP;
-    /* Set the Output N Polarity */
-    tmpccer |= OC_Config->OCNPolarity;
-    /* Reset the Output N State */
-    tmpccer &= ~TIM_CCER_CC1NE;
-  }
-
-  if(IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    /* Check parameters */
-    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-    /* Reset the Output Compare and Output Compare N IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS1;
-    tmpcr2 &= ~TIM_CR2_OIS1N;
-    /* Set the Output Idle state */
-    tmpcr2 |= OC_Config->OCIdleState;
-    /* Set the Output N Idle state */
-    tmpcr2 |= OC_Config->OCNIdleState;
-  }
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-
-  /* Write to TIMx CCMR1 */
-  TIMx->CCMR1 = tmpccmrx;
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR1 = OC_Config->Pulse;
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Time Ouput Compare 2 configuration
-  * @param  TIMx  to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmrx = TIMx->CCMR1;
-
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR1_OC2M;
-  tmpccmrx &= ~TIM_CCMR1_CC2S;
-
-  /* Select the Output Compare Mode */
-  tmpccmrx |= (OC_Config->OCMode << 8U);
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC2P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 4U);
-
-  if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
-  {
-    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
-    /* Reset the Output N Polarity level */
-    tmpccer &= ~TIM_CCER_CC2NP;
-    /* Set the Output N Polarity */
-    tmpccer |= (OC_Config->OCNPolarity << 4U);
-    /* Reset the Output N State */
-    tmpccer &= ~TIM_CCER_CC2NE;
-
-  }
-
-  if(IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    /* Check parameters */
-    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-    /* Reset the Output Compare and Output Compare N IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS2;
-    tmpcr2 &= ~TIM_CR2_OIS2N;
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 2U);
-    /* Set the Output N Idle state */
-    tmpcr2 |= (OC_Config->OCNIdleState << 2U);
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-
-  /* Write to TIMx CCMR1 */
-  TIMx->CCMR1 = tmpccmrx;
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR2 = OC_Config->Pulse;
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Time Ouput Compare 3 configuration
-  * @param  TIMx  to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Disable the Channel 3: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC3E;
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmrx = TIMx->CCMR2;
-
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR2_OC3M;
-  tmpccmrx &= ~TIM_CCMR2_CC3S;
-  /* Select the Output Compare Mode */
-  tmpccmrx |= OC_Config->OCMode;
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC3P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 8U);
-
-  if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
-  {
-    assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
-
-    /* Reset the Output N Polarity level */
-    tmpccer &= ~TIM_CCER_CC3NP;
-    /* Set the Output N Polarity */
-    tmpccer |= (OC_Config->OCNPolarity << 8U);
-    /* Reset the Output N State */
-    tmpccer &= ~TIM_CCER_CC3NE;
-  }
-
-  if(IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    /* Check parameters */
-    assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-    /* Reset the Output Compare and Output Compare N IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS3;
-    tmpcr2 &= ~TIM_CR2_OIS3N;
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 4U);
-    /* Set the Output N Idle state */
-    tmpcr2 |= (OC_Config->OCNIdleState << 4U);
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-
-  /* Write to TIMx CCMR2 */
-  TIMx->CCMR2 = tmpccmrx;
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR3 = OC_Config->Pulse;
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Time Ouput Compare 4 configuration
-  * @param  TIMx  to select the TIM peripheral
-  * @param  OC_Config The ouput configuration structure
-  * @retval None
-  */
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
-{
-  uint32_t tmpccmrx = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC4E;
-
-  /* Get the TIMx CCER register value */
-  tmpccer = TIMx->CCER;
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  TIMx->CR2;
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmrx = TIMx->CCMR2;
-
-  /* Reset the Output Compare mode and Capture/Compare selection Bits */
-  tmpccmrx &= ~TIM_CCMR2_OC4M;
-  tmpccmrx &= ~TIM_CCMR2_CC4S;
-
-  /* Select the Output Compare Mode */
-  tmpccmrx |= (OC_Config->OCMode << 8U);
-
-  /* Reset the Output Polarity level */
-  tmpccer &= ~TIM_CCER_CC4P;
-  /* Set the Output Compare Polarity */
-  tmpccer |= (OC_Config->OCPolarity << 12U);
-
-  if(IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
-
-   /* Reset the Output Compare IDLE State */
-    tmpcr2 &= ~TIM_CR2_OIS4;
-    /* Set the Output Idle state */
-    tmpcr2 |= (OC_Config->OCIdleState << 6U);
-  }
-
-  /* Write to TIMx CR2 */
-  TIMx->CR2 = tmpcr2;
-
-  /* Write to TIMx CCMR2 */
-  TIMx->CCMR2 = tmpccmrx;
-
-  /* Set the Capture Compare Register value */
-  TIMx->CCR4 = OC_Config->Pulse;
-
-  /* Write to TIMx CCER */
-  TIMx->CCER = tmpccer;
-}
-
-static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
-                              TIM_SlaveConfigTypeDef * sSlaveConfig)
-{
-  uint32_t tmpsmcr = 0U;
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = htim->Instance->SMCR;
-
-  /* Reset the Trigger Selection Bits */
-  tmpsmcr &= ~TIM_SMCR_TS;
-  /* Set the Input Trigger source */
-  tmpsmcr |= sSlaveConfig->InputTrigger;
-
-  /* Reset the slave mode Bits */
-  tmpsmcr &= ~TIM_SMCR_SMS;
-  /* Set the slave mode */
-  tmpsmcr |= sSlaveConfig->SlaveMode;
-
-  /* Write to TIMx SMCR */
-  htim->Instance->SMCR = tmpsmcr;
-
-  /* Configure the trigger prescaler, filter, and polarity */
-  switch (sSlaveConfig->InputTrigger)
-  {
-  case TIM_TS_ETRF:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
-      assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-      /* Configure the ETR Trigger source */
-      TIM_ETR_SetConfig(htim->Instance,
-                        sSlaveConfig->TriggerPrescaler,
-                        sSlaveConfig->TriggerPolarity,
-                        sSlaveConfig->TriggerFilter);
-    }
-    break;
-
-  case TIM_TS_TI1F_ED:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
-      /* Disable the Channel 1: Reset the CC1E Bit */
-      tmpccer = htim->Instance->CCER;
-      htim->Instance->CCER &= ~TIM_CCER_CC1E;
-      tmpccmr1 = htim->Instance->CCMR1;
-
-      /* Set the filter */
-      tmpccmr1 &= ~TIM_CCMR1_IC1F;
-      tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4U);
-
-      /* Write to TIMx CCMR1 and CCER registers */
-      htim->Instance->CCMR1 = tmpccmr1;
-      htim->Instance->CCER = tmpccer;
-
-    }
-    break;
-
-  case TIM_TS_TI1FP1:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
-      /* Configure TI1 Filter and Polarity */
-      TIM_TI1_ConfigInputStage(htim->Instance,
-                               sSlaveConfig->TriggerPolarity,
-                               sSlaveConfig->TriggerFilter);
-    }
-    break;
-
-  case TIM_TS_TI2FP2:
-    {
-      /* Check the parameters */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-      assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
-      assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
-
-      /* Configure TI2 Filter and Polarity */
-      TIM_TI2_ConfigInputStage(htim->Instance,
-                                sSlaveConfig->TriggerPolarity,
-                                sSlaveConfig->TriggerFilter);
-    }
-    break;
-
-  case TIM_TS_ITR0:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  case TIM_TS_ITR1:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  case TIM_TS_ITR2:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  case TIM_TS_ITR3:
-    {
-      /* Check the parameter */
-      assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
-    }
-    break;
-
-  default:
-    break;
-  }
-}
-
-/**
-  * @brief  Configure the TI1 as Input.
-  * @param  TIMx  to select the TIM peripheral.
-  * @param  TIM_ICPolarity The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPOLARITY_RISING
-  *            @arg TIM_ICPOLARITY_FALLING
-  *            @arg TIM_ICPOLARITY_BOTHEDGE 
-  * @param  TIM_ICSelection specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSELECTION_DIRECTTI : TIM Input 1 is selected to be connected to IC1.
-  *            @arg TIM_ICSELECTION_INDIRECTTI : TIM Input 1 is selected to be connected to IC2.
-  *            @arg TIM_ICSELECTION_TRC : TIM Input 1 is selected to be connected to TRC.
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1 
-  *       (on channel2 path) is used as the input signal. Therefore CCMR1 must be 
-  *        protected against un-initialized filter and polarity values.
-  */
-void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC1E;
-  tmpccmr1 = TIMx->CCMR1;
-  tmpccer = TIMx->CCER;
-
-  /* Select the Input */
-  if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
-  {
-    tmpccmr1 &= ~TIM_CCMR1_CC1S;
-    tmpccmr1 |= TIM_ICSelection;
-  }
-  else
-  {
-    tmpccmr1 |= TIM_CCMR1_CC1S_0;
-  }
-
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC1F;
-  tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F);
-
-  /* Select the Polarity and set the CC1E Bit */
-  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
-  tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP));
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the Polarity and Filter for TI1.
-  * @param  TIMx  to select the TIM peripheral.
-  * @param  TIM_ICPolarity The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPOLARITY_RISING
-  *            @arg TIM_ICPOLARITY_FALLING
-  *            @arg TIM_ICPOLARITY_BOTHEDGE
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  tmpccer = TIMx->CCER;
-  TIMx->CCER &= ~TIM_CCER_CC1E;
-  tmpccmr1 = TIMx->CCMR1;
-
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC1F;
-  tmpccmr1 |= (TIM_ICFilter << 4U);
-
-  /* Select the Polarity and set the CC1E Bit */
-  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
-  tmpccer |= TIM_ICPolarity;
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the TI2 as Input.
-  * @param  TIMx  to select the TIM peripheral
-  * @param  TIM_ICPolarity The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPOLARITY_RISING
-  *            @arg TIM_ICPOLARITY_FALLING
-  *            @arg TIM_ICPOLARITY_BOTHEDGE 
-  * @param  TIM_ICSelection specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSELECTION_DIRECTTI : TIM Input 2 is selected to be connected to IC2.
-  *            @arg TIM_ICSELECTION_INDIRECTTI : TIM Input 2 is selected to be connected to IC1.
-  *            @arg TIM_ICSELECTION_TRC : TIM Input 2 is selected to be connected to TRC.
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2 
-  *       (on channel1 path) is used as the input signal. Therefore CCMR1 must be 
-  *        protected against un-initialized filter and polarity values.
-  */
-static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
-  tmpccmr1 = TIMx->CCMR1;
-  tmpccer = TIMx->CCER;
-
-  /* Select the Input */
-  tmpccmr1 &= ~TIM_CCMR1_CC2S;
-  tmpccmr1 |= (TIM_ICSelection << 8U);
-
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC2F;
-  tmpccmr1 |= ((TIM_ICFilter << 12U) & TIM_CCMR1_IC2F);
-
-  /* Select the Polarity and set the CC2E Bit */
-  tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
-  tmpccer |= ((TIM_ICPolarity << 4U) & (TIM_CCER_CC2P | TIM_CCER_CC2NP));
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1 ;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the Polarity and Filter for TI2.
-  * @param  TIMx  to select the TIM peripheral.
-  * @param  TIM_ICPolarity The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPOLARITY_RISING
-  *            @arg TIM_ICPOLARITY_FALLING
-  *            @arg TIM_ICPOLARITY_BOTHEDGE
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  */
-static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC2E;
-  tmpccmr1 = TIMx->CCMR1;
-  tmpccer = TIMx->CCER;
-
-  /* Set the filter */
-  tmpccmr1 &= ~TIM_CCMR1_IC2F;
-  tmpccmr1 |= (TIM_ICFilter << 12U);
-
-  /* Select the Polarity and set the CC2E Bit */
-  tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
-  tmpccer |= (TIM_ICPolarity << 4U);
-
-  /* Write to TIMx CCMR1 and CCER registers */
-  TIMx->CCMR1 = tmpccmr1 ;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the TI3 as Input.
-  * @param  TIMx  to select the TIM peripheral
-  * @param  TIM_ICPolarity The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPOLARITY_RISING
-  *            @arg TIM_ICPOLARITY_FALLING
-  *            @arg TIM_ICPOLARITY_BOTHEDGE 
-  * @param  TIM_ICSelection specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSELECTION_DIRECTTI : TIM Input 3 is selected to be connected to IC3.
-  *            @arg TIM_ICSELECTION_INDIRECTTI : TIM Input 3 is selected to be connected to IC4.
-  *            @arg TIM_ICSELECTION_TRC : TIM Input 3 is selected to be connected to TRC.
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @retval None
-  * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4 
-  *       (on channel1 path) is used as the input signal. Therefore CCMR2 must be 
-  *        protected against un-initialized filter and polarity values.
-  */
-static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 3: Reset the CC3E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC3E;
-  tmpccmr2 = TIMx->CCMR2;
-  tmpccer = TIMx->CCER;
-
-  /* Select the Input */
-  tmpccmr2 &= ~TIM_CCMR2_CC3S;
-  tmpccmr2 |= TIM_ICSelection;
-
-  /* Set the filter */
-  tmpccmr2 &= ~TIM_CCMR2_IC3F;
-  tmpccmr2 |= ((TIM_ICFilter << 4U) & TIM_CCMR2_IC3F);
-
-  /* Select the Polarity and set the CC3E Bit */
-  tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP);
-  tmpccer |= ((TIM_ICPolarity << 8U) & (TIM_CCER_CC3P | TIM_CCER_CC3NP));
-
-  /* Write to TIMx CCMR2 and CCER registers */
-  TIMx->CCMR2 = tmpccmr2;
-  TIMx->CCER = tmpccer;
-}
-
-/**
-  * @brief  Configure the TI4 as Input.
-  * @param  TIMx to select the TIM peripheral
-  * @param  TIM_ICPolarity The Input Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICPOLARITY_RISING
-  *            @arg TIM_ICPOLARITY_FALLING
-  *            @arg TIM_ICPOLARITY_BOTHEDGE 
-  * @param  TIM_ICSelection specifies the input to be used.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ICSELECTION_DIRECTTI : TIM Input 4 is selected to be connected to IC4.
-  *            @arg TIM_ICSELECTION_INDIRECTTI : TIM Input 4 is selected to be connected to IC3.
-  *            @arg TIM_ICSELECTION_TRC : TIM Input 4 is selected to be connected to TRC.
-  * @param  TIM_ICFilter Specifies the Input Capture Filter.
-  *          This parameter must be a value between 0x00 and 0x0F.
-  * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3 
-  *       (on channel1 path) is used as the input signal. Therefore CCMR2 must be 
-  *        protected against un-initialized filter and polarity values.
-  * @retval None
-  */
-static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
-                       uint32_t TIM_ICFilter)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  TIMx->CCER &= ~TIM_CCER_CC4E;
-  tmpccmr2 = TIMx->CCMR2;
-  tmpccer = TIMx->CCER;
-
-  /* Select the Input */
-  tmpccmr2 &= ~TIM_CCMR2_CC4S;
-  tmpccmr2 |= (TIM_ICSelection << 8U);
-
-  /* Set the filter */
-  tmpccmr2 &= ~TIM_CCMR2_IC4F;
-  tmpccmr2 |= ((TIM_ICFilter << 12U) & TIM_CCMR2_IC4F);
-
-  /* Select the Polarity and set the CC4E Bit */
-  tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP);
-  tmpccer |= ((TIM_ICPolarity << 12U) & (TIM_CCER_CC4P | TIM_CCER_CC4NP));
-
-  /* Write to TIMx CCMR2 and CCER registers */
-  TIMx->CCMR2 = tmpccmr2;
-  TIMx->CCER = tmpccer ;
-}
-
-/**
-  * @brief  Selects the Input Trigger source
-  * @param  TIMx  to select the TIM peripheral
-  * @param  InputTriggerSource The Input Trigger source.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_TS_ITR0 : Internal Trigger 0
-  *            @arg TIM_TS_ITR1 : Internal Trigger 1
-  *            @arg TIM_TS_ITR2 : Internal Trigger 2
-  *            @arg TIM_TS_ITR3 : Internal Trigger 3
-  *            @arg TIM_TS_TI1F_ED : TI1 Edge Detector
-  *            @arg TIM_TS_TI1FP1 : Filtered Timer Input 1
-  *            @arg TIM_TS_TI2FP2 : Filtered Timer Input 2
-  *            @arg TIM_TS_ETRF : External Trigger input
-  * @retval None
-  */
-static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource)
-{
-  uint32_t tmpsmcr = 0U;
-
-   /* Get the TIMx SMCR register value */
-   tmpsmcr = TIMx->SMCR;
-   /* Reset the TS Bits */
-   tmpsmcr &= ~TIM_SMCR_TS;
-   /* Set the Input Trigger source and the slave mode*/
-   tmpsmcr |= InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1;
-   /* Write to TIMx SMCR */
-   TIMx->SMCR = tmpsmcr;
-}
-/**
-  * @brief  Configures the TIMx External Trigger (ETR).
-  * @param  TIMx  to select the TIM peripheral
-  * @param  TIM_ExtTRGPrescaler The external Trigger Prescaler.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ETRPRESCALER_DIV1 : ETRP Prescaler OFF.
-  *            @arg TIM_ETRPRESCALER_DIV2 : ETRP frequency divided by 2.
-  *            @arg TIM_ETRPRESCALER_DIV4 : ETRP frequency divided by 4.
-  *            @arg TIM_ETRPRESCALER_DIV8 : ETRP frequency divided by 8.
-  * @param  TIM_ExtTRGPolarity The external Trigger Polarity.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_ETRPOLARITY_INVERTED : active low or falling edge active.
-  *            @arg TIM_ETRPOLARITY_NONINVERTED : active high or rising edge active.
-  * @param  ExtTRGFilter External Trigger Filter.
-  *          This parameter must be a value between 0x00 and 0x0F
-  * @retval None
-  */
-void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
-                       uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
-{
-  uint32_t tmpsmcr = 0U;
-
-  tmpsmcr = TIMx->SMCR;
-
-  /* Reset the ETR Bits */
-  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
-
-  /* Set the Prescaler, the Filter value and the Polarity */
-  tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
-
-  /* Write to TIMx SMCR */
-  TIMx->SMCR = tmpsmcr;
-}
-
-/**
-  * @brief  Enables or disables the TIM Capture Compare Channel x.
-  * @param  TIMx  to select the TIM peripheral
-  * @param  Channel specifies the TIM Channel
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1 : TIM Channel 1
-  *            @arg TIM_CHANNEL_2 : TIM Channel 2
-  *            @arg TIM_CHANNEL_3 : TIM Channel 3
-  *            @arg TIM_CHANNEL_4 : TIM Channel 4
-  * @param  ChannelState specifies the TIM Channel CCxE bit new state.
-  *          This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable.
-  * @retval None
-  */
-void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
-{
-  uint32_t tmp = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(TIMx));
-  assert_param(IS_TIM_CHANNELS(Channel));
-
-  tmp = TIM_CCER_CC1E << Channel;
-
-  /* Reset the CCxE Bit */
-  TIMx->CCER &= ~tmp;
-
-  /* Set or reset the CCxE Bit */
-  TIMx->CCER |=  (uint32_t)(ChannelState << Channel);
-}
-
-
-/**
-  * @}
-  */
-
-#endif /* HAL_TIM_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_tim_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_tim_ex.c
deleted file mode 100644
index 9bf2c75d..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_tim_ex.c
+++ /dev/null
@@ -1,2012 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_tim_ex.c
-  * @author  MCD Application Team
-  * @brief   TIM HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Timer Extended peripheral:
-  *           + Time Hall Sensor Interface Initialization
-  *           + Time Hall Sensor Interface Start
-  *           + Time Complementary signal bread and dead time configuration 
-  *           + Time Master and Slave synchronization configuration
-  *           + Timer remapping capabilities configuration
-  @verbatim
-  ==============================================================================
-                      ##### TIMER Extended features #####
-  ==============================================================================
-  [..]
-    The Timer Extended features include:
-    (#) Complementary outputs with programmable dead-time for :
-        (++) Output Compare
-        (++) PWM generation (Edge and Center-aligned Mode)
-        (++) One-pulse mode output
-    (#) Synchronization circuit to control the timer with external signals and to 
-        interconnect several timers together.
-    (#) Break input to put the timer output signals in reset state or in a known state.
-    (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for 
-        positioning purposes
-
-            ##### How to use this driver #####
-  ==============================================================================
-    [..]
-     (#) Initialize the TIM low level resources by implementing the following functions 
-         depending from feature used :
-           (++) Complementary Output Compare : HAL_TIM_OC_MspInit()
-           (++) Complementary PWM generation : HAL_TIM_PWM_MspInit()
-           (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit()
-           (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit()
-
-     (#) Initialize the TIM low level resources :
-        (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
-        (##) TIM pins configuration
-            (+++) Enable the clock for the TIM GPIOs using the following function:
-              __HAL_RCC_GPIOx_CLK_ENABLE();
-            (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
-
-     (#) The external Clock can be configured, if needed (the default clock is the 
-         internal clock from the APBx), using the following function:
-         HAL_TIM_ConfigClockSource, the clock configuration should be done before 
-         any start function.
-
-     (#) Configure the TIM in the desired functioning mode using one of the 
-         initialization function of this driver:
-          (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the 
-              Timer Hall Sensor Interface and the commutation event with the corresponding 
-              Interrupt and DMA request if needed (Note that One Timer is used to interface 
-             with the Hall sensor Interface and another Timer should be used to use 
-             the commutation event).
-
-     (#) Activate the TIM peripheral using one of the start functions:
-           (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
-           (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
-           (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
-           (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-*/
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup TIMEx TIMEx
-  * @brief TIM Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_TIM_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
-  * @{
-  */
-static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState);
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
-  * @{
-  */
-
-/** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions 
- *  @brief    Timer Hall Sensor functions 
- *
-@verbatim 
-  ==============================================================================
-                      ##### Timer Hall Sensor functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Initialize and configure TIM HAL Sensor.
-    (+) De-initialize TIM HAL Sensor.
-    (+) Start the Hall Sensor Interface.
-    (+) Stop the Hall Sensor Interface.
-    (+) Start the Hall Sensor Interface and enable interrupts.
-    (+) Stop the Hall Sensor Interface and disable interrupts.
-    (+) Start the Hall Sensor Interface and enable DMA transfers.
-    (+) Stop the Hall Sensor Interface and disable DMA transfers.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Initializes the TIM Hall Sensor Interface and create the associated handle.
-  * @param  htim TIM Encoder Interface handle
-  * @param  sConfig TIM Hall Sensor configuration structure
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig)
-{
-  TIM_OC_InitTypeDef OC_Config;
-
-  /* Check the TIM handle allocation */
-  if(htim == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
-  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
-  assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
-  assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
-  assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
-  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
-
-  if(htim->State == HAL_TIM_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htim->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
-    HAL_TIMEx_HallSensor_MspInit(htim);
-  }
-
-  /* Set the TIM state */
-  htim->State= HAL_TIM_STATE_BUSY;
-
-  /* Configure the Time base in the Encoder Mode */
-  TIM_Base_SetConfig(htim->Instance, &htim->Init);
-
-  /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the  Hall sensor */
-  TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
-
-  /* Reset the IC1PSC Bits */
-  htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
-  /* Set the IC1PSC value */
-  htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
-
-  /* Enable the Hall sensor interface (XOR function of the three inputs) */
-  htim->Instance->CR2 |= TIM_CR2_TI1S;
-
-  /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
-  htim->Instance->SMCR &= ~TIM_SMCR_TS;
-  htim->Instance->SMCR |= TIM_TS_TI1F_ED;
-
-  /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
-  htim->Instance->SMCR &= ~TIM_SMCR_SMS;
-  htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
-
-  /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
-  OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
-  OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
-  OC_Config.OCMode = TIM_OCMODE_PWM2;
-  OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
-  OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
-  OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
-  OC_Config.Pulse = sConfig->Commutation_Delay;
-
-  TIM_OC2_SetConfig(htim->Instance, &OC_Config);
-
-  /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
-    register to 101 */
-  htim->Instance->CR2 &= ~TIM_CR2_MMS;
-  htim->Instance->CR2 |= TIM_TRGO_OC2REF;
-
-  /* Initialize the TIM state*/
-  htim->State= HAL_TIM_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  DeInitializes the TIM Hall Sensor interface 
-  * @param  htim TIM Hall Sensor handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(htim->Instance));
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Disable the TIM Peripheral Clock */
-  __HAL_TIM_DISABLE(htim);
-
-  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
-  HAL_TIMEx_HallSensor_MspDeInit(htim);
-
-  /* Change TIM state */
-  htim->State = HAL_TIM_STATE_RESET;
-
-  /* Release Lock */
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TIM Hall Sensor MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  DeInitializes TIM Hall Sensor MSP.
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Starts the TIM Hall Sensor Interface.
-  * @param  htim TIM Hall Sensor handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
-
-  /* Enable the Input Capture channel 1
-    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Hall sensor Interface.
-  * @param  htim TIM Hall Sensor handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
-
-  /* Disable the Input Capture channels 1, 2 and 3
-    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Hall Sensor Interface in interrupt mode.
-  * @param  htim TIM Hall Sensor handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
-
-  /* Enable the capture compare Interrupts 1 event */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-
-  /* Enable the Input Capture channel 1
-    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Hall Sensor Interface in interrupt mode.
-  * @param  htim TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
-
-  /* Disable the Input Capture channel 1
-    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
-  /* Disable the capture compare Interrupts event */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Hall Sensor Interface in DMA mode.
-  * @param  htim TIM Hall Sensor handle
-  * @param  pData The destination Buffer address.
-  * @param  Length The length of data to be transferred from TIM peripheral to memory.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
-
-   if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if(((uint32_t)pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  /* Enable the Input Capture channel 1
-    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
-
-  /* Set the DMA Input Capture 1 Callback */
-  htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
-  /* Set the DMA error callback */
-  htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-  /* Enable the DMA channel for Capture 1*/
-  HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
-
-  /* Enable the capture compare 1 Interrupt */
-  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Hall Sensor Interface in DMA mode.
-  * @param  htim TIM handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
-
-  /* Disable the Input Capture channel 1
-    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
-  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
-
-
-  /* Disable the capture compare Interrupts 1 event */
-  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions
- *  @brief    Timer Complementary Output Compare functions 
- *
-@verbatim 
-  ==============================================================================
-              ##### Timer Complementary Output Compare functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Start the Complementary Output Compare/PWM.
-    (+) Stop the Complementary Output Compare/PWM.
-    (+) Start the Complementary Output Compare/PWM and enable interrupts.
-    (+) Stop the Complementary Output Compare/PWM and disable interrupts.
-    (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
-    (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation on the complementary
-  *         output.
-  * @param  htim TIM Output Compare handle 
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-     /* Enable the Capture compare channel N */
-     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-    __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation on the complementary
-  *         output.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-    /* Disable the Capture compare channel N */
-  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
-  /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation in interrupt mode 
-  *         on the complementary output.
-  * @param  htim TIM OC handle
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Output Compare interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Output Compare interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Output Compare interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Output Compare interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the TIM Break interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
-
-     /* Enable the Capture compare channel N */
-     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-    __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation in interrupt mode 
-  *         on the complementary output.
-  * @param  htim TIM Output Compare handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  uint32_t tmpccer = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Output Compare interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Output Compare interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Output Compare interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Output Compare interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-     /* Disable the Capture compare channel N */
-     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
-  /* Disable the TIM Break interrupt (only if no more channel is active) */
-  tmpccer = htim->Instance->CCER;
-  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
-  {
-    __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
-  }
-
-  /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM Output Compare signal generation in DMA mode 
-  *         on the complementary output.
-  * @param  htim TIM Output Compare handle
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData The source Buffer address.
-  * @param  Length The length of data to be transferred from memory to TIM peripheral
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if(((uint32_t)pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
-
-      /* Enable the TIM Output Compare DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
-
-      /* Enable the TIM Output Compare DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-{
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
-
-      /* Enable the TIM Output Compare DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-     /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
-
-      /* Enable the TIM Output Compare DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the Capture compare channel N */
-  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-  __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM Output Compare signal generation in DMA mode 
-  *         on the complementary output.
-  * @param  htim TIM Output Compare handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Output Compare DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Output Compare DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Output Compare DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Output Compare interrupt */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the Capture compare channel N */
-  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
-  /* Disable the Main Ouput */
-  __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions
- *  @brief    Timer Complementary PWM functions 
- *
-@verbatim 
-  ==============================================================================
-                 ##### Timer Complementary PWM functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Start the Complementary PWM.
-    (+) Stop the Complementary PWM.
-    (+) Start the Complementary PWM and enable interrupts.
-    (+) Stop the Complementary PWM and disable interrupts.
-    (+) Start the Complementary PWM and enable DMA transfers.
-    (+) Stop the Complementary PWM and disable DMA transfers.
-    (+) Start the Complementary Input Capture measurement.
-    (+) Stop the Complementary Input Capture.
-    (+) Start the Complementary Input Capture and enable interrupts.
-    (+) Stop the Complementary Input Capture and disable interrupts.
-    (+) Start the Complementary Input Capture and enable DMA transfers.
-    (+) Stop the Complementary Input Capture and disable DMA transfers.
-    (+) Start the Complementary One Pulse generation.
-    (+) Stop the Complementary One Pulse.
-    (+) Start the Complementary One Pulse and enable interrupts.
-    (+) Stop the Complementary One Pulse and disable interrupts.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Starts the PWM signal generation on the complementary output.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  /* Enable the complementary PWM output  */
-  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-  __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the PWM signal generation on the complementary output.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  /* Disable the complementary PWM output  */
-  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
-  /* Disable the Main Ouput */
-  __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the PWM signal generation in interrupt mode on the 
-  *         complementary output.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Enable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Enable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Enable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Enable the TIM Capture/Compare 4 interrupt */
-      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the TIM Break interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
-
-  /* Enable the complementary PWM output  */
-  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-  __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the PWM signal generation in interrupt mode on the 
-  *         complementary output.
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  uint32_t tmpccer = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 3 interrupt */
-      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the complementary PWM output  */
-  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
-  /* Disable the TIM Break interrupt (only if no more channel is active) */
-  tmpccer = htim->Instance->CCER;
-  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET)
-  {
-    __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
-  }
-
-  /* Disable the Main Ouput */
-  __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM PWM signal generation in DMA mode on the 
-  *         complementary output
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @param  pData The source Buffer address.
-  * @param  Length The length of data to be transferred from memory to TIM peripheral
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  if((htim->State == HAL_TIM_STATE_BUSY))
-  {
-     return HAL_BUSY;
-  }
-  else if((htim->State == HAL_TIM_STATE_READY))
-  {
-    if(((uint32_t)pData == 0U ) && (Length > 0U))
-    {
-      return HAL_ERROR;
-    }
-    else
-    {
-      htim->State = HAL_TIM_STATE_BUSY;
-    }
-  }
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
-
-      /* Enable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
-
-      /* Enable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
-
-      /* Enable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-     /* Set the DMA Period elapsed callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt;
-
-      /* Set the DMA error callback */
-      htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ;
-
-      /* Enable the DMA channel */
-      HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
-
-      /* Enable the TIM Capture/Compare 4 DMA request */
-      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Enable the complementary PWM output  */
-     TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-    __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Enable the Peripheral */
-  __HAL_TIM_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM PWM signal generation in DMA mode on the complementary
-  *         output
-  * @param  htim TIM handle
-  * @param  Channel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
-  *            @arg TIM_CHANNEL_4: TIM Channel 4 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
-
-  switch (Channel)
-  {
-    case TIM_CHANNEL_1:
-    {
-      /* Disable the TIM Capture/Compare 1 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
-    }
-    break;
-
-    case TIM_CHANNEL_2:
-    {
-      /* Disable the TIM Capture/Compare 2 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
-    }
-    break;
-
-    case TIM_CHANNEL_3:
-    {
-      /* Disable the TIM Capture/Compare 3 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
-    }
-    break;
-
-    case TIM_CHANNEL_4:
-    {
-      /* Disable the TIM Capture/Compare 4 DMA request */
-      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
-    }
-    break;
-
-    default:
-    break;
-  }
-
-  /* Disable the complementary PWM output */
-    TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
-
-  /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Change the htim state */
-  htim->State = HAL_TIM_STATE_READY;
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions
- *  @brief    Timer Complementary One Pulse functions 
- *
-@verbatim 
-  ==============================================================================
-                ##### Timer Complementary One Pulse functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Start the Complementary One Pulse generation.
-    (+) Stop the Complementary One Pulse.
-    (+) Start the Complementary One Pulse and enable interrupts.
-    (+) Stop the Complementary One Pulse and disable interrupts.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Starts the TIM One Pulse signal generation on the complemetary 
-  *         output.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-  {
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
-  /* Enable the complementary One Pulse output */
-  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-  __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the TIM One Pulse signal generation on the complementary 
-  *         output.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
-  /* Disable the complementary One Pulse output */
-    TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
-
-  /* Disable the Main Ouput */
-    __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-  __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Starts the TIM One Pulse signal generation in interrupt mode on the
-  *         complementary channel.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channel to be enabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
-  /* Enable the TIM Capture/Compare 1 interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
-
-  /* Enable the TIM Capture/Compare 2 interrupt */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
-
-  /* Enable the complementary One Pulse output */
-  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
-
-  /* Enable the Main Ouput */
-  __HAL_TIM_MOE_ENABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-  }
-
-/**
-  * @brief  Stops the TIM One Pulse signal generation in interrupt mode on the
-  *         complementary channel.
-  * @param  htim TIM One Pulse handle
-  * @param  OutputChannel TIM Channel to be disabled
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
-  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
-
-  /* Disable the TIM Capture/Compare 1 interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
-
-  /* Disable the TIM Capture/Compare 2 interrupt */
-  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
-
-  /* Disable the complementary One Pulse output */
-  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
-
-  /* Disable the Main Ouput */
-  __HAL_TIM_MOE_DISABLE(htim);
-
-  /* Disable the Peripheral */
-   __HAL_TIM_DISABLE(htim);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-/** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions
- *  @brief   	Peripheral Control functions 
- *
-@verbatim 
-  ==============================================================================
-                    ##### Peripheral Control functions #####
-  ==============================================================================
-  [..]
-    This section provides functions allowing to:
-    (+) Configure the commutation event in case of use of the Hall sensor interface.
-      (+) Configure Complementary channels, break features and dead time.
-      (+) Configure Master synchronization.
-      (+) Configure timer remapping capabilities.
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  Configure the TIM commutation event sequence.
-  * @note: this function is mandatory to use the commutation event in order to 
-  *        update the configuration at each commutation detection on the TRGI input of the Timer,
-  *        the typical use of this feature is with the use of another Timer(interface Timer)
-  *        configured in Hall sensor interface, this interface Timer will generate the 
-  *        commutation at its TRGO output (connected to Timer used in this function) each time 
-  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
-  * @param  htim TIM handle
-  * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
-  *          This parameter can be one of the following values:
-  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
-  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
-  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
-  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
-  *            @arg TIM_TS_NONE: No trigger is needed 
-  * @param  CommutationSource the Commutation Event source
-  *          This parameter can be one of the following values:
-  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
-  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
-
-  __HAL_LOCK(htim);
-
-  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
-      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
-  {
-    /* Select the Input trigger */
-    htim->Instance->SMCR &= ~TIM_SMCR_TS;
-    htim->Instance->SMCR |= InputTrigger;
-  }
-
-  /* Select the Capture Compare preload feature */
-  htim->Instance->CR2 |= TIM_CR2_CCPC;
-  /* Select the Commutation event source */
-  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
-  htim->Instance->CR2 |= CommutationSource;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the TIM commutation event sequence with interrupt.
-  * @note: this function is mandatory to use the commutation event in order to 
-  *        update the configuration at each commutation detection on the TRGI input of the Timer,
-  *        the typical use of this feature is with the use of another Timer(interface Timer)
-  *        configured in Hall sensor interface, this interface Timer will generate the 
-  *        commutation at its TRGO output (connected to Timer used in this function) each time 
-  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
-  * @param  htim TIM handle
-  * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
-  *          This parameter can be one of the following values:
-  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
-  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
-  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
-  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
-  *            @arg TIM_TS_NONE: No trigger is needed 
-  * @param  CommutationSource the Commutation Event source
-  *          This parameter can be one of the following values:
-  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
-  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
-
-  __HAL_LOCK(htim);
-
-  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
-      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
-  {
-    /* Select the Input trigger */
-    htim->Instance->SMCR &= ~TIM_SMCR_TS;
-    htim->Instance->SMCR |= InputTrigger;
-  }
-
-  /* Select the Capture Compare preload feature */
-  htim->Instance->CR2 |= TIM_CR2_CCPC;
-  /* Select the Commutation event source */
-  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
-  htim->Instance->CR2 |= CommutationSource;
-
-  /* Enable the Commutation Interrupt Request */
-  __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configure the TIM commutation event sequence with DMA.
-  * @note: this function is mandatory to use the commutation event in order to 
-  *        update the configuration at each commutation detection on the TRGI input of the Timer,
-  *        the typical use of this feature is with the use of another Timer(interface Timer)
-  *        configured in Hall sensor interface, this interface Timer will generate the 
-  *        commutation at its TRGO output (connected to Timer used in this function) each time 
-  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
-  * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set
-  * @param  htim TIM handle
-  * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
-  *          This parameter can be one of the following values:
-  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
-  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
-  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
-  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
-  *            @arg TIM_TS_NONE: No trigger is needed 
-  * @param  CommutationSource the Commutation Event source
-  *          This parameter can be one of the following values:
-  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
-  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
-
-  __HAL_LOCK(htim);
-
-  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
-      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
-  {
-    /* Select the Input trigger */
-    htim->Instance->SMCR &= ~TIM_SMCR_TS;
-    htim->Instance->SMCR |= InputTrigger;
-  }
-
-  /* Select the Capture Compare preload feature */
-  htim->Instance->CR2 |= TIM_CR2_CCPC;
-  /* Select the Commutation event source */
-  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
-  htim->Instance->CR2 |= CommutationSource;
-
-  /* Enable the Commutation DMA Request */
-  /* Set the DMA Commutation Callback */
-  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
-  /* Set the DMA error callback */
-  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
-
-  /* Enable the Commutation DMA Request */
-  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configures the TIM in master mode.
-  * @param  htim TIM handle.
-  * @param  sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
-  *         contains the selected trigger output (TRGO) and the Master/Slave 
-  *         mode.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
-  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
-
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Reset the MMS Bits */
-  htim->Instance->CR2 &= ~TIM_CR2_MMS;
-  /* Select the TRGO source */
-  htim->Instance->CR2 |=  sMasterConfig->MasterOutputTrigger;
-
-  /* Reset the MSM Bit */
-  htim->Instance->SMCR &= ~TIM_SMCR_MSM;
-  /* Set or Reset the MSM Bit */
-  htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode;
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief   Configures the Break feature, dead time, Lock level, OSSI/OSSR State
-  *          and the AOE(automatic output enable).
-  * @param  htim TIM handle
-  * @param  sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
-  *         contains the BDTR Register configuration  information for the TIM peripheral.
-  * @retval HAL status
-  */    
-HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
-                                                TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
-{
-  uint32_t tmpbdtr = 0;
-   
-  /* Check the parameters */
-  assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
-  assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
-  assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
-  assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
-  assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
-  assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
-  assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
-
-  /* Process Locked */
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-
-  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
-     the OSSI State, the dead time value and the Automatic Output Enable Bit */
-  
-  /* Set the BDTR bits */
-  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, sBreakDeadTimeConfig->AutomaticOutput);
-  
-  /* Set TIMx_BDTR */
-  htim->Instance->BDTR = tmpbdtr;
-  
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Configures the TIM14 Remapping input capabilities.
-  * @param  htim TIM handle.
-  * @param  Remap specifies the TIM remapping source.
-  *          This parameter can be one of the following values:
-  *            @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO
-  *            @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock
-  *            @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32
-  *            @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
-{
-  __HAL_LOCK(htim);
-
-  /* Check parameters */
-  assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_REMAP(Remap));
-
-  /* Set the Timer remapping configuration */
-  htim->Instance->OR = Remap;
-
-  htim->State = HAL_TIM_STATE_READY;
-
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_Exported_Functions_Group8
-  * @{
-  */
-#if defined(STM32F051x8) || defined(STM32F058xx) ||                         \
-    defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
-    defined(STM32F091xC) || defined (STM32F098xx)
-/**
-  * @brief  Configures the OCRef clear feature
-  * @param  htim TIM handle
-  * @param  sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that
-  *         contains the OCREF clear feature and parameters for the TIM peripheral. 
-  * @param  Channel specifies the TIM Channel
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1
-  *            @arg TIM_CHANNEL_2: TIM Channel 2
-  *            @arg TIM_CHANNEL_3: TIM Channel 3
-  *            @arg TIM_CHANNEL_4: TIM Channel 4
-  *            @arg TIM_Channel_5: TIM Channel 5
-  * @retval None
-  */ 
-HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
-                                           TIM_ClearInputConfigTypeDef *sClearInputConfig,
-                                           uint32_t Channel)
-{ 
-  uint32_t tmpsmcr = 0U;
-
-  /* Check the parameters */ 
-  assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance));
-  assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
-                                        
-  /* Check input state */
-  __HAL_LOCK(htim);
-
-  htim->State = HAL_TIM_STATE_BUSY;
-  
-  switch (sClearInputConfig->ClearInputSource)
-  {
-    case TIM_CLEARINPUTSOURCE_NONE:
-    {
-      /* Get the TIMx SMCR register value */
-      tmpsmcr = htim->Instance->SMCR;
-      
-      /* Clear the OCREF clear selection bit */
-      tmpsmcr &= ~TIM_SMCR_OCCS;
-      
-      /* Clear the ETR Bits */
-      tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
-      
-      /* Set TIMx_SMCR */
-      htim->Instance->SMCR = tmpsmcr;
-   }
-    break;
-    
-    case TIM_CLEARINPUTSOURCE_OCREFCLR:
-    {
-      /* Clear the OCREF clear selection bit */
-      htim->Instance->SMCR &= ~TIM_SMCR_OCCS;
-    }
-    break;
-    
-    case TIM_CLEARINPUTSOURCE_ETR:
-    {
-      /* Check the parameters */ 
-      assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
-      assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
-      assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
-      
-      TIM_ETR_SetConfig(htim->Instance,
-                        sClearInputConfig->ClearInputPrescaler,
-                        sClearInputConfig->ClearInputPolarity,
-                        sClearInputConfig->ClearInputFilter);
-      
-      /* Set the OCREF clear selection bit */
-      htim->Instance->SMCR |= TIM_SMCR_OCCS;
-    }
-    break;
-    default:
-    break;
-  }
-  
-  switch (Channel)
-  { 
-    case TIM_CHANNEL_1:
-      {
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 1 */
-          htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 1 */
-          htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;      
-        }
-      }    
-      break;
-    case TIM_CHANNEL_2:    
-      {
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 2 */
-          htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 2 */
-          htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;      
-        }
-      }    
-    break;
-    case TIM_CHANNEL_3:    
-      {
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 3 */
-          htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 3 */
-          htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;      
-        }
-      }    
-    break;
-    case TIM_CHANNEL_4:    
-      {
-        if(sClearInputConfig->ClearInputState != RESET)
-        {
-          /* Enable the Ocref clear feature for Channel 4 */
-          htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE;
-        }
-        else
-        {
-          /* Disable the Ocref clear feature for Channel 4 */
-          htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;      
-        }
-      }    
-    break;
-    default:  
-    break;
-  } 
-
-  htim->State = HAL_TIM_STATE_READY;
-  
-  __HAL_UNLOCK(htim);
-
-  return HAL_OK;  
-}  
-#endif /* STM32F051x8 || STM32F058xx ||                */
-       /* STM32F071xB || STM32F072xB || STM32F078xx || */
-       /* STM32F091xC || STM32F098xx                   */
-/**
-  * @}
-  */
-
-/** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions 
- *  @brief   Extension Callbacks functions 
- *
-@verbatim 
-  ==============================================================================
-                    ##### Extension Callbacks functions #####
-  ==============================================================================
-  [..]
-    This section provides Extension TIM callback functions:
-    (+) Timer Commutation callback
-    (+) Timer Break callback
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Hall commutation changed callback in non blocking mode 
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIMEx_CommutationCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Hall Break detection callback in non blocking mode 
-  * @param  htim TIM handle
-  * @retval None
-  */
-__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htim);
-
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_TIMEx_BreakCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @brief  TIM DMA Commutation callback.
-  * @param  hdma pointer to DMA handle.
-  * @retval None
-  */
-void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
-{
-  TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  htim->State= HAL_TIM_STATE_READY;
-
-  HAL_TIMEx_CommutationCallback(htim);
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions 
- *  @brief   Extension Peripheral State functions 
- *
-@verbatim 
-  ==============================================================================
-                ##### Extension Peripheral State functions #####
-  ==============================================================================
-  [..]
-    This subsection permit to get in run-time the status of the peripheral 
-    and the data flow.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the TIM Hall Sensor interface state
-  * @param  htim TIM Hall Sensor handle
-  * @retval HAL state
-  */
-HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
-{
-  return htim->State;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIMEx_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Enables or disables the TIM Capture Compare Channel xN.
-  * @param  TIMx  to select the TIM peripheral
-  * @param  Channel specifies the TIM Channel
-  *          This parameter can be one of the following values:
-  *            @arg TIM_CHANNEL_1: TIM Channel 1
-  *            @arg TIM_CHANNEL_2: TIM Channel 2
-  *            @arg TIM_CHANNEL_3: TIM Channel 3
-  * @param  ChannelNState specifies the TIM Channel CCxNE bit new state.
-  *          This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
-  * @retval None
-  */
-static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState)
-{
-  uint32_t tmp = 0U;
-
-  tmp = TIM_CCER_CC1NE << Channel;
-
-  /* Reset the CCxNE Bit */
-  TIMx->CCER &=  ~tmp;
-
-  /* Set or reset the CCxNE Bit */
-  TIMx->CCER |=  (uint32_t)(ChannelNState << Channel);
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_TIM_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_tsc.c b/lib/hal-stm32f0/source/stm32f0xx_hal_tsc.c
deleted file mode 100644
index eaf1697a..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_tsc.c
+++ /dev/null
@@ -1,824 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_tsc.c
-  * @author  MCD Application Team
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the Touch Sensing Controller (TSC) peripheral:
-  *           + Initialization and DeInitialization
-  *           + Channel IOs, Shield IOs and Sampling IOs configuration
-  *           + Start and Stop an acquisition
-  *           + Read acquisition result
-  *           + Interrupts and flags management
-  *         
-  @verbatim
-================================================================================
-                       ##### TSC specific features #####
-================================================================================
-  [..]
-      (+)  Proven and robust surface charge transfer acquisition principle
-
-      (+)  Supports up to 3 capacitive sensing channels per group
-
-      (+)  Capacitive sensing channels can be acquired in parallel offering a very good
-           response time
-
-      (+)  Spread spectrum feature to improve system robustness in noisy environments
-
-      (+)  Full hardware management of the charge transfer acquisition sequence
-
-      (+)  Programmable charge transfer frequency
-
-      (+)  Programmable sampling capacitor I/O pin
-
-      (+)  Programmable channel I/O pin
-
-      (+)  Programmable max count value to avoid long acquisition when a channel is faulty
-
-      (+)  Dedicated end of acquisition and max count error flags with interrupt capability
-
-      (+)  One sampling capacitor for up to 3 capacitive sensing channels to reduce the system
-           components
-      (+)  Compatible with proximity, touchkey, linear and rotary touch sensor implementation
-
-                          ##### How to use this driver #####
-================================================================================
-  [..]
-    (#) Enable the TSC interface clock using __HAL_RCC_TSC_CLK_ENABLE() macro.
-
-    (#) GPIO pins configuration
-      (++) Enable the clock for the TSC GPIOs using __HAL_RCC_GPIOx_CLK_ENABLE() macro.
-      (++) Configure the TSC pins used as sampling IOs in alternate function output Open-Drain mode,
-           and TSC pins used as channel/shield IOs in alternate function output Push-Pull mode
-           using HAL_GPIO_Init() function.
-      (++) Configure the alternate function on all the TSC pins using HAL_xxxx() function.
-
-    (#) Interrupts configuration
-      (++) Configure the NVIC (if the interrupt model is used) using HAL_xxx() function.
-
-    (#) TSC configuration
-      (++) Configure all TSC parameters and used TSC IOs using HAL_TSC_Init() function.
-
-  *** Acquisition sequence ***
-  ===================================
-  [..]
-    (+) Discharge all IOs using HAL_TSC_IODischarge() function.
-    (+) Wait a certain time allowing a good discharge of all capacitors. This delay depends
-        of the sampling capacitor and electrodes design.
-    (+) Select the channel IOs to be acquired using HAL_TSC_IOConfig() function.
-    (+) Launch the acquisition using either HAL_TSC_Start() or HAL_TSC_Start_IT() function.
-        If the synchronized mode is selected, the acquisition will start as soon as the signal
-        is received on the synchro pin.
-    (+) Wait the end of acquisition using either HAL_TSC_PollForAcquisition() or
-        HAL_TSC_GetState() function or using WFI instruction for example.
-    (+) Check the group acquisition status using HAL_TSC_GroupGetStatus() function.
-    (+) Read the acquisition value using HAL_TSC_GroupGetValue() function.
-      
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-#ifdef HAL_TSC_MODULE_ENABLED
-
-#if defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || \
-    defined(STM32F042x6) || defined(STM32F072xB) ||                         \
-    defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx)
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup TSC TSC
-  * @brief TSC HAL module driver
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-static uint32_t TSC_extract_groups(uint32_t iomask);
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup TSC_Exported_Functions TSC Exported Functions
-  * @{
-  */ 
-
-/** @defgroup TSC_Exported_Functions_Group1 Initialization/de-initialization functions 
- *  @brief    Initialization and Configuration functions 
- *
-@verbatim    
- ===============================================================================
-              ##### Initialization and de-initialization functions #####
- ===============================================================================
-    [..]  This section provides functions allowing to:
-      (+) Initialize and configure the TSC.
-      (+) De-initialize the TSC.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initializes the TSC peripheral according to the specified parameters 
-  *         in the TSC_InitTypeDef structure.           
-  * @param  htsc TSC handle
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc)
-{
-  /* Check TSC handle allocation */
-  if (htsc == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_TSC_CTPH(htsc->Init.CTPulseHighLength));
-  assert_param(IS_TSC_CTPL(htsc->Init.CTPulseLowLength));
-  assert_param(IS_TSC_SS(htsc->Init.SpreadSpectrum));
-  assert_param(IS_TSC_SSD(htsc->Init.SpreadSpectrumDeviation));
-  assert_param(IS_TSC_SS_PRESC(htsc->Init.SpreadSpectrumPrescaler));
-  assert_param(IS_TSC_PG_PRESC(htsc->Init.PulseGeneratorPrescaler));
-  assert_param(IS_TSC_MCV(htsc->Init.MaxCountValue));
-  assert_param(IS_TSC_IODEF(htsc->Init.IODefaultMode));
-  assert_param(IS_TSC_SYNC_POL(htsc->Init.SynchroPinPolarity));
-  assert_param(IS_TSC_ACQ_MODE(htsc->Init.AcquisitionMode));
-  assert_param(IS_TSC_MCE_IT(htsc->Init.MaxCountInterrupt));
-
-  if(htsc->State == HAL_TSC_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    htsc->Lock = HAL_UNLOCKED;
-  }    
-
-  /* Initialize the TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
-
-  /* Init the low level hardware : GPIO, CLOCK, CORTEX */
-  HAL_TSC_MspInit(htsc);
-
-  /*--------------------------------------------------------------------------*/  
-  /* Set TSC parameters */
-
-  /* Enable TSC */
-  htsc->Instance->CR = TSC_CR_TSCE;
-  
-  /* Set all functions */
-  htsc->Instance->CR |= (htsc->Init.CTPulseHighLength |
-                         htsc->Init.CTPulseLowLength |
-                         (uint32_t)(htsc->Init.SpreadSpectrumDeviation << 17U) |
-                         htsc->Init.SpreadSpectrumPrescaler |
-                         htsc->Init.PulseGeneratorPrescaler |
-                         htsc->Init.MaxCountValue |
-                         htsc->Init.SynchroPinPolarity |
-                         htsc->Init.AcquisitionMode);
-
-  /* Spread spectrum */
-  if (htsc->Init.SpreadSpectrum == ENABLE)
-  {
-    htsc->Instance->CR |= TSC_CR_SSE;
-  }
-  
-  /* Disable Schmitt trigger hysteresis on all used TSC IOs */
-  htsc->Instance->IOHCR = (uint32_t)(~(htsc->Init.ChannelIOs | htsc->Init.ShieldIOs | htsc->Init.SamplingIOs));
-
-  /* Set channel and shield IOs */
-  htsc->Instance->IOCCR = (htsc->Init.ChannelIOs | htsc->Init.ShieldIOs);
-  
-  /* Set sampling IOs */
-  htsc->Instance->IOSCR = htsc->Init.SamplingIOs;
-  
-  /* Set the groups to be acquired */
-  htsc->Instance->IOGCSR = TSC_extract_groups(htsc->Init.ChannelIOs);
-  
-  /* Clear interrupts */
-  htsc->Instance->IER &= (uint32_t)(~(TSC_IT_EOA | TSC_IT_MCE));
-  
-  /* Clear flags */
-  htsc->Instance->ICR = (TSC_FLAG_EOA | TSC_FLAG_MCE);
-
-  /*--------------------------------------------------------------------------*/
-  
-  /* Initialize the TSC state */
-  htsc->State = HAL_TSC_STATE_READY;
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Deinitializes the TSC peripheral registers to their default reset values.
-  * @param  htsc TSC handle  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef* htsc)
-{
-  /* Check TSC handle allocation */
-  if (htsc == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-   
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
- 
-  /* DeInit the low level hardware */
-  HAL_TSC_MspDeInit(htsc);
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_RESET;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Initializes the TSC MSP.
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.  
-  * @retval None
-  */
-__weak void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_MspInit could be implemented in the user file.
-   */ 
-}
-
-/**
-  * @brief  DeInitializes the TSC MSP.
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.  
-  * @retval None
-  */
-__weak void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_MspDeInit could be implemented in the user file.
-   */ 
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TSC_Exported_Functions_Group2 IO operation functions
- *  @brief    IO operation functions 
- *
-@verbatim   
- ===============================================================================
-             ##### IO operation functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Start acquisition in polling mode.
-      (+) Start acquisition in interrupt mode.
-      (+) Stop conversion in polling mode.
-      (+) Stop conversion in interrupt mode.
-      (+) Get group acquisition status.
-      (+) Get group acquisition value.
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Starts the acquisition.
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
-
-  /* Clear interrupts */
-  __HAL_TSC_DISABLE_IT(htsc, (TSC_IT_EOA | TSC_IT_MCE));
-
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-
-  /* Set touch sensing IOs not acquired to the specified IODefaultMode */
-  if (htsc->Init.IODefaultMode == TSC_IODEF_OUT_PP_LOW)
-  {
-    __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  }
-  else
-  {
-    __HAL_TSC_SET_IODEF_INFLOAT(htsc);
-  }
-  
-  /* Launch the acquisition */
-  __HAL_TSC_START_ACQ(htsc);
-  
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enables the interrupt and starts the acquisition
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_TSC_MCE_IT(htsc->Init.MaxCountInterrupt));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_BUSY;
-  
-  /* Enable end of acquisition interrupt */
-  __HAL_TSC_ENABLE_IT(htsc, TSC_IT_EOA);
-
-  /* Enable max count error interrupt (optional) */
-  if (htsc->Init.MaxCountInterrupt == ENABLE)
-  {
-    __HAL_TSC_ENABLE_IT(htsc, TSC_IT_MCE);
-  }
-  else
-  {
-    __HAL_TSC_DISABLE_IT(htsc, TSC_IT_MCE);
-  }
-
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-  
-  /* Set touch sensing IOs not acquired to the specified IODefaultMode */
-  if (htsc->Init.IODefaultMode == TSC_IODEF_OUT_PP_LOW)
-  {
-    __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  }
-  else
-  {
-    __HAL_TSC_SET_IODEF_INFLOAT(htsc);
-  }
-  
-  /* Launch the acquisition */
-  __HAL_TSC_START_ACQ(htsc);
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the acquisition previously launched in polling mode
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Stop the acquisition */
-  __HAL_TSC_STOP_ACQ(htsc);
-
-  /* Set touch sensing IOs in low power mode (output push-pull) */
-  __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stops the acquisition previously launched in interrupt mode
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Stop the acquisition */
-  __HAL_TSC_STOP_ACQ(htsc);
-  
-  /* Set touch sensing IOs in low power mode (output push-pull) */
-  __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  
-  /* Disable interrupts */
-  __HAL_TSC_DISABLE_IT(htsc, (TSC_IT_EOA | TSC_IT_MCE));
-
-  /* Clear flags */
-  __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE));
-  
-  /* Change TSC state */
-  htsc->State = HAL_TSC_STATE_READY;
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Gets the acquisition status for a group
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  gx_index Index of the group
-  * @retval Group status
-  */
-TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_GROUP_INDEX(gx_index));
-
-  /* Return the group status */ 
-  return(__HAL_TSC_GET_GROUP_STATUS(htsc, gx_index));
-}
-
-/**
-  * @brief  Gets the acquisition measure for a group
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  gx_index Index of the group
-  * @retval Acquisition measure
-  */
-uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index)
-{       
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  assert_param(IS_GROUP_INDEX(gx_index));
-
-  /* Return the group acquisition counter */ 
-  return htsc->Instance->IOGXCR[gx_index];
-}
-
-/**
-  * @}
-  */
-  
-/** @defgroup TSC_Exported_Functions_Group3 Peripheral Control functions
- *  @brief    Peripheral Control functions 
- *
-@verbatim   
- ===============================================================================
-             ##### Peripheral Control functions #####
- ===============================================================================  
-    [..]  This section provides functions allowing to:
-      (+) Configure TSC IOs
-      (+) Discharge TSC IOs
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Configures TSC IOs
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  config pointer to the configuration structure.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
- 
-  /* Process locked */
-  __HAL_LOCK(htsc);
-
-  /* Stop acquisition */
-  __HAL_TSC_STOP_ACQ(htsc);
-
-  /* Disable Schmitt trigger hysteresis on all used TSC IOs */
-  htsc->Instance->IOHCR = (uint32_t)(~(config->ChannelIOs | config->ShieldIOs | config->SamplingIOs));
-
-  /* Set channel and shield IOs */
-  htsc->Instance->IOCCR = (config->ChannelIOs | config->ShieldIOs);
-  
-  /* Set sampling IOs */
-  htsc->Instance->IOSCR = config->SamplingIOs;
-  
-  /* Set groups to be acquired */
-  htsc->Instance->IOGCSR = TSC_extract_groups(config->ChannelIOs);
-    
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Discharge TSC IOs
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @param  choice enable or disable
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice)
-{       
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  if (choice == ENABLE)
-  {
-    __HAL_TSC_SET_IODEF_OUTPPLOW(htsc);
-  }
-  else
-  {
-    __HAL_TSC_SET_IODEF_INFLOAT(htsc);
-  }
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  /* Return the group acquisition counter */ 
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TSC_Exported_Functions_Group4 State functions
- *  @brief   State functions 
- *
-@verbatim   
- ===============================================================================
-            ##### State functions #####
- ===============================================================================  
-    [..]
-    This subsection provides functions allowing to
-      (+) Get TSC state.
-      (+) Poll for acquisition completed.
-      (+) Handles TSC interrupt request.
-         
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the TSC state
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL state
-  */
-HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-  
-  if (htsc->State == HAL_TSC_STATE_BUSY)
-  {
-    /* Check end of acquisition flag */
-    if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET)
-    {
-      /* Check max count error flag */
-      if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET)
-      {
-        /* Change TSC state */
-        htsc->State = HAL_TSC_STATE_ERROR;
-      }
-      else
-      {
-        /* Change TSC state */
-        htsc->State = HAL_TSC_STATE_READY;
-      }
-    }
-  }
-  
-  /* Return TSC state */
-  return htsc->State;
-}
-
-/**
-  * @brief  Start acquisition and wait until completion
-  * @note   There is no need of a timeout parameter as the max count error is already
-  *         managed by the TSC peripheral.
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval HAL state
-  */
-HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Process locked */
-  __HAL_LOCK(htsc);
-  
-  /* Check end of acquisition */
-  while (HAL_TSC_GetState(htsc) == HAL_TSC_STATE_BUSY)
-  {
-    /* The timeout (max count error) is managed by the TSC peripheral itself. */
-  }
-
-  /* Process unlocked */
-  __HAL_UNLOCK(htsc);
-  
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handles TSC interrupt request  
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval None
-  */
-void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc)
-{
-  /* Check the parameters */
-  assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance));
-
-  /* Check if the end of acquisition occured */
-  if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET)
-  {
-    /* Clear EOA flag */
-    __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_EOA);
-  }
-  
-  /* Check if max count error occured */
-  if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET)
-  {
-    /* Clear MCE flag */
-    __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_MCE);
-    /* Change TSC state */
-    htsc->State = HAL_TSC_STATE_ERROR;
-    /* Conversion completed callback */
-    HAL_TSC_ErrorCallback(htsc);
-  }
-  else
-  {
-    /* Change TSC state */
-    htsc->State = HAL_TSC_STATE_READY;
-    /* Conversion completed callback */
-    HAL_TSC_ConvCpltCallback(htsc);
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup TSC_Exported_Functions_Group5 Callback functions
- *  @brief   Callback functions 
- *  @{
- */
- 
-/**
-  * @brief  Acquisition completed callback in non blocking mode 
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval None
-  */
-__weak void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_ConvCpltCallback could be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Error callback in non blocking mode
-  * @param  htsc pointer to a TSC_HandleTypeDef structure that contains
-  *         the configuration information for the specified TSC.
-  * @retval None
-  */
-__weak void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(htsc);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_TSC_ErrorCallback could be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup TSC_Private_Functions TSC Private Functions
- *  @{
- */
-      
-/**
-  * @brief  Utility function used to set the acquired groups mask
-  * @param  iomask Channels IOs mask
-  * @retval Acquired groups mask
-  */
-static uint32_t TSC_extract_groups(uint32_t iomask)
-{
-  uint32_t groups = 0U;
-  uint32_t idx;
-  
-  for (idx = 0U; idx < TSC_NB_OF_GROUPS; idx++)
-  {
-    if ((iomask & (0x0FU << (idx * 4U))) != RESET)
-    {
-      groups |= (1U << idx);
-    }
-  }
-  
-  return groups;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-#endif /* defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || */
-       /* defined(STM32F042x6) || defined(STM32F072xB) ||                         */
-       /* defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx) */
-
-#endif /* HAL_TSC_MODULE_ENABLED */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_uart.c b/lib/hal-stm32f0/source/stm32f0xx_hal_uart.c
deleted file mode 100644
index 564e2a67..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_uart.c
+++ /dev/null
@@ -1,2796 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_uart.c
-  * @author  MCD Application Team
-  * @brief   UART HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Errors functions
-  *
-  @verbatim
- ===============================================================================
-                        ##### How to use this driver #####
- ===============================================================================
-  [..]
-    The UART HAL driver can be used as follows:
-
-    (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
-    (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
-        (++) Enable the USARTx interface clock.
-        (++) UART pins configuration:
-            (+++) Enable the clock for the UART GPIOs.
-            (+++) Configure these UART pins as alternate function pull-up.
-        (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
-             and HAL_UART_Receive_IT() APIs):
-            (+++) Configure the USARTx interrupt priority.
-            (+++) Enable the NVIC USART IRQ handle.
-        (++) UART interrupts handling:
-              -@@-  The specific UART interrupts (Transmission complete interrupt,
-                RXNE interrupt and Error Interrupts) are managed using the macros
-                __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit and receive processes.
-        (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
-             and HAL_UART_Receive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-    (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
-        flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
-
-    (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
-        in the huart handle AdvancedInit structure.
-
-    (#) For the UART asynchronous mode, initialize the UART registers by calling
-        the HAL_UART_Init() API.
-
-    (#) For the UART Half duplex mode, initialize the UART registers by calling
-        the HAL_HalfDuplex_Init() API.
-
-    (#) For the UART Multiprocessor mode, initialize the UART registers
-        by calling the HAL_MultiProcessor_Init() API.
-
-    (#) For the UART RS485 Driver Enabled mode, initialize the UART registers
-        by calling the HAL_RS485Ex_Init() API.
-
-   [..]
-    (@) These APIs(HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_MultiProcessor_Init(),
-        also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
-        calling the customized HAL_UART_MspInit() API.
-
-   [..]
-   [..] Three operation modes are available within this driver :     
-  
-     *** Polling mode IO operation ***
-     =================================
-     [..]    
-       (+) Send an amount of data in blocking mode using HAL_UART_Transmit() 
-       (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
-       
-     *** Interrupt mode IO operation ***    
-     ===================================
-     [..]    
-       (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT() 
-       (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback 
-       (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_TxCpltCallback
-       (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT() 
-       (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback 
-       (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_RxCpltCallback                                      
-       (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can 
-            add his own code by customization of function pointer HAL_UART_ErrorCallback
-
-     *** DMA mode IO operation ***    
-     ==============================
-     [..] 
-       (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA() 
-       (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback 
-       (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_TxCpltCallback
-       (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA() 
-       (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback 
-       (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can 
-            add his own code by customization of function pointer HAL_UART_RxCpltCallback                                      
-       (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can 
-            add his own code by customization of function pointer HAL_UART_ErrorCallback
-       (+) Pause the DMA Transfer using HAL_UART_DMAPause()      
-       (+) Resume the DMA Transfer using HAL_UART_DMAResume()  
-       (+) Stop the DMA Transfer using HAL_UART_DMAStop()      
-    
-     *** UART HAL driver macros list ***
-     ============================================= 
-     [..]
-       Below the list of most used macros in UART HAL driver.
-       
-      (+) __HAL_UART_ENABLE: Enable the UART peripheral 
-      (+) __HAL_UART_DISABLE: Disable the UART peripheral     
-      (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
-      (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
-      (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
-      (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
-      
-     [..] 
-       (@) You can refer to the UART HAL driver header file for more useful macros 
-      
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup UART UART
-  * @brief HAL UART module driver
-  * @{
-  */
-
-#ifdef HAL_UART_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup UART_Private_Constants UART Private Constants
-  * @{
-  */
-#define UART_CR1_FIELDS  ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
-                                     USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup UART_Private_Functions
-  * @{
-  */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
-static void UART_DMAError(DMA_HandleTypeDef *hdma);
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
-HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
-HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup UART_Exported_Functions UART Exported Functions
-  * @{
-  */
-
-/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
-  *  @brief    Initialization and Configuration functions
-  *
-@verbatim
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
-    in asynchronous mode.
-      (+) For the asynchronous mode the parameters below can be configured:
-        (++) Baud Rate
-        (++) Word Length
-        (++) Stop Bit
-        (++) Parity
-        (++) Hardware flow control
-        (++) Receiver/transmitter modes
-        (++) Over Sampling Method
-        (++) One-Bit Sampling Method
-      (+) For the asynchronous mode, the following advanced features can be configured as well:
-        (++) TX and/or RX pin level inversion
-        (++) data logical level inversion
-        (++) RX and TX pins swap
-        (++) RX overrun detection disabling
-        (++) DMA disabling on RX error
-        (++) MSB first on communication line
-        (++) auto Baud rate detection
-    [..]
-    The HAL_UART_Init(), HAL_HalfDuplex_Init() and HAL_MultiProcessor_Init()
-    API follow respectively the UART asynchronous, UART Half duplex and multiprocessor mode
-    configuration procedures (details for the procedures are available in reference manual).
-
-@endverbatim
-  * @{
-  */
-
-/*
-  Additional Table:  If the parity is enabled, then the MSB bit of the data written
-                     in the data register is transmitted but is changed by the parity bit.
-                     According to device capability (support or not of 7-bit word length),
-                     frame length is either defined by the M bit (8-bits or 9-bits)
-                     or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
-                     Possible UART frame formats are as listed in the following table:
-            
-      Table 1. UART frame format.             
-      +-----------------------------------------------------------------------+
-      |       M bit       |  PCE bit  |             UART frame                |
-      |-------------------|-----------|---------------------------------------|
-      |         0         |     0     |    | SB |    8-bit data   | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         0         |     1     |    | SB | 7-bit data | PB | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         1         |     0     |    | SB |    9-bit data   | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         1         |     1     |    | SB | 8-bit data | PB | STB |     |
-      +-----------------------------------------------------------------------+
-      |  M1 bit |  M0 bit |  PCE bit  |             UART frame                |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    0    |     0     |    | SB |    8 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    0    |     1     |    | SB | 7 bit data | PB | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    1    |     0     |    | SB |    9 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    1    |     1     |    | SB | 8 bit data | PB | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    1    |    0    |     0     |    | SB |    7 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    1    |    0    |     1     |    | SB | 6 bit data | PB | STB |     |
-      +-----------------------------------------------------------------------+
-
-*/
-
-/**
-  * @brief Initialize the UART mode according to the specified
-  *        parameters in the UART_InitTypeDef and initialize the associated handle.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
-  {
-    /* Check the parameters */
-    assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
-  }
-  else
-  {
-    /* Check the parameters */
-    assert_param(IS_UART_INSTANCE(huart->Instance));
-  }
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  /* In asynchronous mode, the following bits must be kept cleared:
-  - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register,
-  - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported)  bits in the USART_CR3 register. */
-#if defined (USART_CR2_LINEN)
-  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-#else
-  CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
-#endif
-#if defined (USART_CR3_SCEN)
-#if defined (USART_CR3_IREN)
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-#else
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
-#endif
-#else
-#if defined (USART_CR3_IREN)
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN));
-#else
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
-#endif
-#endif
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-/**
-  * @brief Initialize the half-duplex mode according to the specified
-  *        parameters in the UART_InitTypeDef and creates the associated handle.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check UART instance */
-  assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  /* In half-duplex mode, the following bits must be kept cleared:
-  - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register,
-  - SCEN (if Smartcard is supported), and IREN (if IrDA is supported)  bits in the USART_CR3 register. */
-#if defined (USART_CR2_LINEN)
-  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-#else
-  CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
-#endif
-#if defined (USART_CR3_SCEN)
-#if defined (USART_CR3_IREN)
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
-#else
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_SCEN);
-#endif
-#else
-#if defined (USART_CR3_IREN)
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_IREN);
-#endif
-#endif
-
-  /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
-  SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-/**
-  * @brief Initialize the multiprocessor mode according to the specified
-  *        parameters in the UART_InitTypeDef and initialize the associated handle.
-  * @param huart UART handle.
-  * @param Address UART node address (4-, 6-, 7- or 8-bit long).
-  * @param WakeUpMethod specifies the UART wakeup method.
-  *        This parameter can be one of the following values:
-  *          @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection
-  *          @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark
-  * @note  If the user resorts to idle line detection wake up, the Address parameter
-  *        is useless and ignored by the initialization function.
-  * @note  If the user resorts to address mark wake up, the address length detection
-  *        is configured by default to 4 bits only. For the UART to be able to
-  *        manage 6-, 7- or 8-bit long addresses detection, the API
-  *        HAL_MultiProcessorEx_AddressLength_Set() must be called after
-  *        HAL_MultiProcessor_Init().
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the wake up method parameter */
-  assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  /* In multiprocessor mode, the following bits must be kept cleared:
-  - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register,
-  - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */
-#if defined (USART_CR2_LINEN)
-  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-#else
-  CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
-#endif
-#if defined (USART_CR3_SCEN)
-#if defined (USART_CR3_IREN)
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-#else
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
-#endif
-#else
-#if defined (USART_CR3_IREN)
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN));
-#else
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
-#endif
-#endif
-
-  if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
-  {
-    /* If address mark wake up method is chosen, set the USART address node */
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
-  }
-
-  /* Set the wake up method by setting the WAKE bit in the CR1 register */
-  MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-/**
-  * @brief DeInitialize the UART peripheral.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_UART_INSTANCE(huart->Instance));
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  huart->Instance->CR1 = 0x0U;
-  huart->Instance->CR2 = 0x0U;
-  huart->Instance->CR3 = 0x0U;
-
-  /* DeInit the low level hardware */
-  HAL_UART_MspDeInit(huart);
-
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-  huart->gState    = HAL_UART_STATE_RESET;
-  huart->RxState   = HAL_UART_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the UART MSP.
-  * @param huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the UART MSP.
-  * @param huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Exported_Functions_Group2 IO operation functions
-  * @brief UART Transmit/Receive functions
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    This subsection provides a set of functions allowing to manage the UART asynchronous
-    and Half duplex data transfers.
-
-    (#) There are two mode of transfer:
-       (++) Blocking mode: The communication is performed in polling mode.
-           The HAL status of all data processing is returned by the same function
-           after finishing transfer.
-       (++) Non-Blocking mode: The communication is performed using Interrupts
-           or DMA, These API's return the HAL status.
-           The end of the data processing will be indicated through the
-           dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
-           using DMA mode.
-           The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
-           will be executed respectively at the end of the transmit or Receive process
-           The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
-
-    (#) Blocking mode API's are :
-        (++) HAL_UART_Transmit()
-        (++) HAL_UART_Receive()
-
-    (#) Non-Blocking mode API's with Interrupt are :
-        (++) HAL_UART_Transmit_IT()
-        (++) HAL_UART_Receive_IT()
-        (++) HAL_UART_IRQHandler()
-
-    (#) Non-Blocking mode API's with DMA are :
-        (++) HAL_UART_Transmit_DMA()
-        (++) HAL_UART_Receive_DMA()
-        (++) HAL_UART_DMAPause()
-        (++) HAL_UART_DMAResume()
-        (++) HAL_UART_DMAStop()
-
-    (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
-        (++) HAL_UART_TxHalfCpltCallback()
-        (++) HAL_UART_TxCpltCallback()
-        (++) HAL_UART_RxHalfCpltCallback()
-        (++) HAL_UART_RxCpltCallback()
-        (++) HAL_UART_ErrorCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (++) HAL_UART_Abort()
-        (++) HAL_UART_AbortTransmit()
-        (++) HAL_UART_AbortReceive()
-        (++) HAL_UART_Abort_IT()
-        (++) HAL_UART_AbortTransmit_IT()
-        (++) HAL_UART_AbortReceive_IT()
-
-    (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
-        (++) HAL_UART_AbortCpltCallback()
-        (++) HAL_UART_AbortTransmitCpltCallback()
-        (++) HAL_UART_AbortReceiveCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-        (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-             to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-             Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-             and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side.
-             If user wants to abort it, Abort services should be called by user.
-        (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-             This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
-             Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
-
-    -@- In the Half duplex communication, it is forbidden to run the transmit
-        and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Send an amount of data in blocking mode.
-  * @param huart UART handle.
-  * @param pData Pointer to data buffer.
-  * @param Size Amount of data to be sent.
-  * @param Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint32_t tickstart = 0U;
-
-  /* Check that a Tx process is not already ongoing */
-  if(huart->gState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->gState = HAL_UART_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    huart->TxXferSize = Size;
-    huart->TxXferCount = Size;
-    while(huart->TxXferCount > 0)
-    {
-      huart->TxXferCount--;
-      if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData;
-        huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        pData += 2;
-      }
-      else
-      {
-        huart->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-      }
-    }
-    if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* At end of Tx process, restore huart->gState to Ready */
-    huart->gState = HAL_UART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in blocking mode.
-  * @param huart UART handle.
-  * @param pData pointer to data buffer.
-  * @param Size amount of data to be received.
-  * @param Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp;
-  uint16_t uhMask;
-  uint32_t tickstart = 0;
-
-  /* Check that a Rx process is not already ongoing */
-  if(huart->RxState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->RxState = HAL_UART_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    huart->RxXferSize = Size;
-    huart->RxXferCount = Size;
-
-    /* Computation of UART mask to apply to RDR register */
-    UART_MASK_COMPUTATION(huart);
-    uhMask = huart->Mask;
-
-    /* as long as data have to be received */
-    while(huart->RxXferCount > 0U)
-    {
-      huart->RxXferCount--;
-      if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pData ;
-        *tmp = (uint16_t)(huart->Instance->RDR & uhMask);
-        pData +=2U;
-      }
-      else
-      {
-        *pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of Rx process, restore huart->RxState to Ready */
-    huart->RxState = HAL_UART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Send an amount of data in interrupt mode.
-  * @param huart UART handle.
-  * @param pData pointer to data buffer.
-  * @param Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(huart->gState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pTxBuffPtr = pData;
-    huart->TxXferSize = Size;
-    huart->TxXferCount = Size;
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->gState = HAL_UART_STATE_BUSY_TX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the UART Transmit Data Register Empty Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in interrupt mode.
-  * @param huart UART handle.
-  * @param pData pointer to data buffer.
-  * @param Size amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(huart->RxState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pRxBuffPtr = pData;
-    huart->RxXferSize = Size;
-    huart->RxXferCount = Size;
-
-    /* Computation of UART mask to apply to RDR register */
-    UART_MASK_COMPUTATION(huart);
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->RxState = HAL_UART_STATE_BUSY_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the UART Parity Error and Data Register not empty Interrupts */
-    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Send an amount of data in DMA mode.
-  * @param huart UART handle.
-  * @param pData pointer to data buffer.
-  * @param Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Tx process is not already ongoing */
-  if(huart->gState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy into TDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pTxBuffPtr = pData;
-    huart->TxXferSize = Size;
-    huart->TxXferCount = Size;
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->gState = HAL_UART_STATE_BUSY_TX;
-
-    /* Set the UART DMA transfer complete callback */
-    huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
-
-    /* Set the UART DMA Half transfer complete callback */
-    huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
-
-    /* Set the DMA error callback */
-    huart->hdmatx->XferErrorCallback = UART_DMAError;
-
-    /* Set the DMA abort callback */
-    huart->hdmatx->XferAbortCallback = NULL;
-
-    /* Enable the UART transmit DMA channel */
-    HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the UART CR3 register */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in DMA mode.
-  * @param huart UART handle.
-  * @param pData pointer to data buffer.
-  * @param Size amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled by DMA from halfword frontier). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
-  /* Check that a Rx process is not already ongoing */
-  if(huart->RxState == HAL_UART_STATE_READY)
-  {
-    if((pData == NULL ) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy from RDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      if((((uint32_t)pData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(huart);
-
-    huart->pRxBuffPtr = pData;
-    huart->RxXferSize = Size;
-
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-    huart->RxState = HAL_UART_STATE_BUSY_RX;
-
-    /* Set the UART DMA transfer complete callback */
-    huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
-
-    /* Set the UART DMA Half transfer complete callback */
-    huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
-
-    /* Set the DMA error callback */
-    huart->hdmarx->XferErrorCallback = UART_DMAError;
-
-    /* Set the DMA abort callback */
-    huart->hdmarx->XferAbortCallback = NULL;
-
-    /* Enable the DMA channel */
-    HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(huart);
-
-    /* Enable the UART Parity Error Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the UART CR3 register */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Pause the DMA Transfer.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  if ((huart->gState == HAL_UART_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)))
-  {
-    /* Disable the UART DMA Tx request */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-  }
-  if ((huart->RxState == HAL_UART_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)))
-  {
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the UART DMA Rx request */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Resume the DMA Transfer.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  if(huart->gState == HAL_UART_STATE_BUSY_TX)
-  {
-    /* Enable the UART DMA Tx request */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-  }
-  if(huart->RxState == HAL_UART_STATE_BUSY_RX)
-  {
-    /* Clear the Overrun flag before resuming the Rx transfer */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
-
-    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-    SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the UART DMA Rx request */
-    SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Stop the DMA Transfer.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
-     HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: 
-     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete  
-     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of 
-     the stream and the corresponding call back is executed. */
-
-  /* Stop UART DMA Tx request if ongoing */
-  if ((huart->gState == HAL_UART_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel */
-    if(huart->hdmatx != NULL)
-    {
-      HAL_DMA_Abort(huart->hdmatx);
-    }
-
-    UART_EndTxTransfer(huart);
-  }
-
-  /* Stop UART DMA Rx request if ongoing */
-  if ((huart->RxState == HAL_UART_STATE_BUSY_RX) &&
-      (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel */
-    if(huart->hdmarx != NULL)
-    {
-      HAL_DMA_Abort(huart->hdmarx);
-    }
-
-    UART_EndRxTransfer(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the UART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmatx);
-    }
-  }
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  huart->TxXferCount = 0U; 
-  huart->RxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->gState and huart->RxState to Ready */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (blocking mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the UART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmatx);
-    }
-  }
-
-  /* Reset Tx transfer counter */
-  huart->TxXferCount = 0U; 
-
-  /* Restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (blocking mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* Set the UART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      huart->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(huart->hdmarx);
-    }
-  }
-
-  /* Reset Rx transfer counter */
-  huart->RxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->RxState to Ready */
-  huart->RxState = HAL_UART_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
-{
-  uint32_t abortcplt = 1U;
-  
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(huart->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-    {
-      huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
-    }
-    else
-    {
-      huart->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(huart->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-    {
-      huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
-    }
-    else
-    {
-      huart->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the UART DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at UART level */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* UART Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
-      {
-        huart->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* UART Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
-      {
-        huart->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1U;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1U)
-  {
-    /* Reset Tx and Rx transfer counters */
-    huart->TxXferCount = 0U; 
-    huart->RxXferCount = 0U;
-
-    /* Reset errorCode */
-    huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-    /* Restore huart->gState and huart->RxState to Ready */
-    huart->gState  = HAL_UART_STATE_READY;
-    huart->RxState = HAL_UART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_UART_AbortCpltCallback(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Tx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* Disable the UART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmatx != NULL)
-    {
-      /* Set the UART DMA Abort callback : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-      huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
-      {
-        /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
-        huart->hdmatx->XferAbortCallback(huart->hdmatx);
-      }
-    }
-    else
-    {
-      /* Reset Tx transfer counter */
-      huart->TxXferCount = 0U; 
-
-      /* Restore huart->gState to Ready */
-      huart->gState = HAL_UART_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_UART_AbortTransmitCpltCallback(huart);
-    }
-  }
-  else
-  {
-    /* Reset Tx transfer counter */
-    huart->TxXferCount = 0U; 
-
-    /* Restore huart->gState to Ready */
-    huart->gState = HAL_UART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_UART_AbortTransmitCpltCallback(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing Receive transfer (Interrupt mode).
-  * @param  huart UART handle.
-  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable UART Interrupts (Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the UART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(huart->hdmarx != NULL)
-    {
-      /* Set the UART DMA Abort callback : 
-         will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
-      huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
-      {
-        /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
-        huart->hdmarx->XferAbortCallback(huart->hdmarx);
-      }
-    }
-    else
-    {
-      /* Reset Rx transfer counter */
-      huart->RxXferCount = 0U; 
-
-      /* Clear the Error flags in the ICR register */
-      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-      /* Restore huart->RxState to Ready */
-      huart->RxState = HAL_UART_STATE_READY;
-
-      /* As no DMA to be aborted, call directly user Abort complete callback */
-      HAL_UART_AbortReceiveCpltCallback(huart);
-    }
-  }
-  else
-  {
-    /* Reset Rx transfer counter */
-    huart->RxXferCount = 0U; 
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-    /* Restore huart->RxState to Ready */
-    huart->RxState = HAL_UART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_UART_AbortReceiveCpltCallback(huart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Handle UART interrupt request.
-  * @param huart UART handle.
-  * @retval None
-  */
-void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
-{
-  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
-  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-  if (errorflags == RESET)
-  {
-    /* UART in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      UART_Receive_IT(huart);
-      return;
-    }
-  }  
-
-  /* If some errors occur */
-  cr3its = READ_REG(huart->Instance->CR3);
-  if(   (errorflags != RESET)
-     && (   ((cr3its & USART_CR3_EIE) != RESET)
-         || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
-  {
-    /* UART parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_PE;
-    }
-
-    /* UART frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_FE;
-    }
-
-    /* UART noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_NE;
-    }
-    
-    /* UART Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
-
-      huart->ErrorCode |= HAL_UART_ERROR_ORE;
-    }
-
-    /* Call UART Error Call back function if need be --------------------------*/
-    if(huart->ErrorCode != HAL_UART_ERROR_NONE)
-    {
-      /* UART in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        UART_Receive_IT(huart);
-      }
-
-      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-         consider error as blocking */
-      if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) ||
-          (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the UART state ready to be able to start again the process,
-           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        UART_EndRxTransfer(huart);
-
-        /* Disable the UART DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-          /* Abort the UART DMA Rx channel */
-          if(huart->hdmarx != NULL)
-          {
-            /* Set the UART DMA Abort callback : 
-               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
-            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
-            {
-              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
-              huart->hdmarx->XferAbortCallback(huart->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_UART_ErrorCallback(huart);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_UART_ErrorCallback(huart);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_UART_ErrorCallback(huart);
-        huart->ErrorCode = HAL_UART_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
-  if(((isrflags & USART_ISR_WUF) != RESET) && ((cr3its & USART_CR3_WUFIE) != RESET))
-  {
-    __HAL_UART_CLEAR_IT(huart, UART_CLEAR_WUF);
-    /* Set the UART state ready to be able to start again the process */
-    huart->gState  = HAL_UART_STATE_READY;
-    huart->RxState = HAL_UART_STATE_READY;
-    HAL_UARTEx_WakeupCallback(huart);
-    return;
-  }
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-  /* UART in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    UART_Transmit_IT(huart);
-    return;
-  }
-
-  /* UART in mode Transmitter (transmission end) -----------------------------*/
-  if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
-  {
-    UART_EndTransmit_IT(huart);
-    return;
-  }
-
-}
-
-/**
-  * @brief Tx Transfer completed callback.
-  * @param huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Tx Half Transfer completed callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief Rx Transfer completed callback.
-  * @param huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Half Transfer completed callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief UART error callback.
-  * @param huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  UART Abort Complete callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  UART Abort Complete callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  UART Abort Receive Complete callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
-  *  @brief   UART control functions
-  *
-@verbatim
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to control the UART.
-     (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
-     (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
-     (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
-     (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
-     (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief Enable UART in mute mode (does not mean UART enters mute mode;
-  * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Enable USART mute mode by setting the MME bit in the CR1 register */
-  SET_BIT(huart->Instance->CR1, USART_CR1_MME);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  return (UART_CheckIdleState(huart));
-}
-
-/**
-  * @brief  Disable UART mute mode (does not mean the UART actually exits mute mode
-  *         as it may not have been in mute mode at this very moment).
-  * @param  huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-   /* Disable USART mute mode by clearing the MME bit in the CR1 register */
-  CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  return (UART_CheckIdleState(huart));
-}
-
-/**
-  * @brief Enter UART mute mode (means UART actually enters mute mode).
-  * @note  To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
-  * @param huart UART handle.
-  * @retval None
-  */
-void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
-{
-  __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
-}
-
-/**
-  * @brief  Enable the UART transmitter and disable the UART receiver.
-  * @param  huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Clear TE and RE bits */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
-  /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
-  SET_BIT(huart->Instance->CR1, USART_CR1_TE);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Enable the UART receiver and disable the UART transmitter.
-  * @param  huart UART handle.
-  * @retval HAL status.
-  */
-HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
-{
-  /* Process Locked */
-  __HAL_LOCK(huart);
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Clear TE and RE bits */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
-  /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
-  SET_BIT(huart->Instance->CR1, USART_CR1_RE);
-
-  huart->gState = HAL_UART_STATE_READY;
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
- *  @brief   UART Peripheral State functions
- *
-@verbatim
-  ==============================================================================
-            ##### Peripheral State and Error functions #####
-  ==============================================================================
-    [..]
-    This subsection provides functions allowing to :
-      (+) Return the UART handle state.
-      (+) Return the UART handle error code
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Return the UART handle state.
-  * @param  huart Pointer to a UART_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART.
-  * @retval HAL state
-  */
-HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
-{
-  uint32_t temp1= 0x00U, temp2 = 0x00U;
-  temp1 = huart->gState;
-  temp2 = huart->RxState;
-
-  return (HAL_UART_StateTypeDef)(temp1 | temp2);
-}
-
-/**
-  * @brief  Return the UART handle error code.
-  * @param  huart Pointer to a UART_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART.
-  * @retval UART Error Code
-  */
-uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
-{
-  return huart->ErrorCode;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup UART_Private_Functions UART Private Functions
-  * @{
-  */
-
-/**
-  * @brief Configure the UART peripheral.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
-{
-  uint32_t tmpreg                     = 0x00000000U;
-  UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
-  uint16_t brrtemp                    = 0x0000U;
-  uint16_t usartdiv                   = 0x0000U;
-  HAL_StatusTypeDef ret               = HAL_OK;
-
-  /* Check the parameters */
-  assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
-  assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
-  assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
-  assert_param(IS_UART_PARITY(huart->Init.Parity));
-  assert_param(IS_UART_MODE(huart->Init.Mode));
-  assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
-  assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
-  assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
-
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-  /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
-   *  the UART Word Length, Parity, Mode and oversampling:
-   *  set the M bits according to huart->Init.WordLength value
-   *  set PCE and PS bits according to huart->Init.Parity value
-   *  set TE and RE bits according to huart->Init.Mode value
-   *  set OVER8 bit according to huart->Init.OverSampling value */
-  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
-  MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR2 Configuration -----------------------*/
-  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
-   * to huart->Init.StopBits value */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  /* Configure
-   * - UART HardWare Flow Control: set CTSE and RTSE bits according
-   *   to huart->Init.HwFlowCtl value
-   * - one-bit sampling method versus three samples' majority rule according
-   *   to huart->Init.OneBitSampling */
-  tmpreg = (uint32_t)huart->Init.HwFlowCtl | huart->Init.OneBitSampling ;
-  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT), tmpreg);
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  UART_GETCLOCKSOURCE(huart, clocksource);
-  
-  /* Check UART Over Sampling to set Baud Rate Register */
-  if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
-  {
-    switch (clocksource)
-    {
-      case UART_CLOCKSOURCE_PCLK1:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_HSI:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_SYSCLK:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_LSE:
-        usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_UNDEFINED:
-      default:
-        ret = HAL_ERROR;
-        break;
-    }
-
-    brrtemp = usartdiv & 0xFFF0U;
-    brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
-    huart->Instance->BRR = brrtemp;
-  }
-  else
-  {
-    switch (clocksource)
-    {
-      case UART_CLOCKSOURCE_PCLK1:
-        huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_HSI:
-        huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_SYSCLK:
-        huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_LSE:
-        huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
-        break;
-      case UART_CLOCKSOURCE_UNDEFINED:
-      default:
-        ret = HAL_ERROR;
-        break;
-    }
-  }
-
-  return ret;
-
-}
-
-/**
-  * @brief Configure the UART peripheral advanced features.
-  * @param huart UART handle.
-  * @retval None
-  */
-void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
-{
-  /* Check whether the set of advanced features to configure is properly set */
-  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
-
-  /* if required, configure TX pin active level inversion */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
-  }
-
-  /* if required, configure RX pin active level inversion */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
-  }
-
-  /* if required, configure data inversion */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
-  }
-
-  /* if required, configure RX/TX pins swap */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
-  }
-
-  /* if required, configure RX overrun detection disabling */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
-  {
-    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
-    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
-  }
-
-  /* if required, configure DMA disabling on reception error */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
-    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
-  }
-
-  /* if required, configure auto Baud rate detection scheme */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
-  {
-    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
-    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
-    /* set auto Baudrate detection parameters if detection is enabled */
-    if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
-    {
-      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
-      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
-    }
-  }
-
-  /* if required, configure MSB first on communication line */
-  if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
-  {
-    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
-    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
-  }
-}
-
-/**
-  * @brief Check the UART Idle State.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
-{
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-  uint32_t tickstart = 0U;
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-  /* Initialize the UART ErrorCode */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
-     Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature. 
-  */
-  if (IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance))
-  {
-    /* Check if the Transmitter is enabled */
-    if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-    {
-      /* Wait until TEACK flag is set */
-      if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Check if the Receiver is enabled */
-    if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-    {
-      /* Wait until REACK flag is set */
-      if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-  /* Initialize the UART State */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle UART Communication Timeout.
-  * @param  huart UART handle.
-  * @param  Flag Specifies the UART flag to check
-  * @param  Status Flag status (SET or RESET)
-  * @param  Tickstart Tick start value
-  * @param  Timeout Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-        huart->gState  = HAL_UART_STATE_READY;
-        huart->RxState = HAL_UART_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(huart);
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
-  * @param  huart UART handle.
-  * @retval None
-  */
-static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-  /* At end of Tx process, restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-}
-
-
-/**
-  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
-  * @param  huart UART handle.
-  * @retval None
-  */
-static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of Rx process, restore huart->RxState to Ready */
-  huart->RxState = HAL_UART_STATE_READY;
-}
-
-
-/**
-  * @brief DMA UART transmit process complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-  
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    huart->TxXferCount = 0;
-
-    /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-       in the UART CR3 register */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Enable the UART Transmit Complete Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
-  }
-  /* DMA Circular mode */
-  else
-  {
-    HAL_UART_TxCpltCallback(huart);
-  }
-
-}
-
-/**
-  * @brief DMA UART transmit process half complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_UART_TxHalfCpltCallback(huart);
-}
-
-/**
-  * @brief DMA UART receive process complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    huart->RxXferCount = 0U;
-
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
-       in the UART CR3 register */
-    CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
-
-    /* At end of Rx process, restore huart->RxState to Ready */
-    huart->RxState = HAL_UART_STATE_READY;
-  }
-
-  HAL_UART_RxCpltCallback(huart);
-}
-
-/**
-  * @brief DMA UART receive process half complete callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_UART_RxHalfCpltCallback(huart);
-}
-
-/**
-  * @brief DMA UART communication error callback.
-  * @param hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMAError(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  /* Stop UART DMA Tx request if ongoing */
-  if (  (huart->gState == HAL_UART_STATE_BUSY_TX)
-      &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) )
-  {
-    huart->TxXferCount = 0U;
-    UART_EndTxTransfer(huart);
-  }
-
-  /* Stop UART DMA Rx request if ongoing */
-  if (  (huart->RxState == HAL_UART_STATE_BUSY_RX)
-      &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) )
-  {
-    huart->RxXferCount = 0U;
-    UART_EndRxTransfer(huart);
-  }
-
-  huart->ErrorCode |= HAL_UART_ERROR_DMA;
-  HAL_UART_ErrorCallback(huart);
-}
-
-/**
-  * @brief  DMA UART communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-  huart->RxXferCount = 0U;
-  huart->TxXferCount = 0U;
-
-  HAL_UART_ErrorCallback(huart);
-}
-
-/**
-  * @brief  DMA UART Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent);
-  
-  huart->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(huart->hdmarx != NULL)
-  {
-    if(huart->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  huart->TxXferCount = 0U;
-  huart->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->gState and huart->RxState to Ready */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortCpltCallback(huart);
-}
-
-
-/**
-  * @brief  DMA UART Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent);
-  
-  huart->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(huart->hdmatx != NULL)
-  {
-    if(huart->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  huart->TxXferCount = 0U;
-  huart->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->gState and huart->RxState to Ready */
-  huart->gState  = HAL_UART_STATE_READY;
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortCpltCallback(huart);
-}
-
-
-/**
-  * @brief  DMA UART Tx communication abort callback, when initiated by user by a call to
-  *         HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
-  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
-  *         and leads to user Tx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent);
-
-  huart->TxXferCount = 0U;
-
-  /* Restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortTransmitCpltCallback(huart);
-}
-
-/**
-  * @brief  DMA UART Rx communication abort callback, when initiated by user by a call to
-  *         HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
-  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
-  *         and leads to user Rx Abort Complete callback execution).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-
-  huart->RxXferCount = 0U;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
-
-  /* Restore huart->RxState to Ready */
-  huart->RxState = HAL_UART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_UART_AbortReceiveCpltCallback(huart);
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_UART_Transmit_IT().
-  * @param  huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
-{
-  uint16_t* tmp;
-
-  /* Check that a Tx process is ongoing */
-  if (huart->gState == HAL_UART_STATE_BUSY_TX)
-  {
-    if(huart->TxXferCount == 0U)
-    {
-      /* Disable the UART Transmit Data Register Empty Interrupt */
-      CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
-
-      /* Enable the UART Transmit Complete Interrupt */
-      SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
-
-      return HAL_OK;
-    }
-    else
-    {
-      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) huart->pTxBuffPtr;
-        huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        huart->pTxBuffPtr += 2U;
-      }
-      else
-      {
-        huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFFU);
-      }
-      huart->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Wrap up transmission in non-blocking mode.
-  * @param  huart pointer to a UART_HandleTypeDef structure that contains
-  *               the configuration information for the specified UART module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
-{
-  /* Disable the UART Transmit Complete Interrupt */
-  CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
-
-  /* Tx process is ended, restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
-
-  HAL_UART_TxCpltCallback(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @note   Function is called under interruption only, once
-  *         interruptions have been enabled by HAL_UART_Receive_IT()
-  * @param  huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
-{
-  uint16_t* tmp;
-  uint16_t  uhMask = huart->Mask;
-  uint16_t  uhdata;
-
-  /* Check that a Rx process is ongoing */
-  if(huart->RxState == HAL_UART_STATE_BUSY_RX)
-  {
-    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
-    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
-    {
-      tmp = (uint16_t*) huart->pRxBuffPtr ;
-      *tmp = (uint16_t)(uhdata & uhMask);
-      huart->pRxBuffPtr +=2U;
-    }
-    else
-    {
-      *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
-    }
-
-    if(--huart->RxXferCount == 0U)
-    {
-      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
-      CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore huart->RxState to Ready */
-      huart->RxState = HAL_UART_STATE_READY;
-
-      HAL_UART_RxCpltCallback(huart);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
-
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_UART_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_uart_ex.c b/lib/hal-stm32f0/source/stm32f0xx_hal_uart_ex.c
deleted file mode 100644
index d9fcb1f8..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_uart_ex.c
+++ /dev/null
@@ -1,621 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_uart_ex.c
-  * @author  MCD Application Team
-  * @brief   Extended UART HAL module driver.
-  *          This file provides firmware functions to manage the following extended
-  *          functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
-  *           + Initialization and de-initialization functions
-  *           + Peripheral Control functions
-  *
-  *
-  @verbatim
-  ==============================================================================
-               ##### UART peripheral extended features  #####
-  ==============================================================================
-
-    (#) Declare a UART_HandleTypeDef handle structure.
-
-    (#) For the UART RS485 Driver Enable mode, initialize the UART registers
-        by calling the HAL_RS485Ex_Init() API.
-
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup UARTEx UARTEx
-  * @brief UART Extended HAL module driver
-  * @{
-  */
-
-#ifdef HAL_UART_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup UARTEx_Private_Functions UARTEx Private Functions
-  * @{
-  */
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-/**
-  * @}
-  */
-
-/* Exported functions ---------------------------------------------------------*/
-
-/** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions
-  * @{
-  */
-
-/** @defgroup UARTEx_Exported_Functions_Group1 Extended Initialization and de-initialization functions
-  * @brief    Extended Initialization and Configuration Functions
-  *
-@verbatim
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ==============================================================================
-    [..]
-    This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
-    in asynchronous mode.
-      (+) For the asynchronous mode the parameters below can be configured:
-        (++) Baud Rate
-        (++) Word Length (Fixed to 8-bits only for LIN mode)
-        (++) Stop Bit
-        (++) Parity
-        (++) Hardware flow control
-        (++) Receiver/transmitter modes
-        (++) Over Sampling Method
-        (++) One-Bit Sampling Method
-      (+) For the asynchronous mode, the following advanced features can be configured as well:
-        (++) TX and/or RX pin level inversion
-        (++) data logical level inversion
-        (++) RX and TX pins swap
-        (++) RX overrun detection disabling
-        (++) DMA disabling on RX error
-        (++) MSB first on communication line
-        (++) auto Baud rate detection
-    [..]
-    The HAL_LIN_Init() and HAL_RS485Ex_Init() APIs follows respectively the LIN and 
-    the UART RS485 mode configuration procedures (details for the procedures are 
-    available in reference manual).
-
-@endverbatim
-  * @{
-  */
-
-/*
-  Additional Table:  If the parity is enabled, then the MSB bit of the data written
-                     in the data register is transmitted but is changed by the parity bit.
-                     According to device capability (support or not of 7-bit word length),
-                     frame length is either defined by the M bit (8-bits or 9-bits)
-                     or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
-                     Possible UART frame formats are as listed in the following table:
-            
-      Table 1. UART frame format.             
-      +-----------------------------------------------------------------------+
-      |       M bit       |  PCE bit  |             UART frame                |
-      |-------------------|-----------|---------------------------------------|
-      |         0         |     0     |    | SB |    8-bit data   | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         0         |     1     |    | SB | 7-bit data | PB | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         1         |     0     |    | SB |    9-bit data   | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         1         |     1     |    | SB | 8-bit data | PB | STB |     |
-      +-----------------------------------------------------------------------+
-      |  M1 bit |  M0 bit |  PCE bit  |             UART frame                |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    0    |     0     |    | SB |    8 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    0    |     1     |    | SB | 7 bit data | PB | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    1    |     0     |    | SB |    9 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    1    |     1     |    | SB | 8 bit data | PB | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    1    |    0    |     0     |    | SB |    7 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    1    |    0    |     1     |    | SB | 6 bit data | PB | STB |     |
-      +-----------------------------------------------------------------------+
-
-*/
-
-/**
-  * @brief Initialize the RS485 Driver enable feature according to the specified
-  *         parameters in the UART_InitTypeDef and creates the associated handle.
-  * @param huart UART handle.
-  * @param Polarity select the driver enable polarity.
-  *        This parameter can be one of the following values:
-  *          @arg @ref UART_DE_POLARITY_HIGH DE signal is active high
-  *          @arg @ref UART_DE_POLARITY_LOW  DE signal is active low
-  * @param AssertionTime Driver Enable assertion time:
-  *                         5-bit value defining the time between the activation of the DE (Driver Enable)
-  *                         signal and the beginning of the start bit. It is expressed in sample time
-  *                         units (1/8 or 1/16 bit time, depending on the oversampling rate)
-  * @param DeassertionTime Driver Enable deassertion time:
-  *                         5-bit value defining the time between the end of the last stop bit, in a
-  *                         transmitted message, and the de-activation of the DE (Driver Enable) signal.
-  *                         It is expressed in sample time units (1/8 or 1/16 bit time, depending on the
-  *                         oversampling rate).
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime)
-{
-  uint32_t temp = 0x0U;
-
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-  /* Check the Driver Enable UART instance */
-  assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance));
-
-  /* Check the Driver Enable polarity */
-  assert_param(IS_UART_DE_POLARITY(Polarity));
-
-  /* Check the Driver Enable assertion time */
-  assert_param(IS_UART_ASSERTIONTIME(AssertionTime));
-
-  /* Check the Driver Enable deassertion time */
-  assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime));
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  if(huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */
-  SET_BIT(huart->Instance->CR3, USART_CR3_DEM);
-
-  /* Set the Driver Enable polarity */
-  MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity);
-
-  /* Set the Driver Enable assertion and deassertion times */
-  temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS);
-  temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS);
-  MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT|USART_CR1_DEAT), temp);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-/**
-  * @brief Initialize the LIN mode according to the specified
-  *        parameters in the UART_InitTypeDef and creates the associated handle .
-  * @param huart UART handle.
-  * @param BreakDetectLength specifies the LIN break detection length.
-  *        This parameter can be one of the following values:
-  *          @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection
-  *          @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the LIN UART instance */
-  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
-  /* Check the Break detection length parameter */
-  assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
-
-  /* LIN mode limited to 16-bit oversampling only */
-  if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
-  {
-    return HAL_ERROR;
-  }
-  /* LIN mode limited to 8-bit data length */
-  if(huart->Init.WordLength != UART_WORDLENGTH_8B)
-  {
-    return HAL_ERROR;
-  }
-
-  if(huart->gState == HAL_UART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    huart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_UART_MspInit(huart);
-  }
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the UART Communication parameters */
-  if (UART_SetConfig(huart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
-  {
-    UART_AdvFeatureConfig(huart);
-  }
-
-  /* In LIN mode, the following bits must be kept cleared:
-  - LINEN and CLKEN bits in the USART_CR2 register,
-  - SCEN and IREN bits in the USART_CR3 register.*/
-  CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
-  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
-
-  /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
-  SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
-
-  /* Set the USART LIN Break detection length. */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */ 
-
-/**
-  * @}
-  */
-
-/** @defgroup UARTEx_Exported_Functions_Group2 Extended IO operation function 
-  * @brief    Extended UART Interrupt handling function 
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation function #####
- ===============================================================================
-    [..]
-    This subsection provides function to handle Wake up interrupt call-back.
-        
-    (#) Callback provided in No_Blocking mode:
-        (++) HAL_UARTEx_WakeupCallback()
-
-@endverbatim
-  * @{
-  */
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-/**
-  * @brief  UART wakeup from Stop mode callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
-   */
-}
-#endif /*!defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)*/ 
-
-/**
-  * @}
-  */
-
-
-/** @defgroup UARTEx_Exported_Functions_Group3 Extended Peripheral Control functions
-  * @brief    Extended Peripheral Control functions
-  *
-@verbatim
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================
-    [..]
-    This subsection provides extended functions allowing to control the UART.         
-     (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API sets Wakeup from Stop mode interrupt flag selection
-     (+) HAL_UARTEx_EnableStopMode() API allows the UART to wake up the MCU from Stop mode as 
-         long as UART clock is HSI or LSE 
-     (+) HAL_UARTEx_DisableStopMode() API disables the above feature 
-     (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address
-         detection length to more than 4 bits for multiprocessor address mark wake up.
-     (+) HAL_LIN_SendBreak() API transmits the break characters
-
-
-@endverbatim
-  * @{
-  */
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-/**
-  * @brief Set Wakeup from Stop mode interrupt flag selection.
-  * @param huart UART handle.
-  * @param WakeUpSelection address match, Start Bit detection or RXNE bit status.
-  * This parameter can be one of the following values:
-  *      @arg @ref UART_WAKEUP_ON_ADDRESS
-  *      @arg @ref UART_WAKEUP_ON_STARTBIT
-  *      @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
-{
-  HAL_StatusTypeDef status = HAL_OK;
-  uint32_t tickstart = 0U;
-
-  /* check the wake-up from stop mode UART instance */
-  assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance));
-  /* check the wake-up selection parameter */
-  assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent));
-
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the wake-up selection scheme */
-  MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent);
-
-  if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS)
-  {
-    UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection);
-  }
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* Wait until REACK flag is set */
-  if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
-  {
-    status = HAL_TIMEOUT;
-  }
-  else
-  {
-    /* Initialize the UART State */
-    huart->gState = HAL_UART_STATE_READY;
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return status;
-}
-
-
-/**
-  * @brief Enable UART Stop Mode.
-  * @note  The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart)
-{
-  /* Check parameter */
-  assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance));
-
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Set UESM bit */
-  SET_BIT(huart->Instance->CR1, USART_CR1_UESM);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Disable UART Stop Mode.
-  * @param huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart)
-{
-  /* Check parameter */
-  assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance));
-
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Clear UESM bit */
-  CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM);
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-/**
-  * @brief By default in multiprocessor mode, when the wake up method is set
-  *        to address mark, the UART handles only 4-bit long addresses detection;
-  *        this API allows to enable longer addresses detection (6-, 7- or 8-bit
-  *        long).
-  * @note  Addresses detection lengths are: 6-bit address detection in 7-bit data mode, 
-  *        7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode.
-  * @param huart UART handle.
-  * @param AddressLength this parameter can be one of the following values:
-  *          @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address
-  *          @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength)
-{
-  /* Check the UART handle allocation */
-  if(huart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the address length parameter */
-  assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength));
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_UART_DISABLE(huart);
-
-  /* Set the address length */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength);
-
-  /* Enable the Peripheral */
-  __HAL_UART_ENABLE(huart);
-
-  /* TEACK and/or REACK to check before moving huart->gState to Ready */
-  return (UART_CheckIdleState(huart));
-}
-
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-/**
-  * @brief  Transmit break characters.
-  * @param  huart UART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
-{
-  /* Check the parameters */
-  assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
-
-  /* Process Locked */
-  __HAL_LOCK(huart);
-
-  huart->gState = HAL_UART_STATE_BUSY;
-
-  /* Send break characters */
-  huart->Instance->RQR |= UART_SENDBREAK_REQUEST;
-
-  huart->gState = HAL_UART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(huart);
-
-  return HAL_OK;
-}
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup UARTEx_Private_Functions
-  * @{
-  */
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-/**
-  * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detection.
-  * @param huart UART handle.
-  * @param WakeUpSelection UART wake up from stop mode parameters.
-  * @retval None
-  */
-static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
-{
-  /* Check parmeters */
-  assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance));
-  assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength));
-
-  /* Set the USART address length */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength);
-
-  /* Set the USART address node */
-  MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS));
-}
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_UART_MODULE_ENABLED */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_usart.c b/lib/hal-stm32f0/source/stm32f0xx_hal_usart.c
deleted file mode 100644
index ad262a93..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_usart.c
+++ /dev/null
@@ -1,2521 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_usart.c
-  * @author  MCD Application Team
-  * @brief   USART HAL module driver.
-  *          This file provides firmware functions to manage the following
-  *          functionalities of the Universal Synchronous Asynchronous Receiver Transmitter
-  *          Peripheral (USART).
-  *           + Initialization and de-initialization functions
-  *           + IO operation functions
-  *           + Peripheral Control functions
-  *           + Peripheral State and Error functions
-  *
-  @verbatim
- ===============================================================================
-                        ##### How to use this driver #####
- ===============================================================================
-    [..]
-      The USART HAL driver can be used as follows:
-
-      (#) Declare a USART_HandleTypeDef handle structure (eg. USART_HandleTypeDef husart).
-      (#) Initialize the USART low level resources by implementing the HAL_USART_MspInit() API:
-          (++) Enable the USARTx interface clock.
-          (++) USART pins configuration:
-            (+++) Enable the clock for the USART GPIOs.
-            (+++) Configure these USART pins as alternate function pull-up.
-          (++) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(),
-                HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
-            (+++) Configure the USARTx interrupt priority.
-            (+++) Enable the NVIC USART IRQ handle.
-            (++) USART interrupts handling:
-              -@@-   The specific USART interrupts (Transmission complete interrupt,
-                  RXNE interrupt and Error Interrupts) will be managed using the macros
-                  __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
-          (++) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
-               HAL_USART_Receive_DMA() and HAL_USART_TransmitReceive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx channel.
-            (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx channel.
-            (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
-
-      (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
-          flow control and Mode (Receiver/Transmitter) in the husart handle Init structure.
-
-      (#) Initialize the USART registers by calling the HAL_USART_Init() API:
-          (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-               by calling the customized HAL_USART_MspInit(&husart) API.
-
-    (#) Three operation modes are available within this driver :
-
-     *** Polling mode IO operation ***
-     =================================
-     [..]
-       (+) Send an amount of data in blocking mode using HAL_USART_Transmit()
-       (+) Receive an amount of data in blocking mode using HAL_USART_Receive()
-
-     *** Interrupt mode IO operation ***
-     ===================================
-     [..]
-       (+) Send an amount of data in non blocking mode using HAL_USART_Transmit_IT()
-       (+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
-       (+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_TxCpltCallback
-       (+) Receive an amount of data in non blocking mode using HAL_USART_Receive_IT()
-       (+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
-       (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_RxCpltCallback
-       (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_USART_ErrorCallback
-
-     *** DMA mode IO operation ***
-     ==============================
-     [..]
-       (+) Send an amount of data in non blocking mode (DMA) using HAL_USART_Transmit_DMA()
-       (+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
-       (+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_TxCpltCallback
-       (+) Receive an amount of data in non blocking mode (DMA) using HAL_USART_Receive_DMA()
-       (+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
-       (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
-            add his own code by customization of function pointer HAL_USART_RxCpltCallback
-       (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
-            add his own code by customization of function pointer HAL_USART_ErrorCallback
-       (+) Pause the DMA Transfer using HAL_USART_DMAPause()
-       (+) Resume the DMA Transfer using HAL_USART_DMAResume()
-       (+) Stop the DMA Transfer using HAL_USART_DMAStop()
-
-     *** USART HAL driver macros list ***
-     =============================================
-     [..]
-       Below the list of most used macros in USART HAL driver.
-
-       (+) __HAL_USART_ENABLE: Enable the USART peripheral
-       (+) __HAL_USART_DISABLE: Disable the USART peripheral
-       (+) __HAL_USART_GET_FLAG : Check whether the specified USART flag is set or not
-       (+) __HAL_USART_CLEAR_FLAG : Clear the specified USART pending flag
-       (+) __HAL_USART_ENABLE_IT: Enable the specified USART interrupt
-       (+) __HAL_USART_DISABLE_IT: Disable the specified USART interrupt
-
-     [..]
-       (@) You can refer to the USART HAL driver header file for more useful macros
-     [..]
-       (@) To configure and enable/disable the USART to wake up the MCU from stop mode, resort to UART API's
-           HAL_UARTEx_StopModeWakeUpSourceConfig(), HAL_UARTEx_EnableStopMode() and
-           HAL_UARTEx_DisableStopMode() in casting the USART handle to UART type UART_HandleTypeDef.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-/** @defgroup USART USART
-  * @brief HAL USART Synchronous module driver
-  * @{
-  */
-
-#ifdef HAL_USART_MODULE_ENABLED
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/** @defgroup USART_Private_Constants USART Private Constants
-  * @{
-  */
-#define USART_DUMMY_DATA          ((uint16_t) 0xFFFFU)           /*!< USART transmitted dummy data                     */
-#define USART_TEACK_REACK_TIMEOUT ( 1000U)                       /*!< USART TX or RX enable acknowledge time-out value */
-#define USART_CR1_FIELDS          ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
-                                              USART_CR1_TE | USART_CR1_RE  | USART_CR1_OVER8))    /*!< USART CR1 fields of parameters set by USART_SetConfig API */
-#define USART_CR2_FIELDS          ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | \
-                                              USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by USART_SetConfig API */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/** @addtogroup USART_Private_Functions
-  * @{
-  */
-static void USART_EndTransfer(USART_HandleTypeDef *husart);
-static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
-static void USART_DMAError(DMA_HandleTypeDef *hdma);
-static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
-static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
-static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup USART_Exported_Functions USART Exported Functions
-  * @{
-  */
-
-/** @defgroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
-  * @brief    Initialization and Configuration functions
-  *
-@verbatim
- ===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to initialize the USART
-    in asynchronous and in synchronous modes.
-      (+) For the asynchronous mode only these parameters can be configured:
-        (++) Baud Rate
-        (++) Word Length
-        (++) Stop Bit
-        (++) Parity
-        (++) USART polarity
-        (++) USART phase
-        (++) USART LastBit
-        (++) Receiver/transmitter modes
-
-    [..]
-    The HAL_USART_Init() function follows the USART  synchronous configuration
-    procedure (details for the procedure are available in reference manual).
-
-@endverbatim
-  * @{
-  */
-
-/*
-  Additional Table:  If the parity is enabled, then the MSB bit of the data written
-                     in the data register is transmitted but is changed by the parity bit.
-                     According to device capability (support or not of 7-bit word length),
-                     frame length is either defined by the M bit (8-bits or 9-bits)
-                     or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
-                     Possible USART frame formats are as listed in the following table:
-
-      Table 1. USART frame format.             
-      +-----------------------------------------------------------------------+
-      |       M bit       |  PCE bit  |             USART frame                |
-      |-------------------|-----------|---------------------------------------|
-      |         0         |     0     |    | SB |    8-bit data   | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         0         |     1     |    | SB | 7-bit data | PB | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         1         |     0     |    | SB |    9-bit data   | STB |     |
-      |-------------------|-----------|---------------------------------------|
-      |         1         |     1     |    | SB | 8-bit data | PB | STB |     |
-      +-----------------------------------------------------------------------+
-      |  M1 bit |  M0 bit |  PCE bit  |             USART frame                |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    0    |     0     |    | SB |    8 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    0    |     1     |    | SB | 7 bit data | PB | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    1    |     0     |    | SB |    9 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    0    |    1    |     1     |    | SB | 8 bit data | PB | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    1    |    0    |     0     |    | SB |    7 bit data   | STB |     |
-      |---------|---------|-----------|---------------------------------------|
-      |    1    |    0    |     1     |    | SB | 6 bit data | PB | STB |     |
-      +-----------------------------------------------------------------------+
-
-*/
-
-/**
-  * @brief  Initialize the USART mode according to the specified
-  *         parameters in the USART_InitTypeDef and initialize the associated handle.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
-{
-  /* Check the USART handle allocation */
-  if(husart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_USART_INSTANCE(husart->Instance));
-
-  if(husart->State == HAL_USART_STATE_RESET)
-  {
-    /* Allocate lock resource and initialize it */
-    husart->Lock = HAL_UNLOCKED;
-
-    /* Init the low level hardware : GPIO, CLOCK */
-    HAL_USART_MspInit(husart);
-  }
-
-  husart->State = HAL_USART_STATE_BUSY;
-
-  /* Disable the Peripheral */
-  __HAL_USART_DISABLE(husart);
-
-  /* Set the Usart Communication parameters */
-  if (USART_SetConfig(husart) == HAL_ERROR)
-  {
-    return HAL_ERROR;
-  }
-
-  /* In Synchronous mode, the following bits must be kept cleared:
-  - LINEN bit (if LIN is supported) in the USART_CR2 register
-  - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */
-#if defined (USART_CR2_LINEN)
-  husart->Instance->CR2 &= ~USART_CR2_LINEN;
-#endif
-#if defined (USART_CR3_SCEN)
-#if defined (USART_CR3_IREN)
-  husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
-#else
-  husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL);
-#endif
-#else
-#if defined (USART_CR3_IREN)
-  husart->Instance->CR3 &= ~(USART_CR3_HDSEL | USART_CR3_IREN);
-#else
-  husart->Instance->CR3 &= ~(USART_CR3_HDSEL);
-#endif
-#endif
-
-  /* Enable the Peripheral */
-  __HAL_USART_ENABLE(husart);
-
-  /* TEACK and/or REACK to check before moving husart->State to Ready */
-  return (USART_CheckIdleState(husart));
-}
-
-/**
-  * @brief  DeInitialize the USART peripheral.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
-{
-  /* Check the USART handle allocation */
-  if(husart == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_USART_INSTANCE(husart->Instance));
-
-  husart->State = HAL_USART_STATE_BUSY;
-
-  husart->Instance->CR1 = 0x0U;
-  husart->Instance->CR2 = 0x0U;
-  husart->Instance->CR3 = 0x0U;
-
-  /* DeInit the low level hardware */
-  HAL_USART_MspDeInit(husart);
-
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-  husart->State = HAL_USART_STATE_RESET;
-
-  /* Process Unlock */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief Initialize the USART MSP.
-  * @param husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_MspInit can be implemented in the user file
-   */
-}
-
-/**
-  * @brief DeInitialize the USART MSP.
-  * @param husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_MspDeInit can be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_Exported_Functions_Group2 IO operation functions
-  * @brief    USART Transmit and Receive functions
-  *
-@verbatim
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================
-    [..] This subsection provides a set of functions allowing to manage the USART synchronous
-    data transfers.
-
-    [..] The USART supports master mode only: it cannot receive or send data related to an input
-         clock (SCLK is always an output).
-
-    (#) There are two modes of transfer:
-       (++) Blocking mode: The communication is performed in polling mode.
-            The HAL status of all data processing is returned by the same function
-            after finishing transfer.
-       (++) No-Blocking mode: The communication is performed using Interrupts
-           or DMA, These APIs return the HAL status.
-           The end of the data processing will be indicated through the
-           dedicated USART IRQ when using Interrupt mode or the DMA IRQ when
-           using DMA mode.
-           The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback() user callbacks
-           will be executed respectively at the end of the transmit or Receive process
-           The HAL_USART_ErrorCallback()user callback will be executed when a communication error is detected
-
-    (#) Blocking mode APIs are :
-        (++) HAL_USART_Transmit()in simplex mode
-        (++) HAL_USART_Receive() in full duplex receive only
-        (++) HAL_USART_TransmitReceive() in full duplex mode
-
-    (#) No-Blocking mode APIs with Interrupt are :
-        (++) HAL_USART_Transmit_IT()in simplex mode
-        (++) HAL_USART_Receive_IT() in full duplex receive only
-        (++) HAL_USART_TransmitReceive_IT()in full duplex mode
-        (++) HAL_USART_IRQHandler()
-
-    (#) No-Blocking mode APIs with DMA are :
-        (++) HAL_USART_Transmit_DMA()in simplex mode
-        (++) HAL_USART_Receive_DMA() in full duplex receive only
-        (++) HAL_USART_TransmitReceive_DMA() in full duplex mode
-        (++) HAL_USART_DMAPause()
-        (++) HAL_USART_DMAResume()
-        (++) HAL_USART_DMAStop()
-
-    (#) A set of Transfer Complete Callbacks are provided in Non-Blocking mode:
-        (++) HAL_USART_TxCpltCallback()
-        (++) HAL_USART_RxCpltCallback()
-        (++) HAL_USART_TxHalfCpltCallback()
-        (++) HAL_USART_RxHalfCpltCallback()
-        (++) HAL_USART_ErrorCallback()
-        (++) HAL_USART_TxRxCpltCallback()
-
-    (#) Non-Blocking mode transfers could be aborted using Abort API's :
-        (++) HAL_USART_Abort()
-        (++) HAL_USART_Abort_IT()
-
-    (#) For Abort services based on interrupts (HAL_USART_Abort_IT), a Abort Complete Callbacks is provided:
-        (++) HAL_USART_AbortCpltCallback()
-
-    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
-        Errors are handled as follows :
-        (++) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
-             to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
-             Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
-             and HAL_USART_ErrorCallback() user callback is executed. Transfer is kept ongoing on USART side.
-             If user wants to abort it, Abort services should be called by user.
-        (++) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
-             This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
-             Error code is set to allow user to identify error type, and HAL_USART_ErrorCallback() user callback is executed.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Simplex send an amount of data in blocking mode.
-  * @param  husart USART handle.
-  * @param  pTxData Pointer to data buffer.
-  * @param  Size Amount of data to be sent.
-  * @param  Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp=0U;
-  uint32_t tickstart = 0U;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pTxData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    /* Check the remaining data to be sent */
-    while(husart->TxXferCount > 0)
-    {
-      husart->TxXferCount--;
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pTxData;
-        husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        pTxData += 2U;
-      }
-      else
-      {
-        husart->Instance->TDR = (*pTxData++ & (uint8_t)0xFFU);
-      }
-    }
-
-    if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-    {
-      return HAL_TIMEOUT;
-    }
-
-    /* At end of Tx process, restore husart->State to Ready */
-    husart->State = HAL_USART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in blocking mode.
-  * @note  To receive synchronous data, dummy data are simultaneously transmitted.
-  * @param husart USART handle.
-  * @param pRxData Pointer to data buffer.
-  * @param Size Amount of data to be received.
-  * @param Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp=0U;
-  uint16_t uhMask;
-  uint32_t tickstart = 0U;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pRxData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pRxData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    husart->RxXferSize = Size;
-    husart->RxXferCount = Size;
-
-    /* Computation of USART mask to apply to RDR register */
-    USART_MASK_COMPUTATION(husart);
-    uhMask = husart->Mask;
-
-    /* as long as data have to be received */
-    while(husart->RxXferCount > 0U)
-    {
-      husart->RxXferCount--;
-
-      /* Wait until TC flag is set to send dummy byte in order to generate the
-      * clock for the slave to send data.
-       * Whatever the frame length (7, 8 or 9-bit long), the same dummy value
-       * can be written for all the cases. */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x0FFU);
-
-      /* Wait for RXNE Flag */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pRxData ;
-        *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-        pRxData +=2;
-      }
-      else
-      {
-        *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of Rx process, restore husart->State to Ready */
-    husart->State = HAL_USART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Send and Receive an amount of data in blocking mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to TX data buffer.
-  * @param  pRxData pointer to RX data buffer.
-  * @param  Size amount of data to be sent (same amount to be received).
-  * @param  Timeout Timeout duration.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
-  *         (as sent/received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
-{
-  uint16_t* tmp=0U;
-  uint16_t uhMask;
-  uint32_t tickstart = 0U;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-    {
-      return  HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if(((((uint32_t)pTxData)&1U) != 0U) || ((((uint32_t)pRxData)&1U) != 0U))
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    husart->RxXferSize = Size;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-    husart->RxXferCount = Size;
-
-    /* Computation of USART mask to apply to RDR register */
-    USART_MASK_COMPUTATION(husart);
-    uhMask = husart->Mask;
-
-    /* Check the remain data to be sent */
-    while(husart->TxXferCount > 0U)
-    {
-      husart->TxXferCount--;
-      husart->RxXferCount--;
-
-      /* Wait until TC flag is set to send data */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pTxData;
-        husart->Instance->TDR = (*tmp & uhMask);
-        pTxData += 2U;
-      }
-      else
-      {
-        husart->Instance->TDR = (*pTxData++ & (uint8_t)uhMask);
-      }
-
-      /* Wait for RXNE Flag */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-      {
-        return HAL_TIMEOUT;
-      }
-
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) pRxData ;
-        *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-        pRxData +=2U;
-      }
-      else
-      {
-        *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-      }
-    }
-
-    /* At end of TxRx process, restore husart->State to Ready */
-    husart->State = HAL_USART_STATE_READY;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in interrupt mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
-{
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pTxData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX;
-
-    /* The USART Error Interrupts: (Frame error, noise error, overrun error)
-    are not managed by the USART Transmit Process to avoid the overrun interrupt
-    when the usart mode is configured for transmit and receive "USART_MODE_TX_RX"
-    to benefit for the frame error and noise interrupts the usart mode should be
-    configured only for transmit "USART_MODE_TX" */
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Transmit Data Register Empty Interrupt */
-    __HAL_USART_ENABLE_IT(husart, USART_IT_TXE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in interrupt mode.
-  * @note   To receive synchronous data, dummy data are simultaneously transmitted.
-  * @param  husart USART handle.
-  * @param  pRxData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
-{
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pRxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data to be received from RDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pRxData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->RxXferCount = Size;
-
-    USART_MASK_COMPUTATION(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Parity Error and Data Register not empty Interrupts */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Send dummy byte in order to generate the clock for the Slave to send the next data */
-    if(husart->Init.WordLength == USART_WORDLENGTH_9B)
-    {
-      husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x01FFU);
-    }
-    else
-    {
-      husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FFU);
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Send and Receive an amount of data in interrupt mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to TX data buffer.
-  * @param  pRxData pointer to RX data buffer.
-  * @param  Size amount of data to be sent (same amount to be received).
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
-  *         (as sent/received data will be handled using u16 pointer cast). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,  uint16_t Size)
-{
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter 
-       should be aligned on a u16 frontier, as data to be filled into TDR/retrieved from RDR will be 
-       handled through a u16 cast. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if(((((uint32_t)pTxData)&1U) != 0U) || ((((uint32_t)pRxData)&1U) != 0U))
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->RxXferCount = Size;
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    /* Computation of USART mask to apply to RDR register */
-    USART_MASK_COMPUTATION(husart);
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX_RX;
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the USART Parity Error and USART Data Register not empty Interrupts */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
-
-    /* Enable the USART Transmit Data Register Empty Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Send an amount of data in DMA mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to data buffer.
-  * @param  Size amount of data to be sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
-  *         (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
-{
-  uint32_t *tmp=0U;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy into TDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pTxData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-    husart->TxXferCount = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX;
-
-    /* Set the USART DMA transfer complete callback */
-    husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
-
-    /* Set the DMA error callback */
-    husart->hdmatx->XferErrorCallback = USART_DMAError;
-
-    /* Enable the USART transmit DMA channel */
-    tmp = (uint32_t*)&pTxData;
-    HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Receive an amount of data in DMA mode.
-  * @param  husart USART handle.
-  * @param  pRxData pointer to data buffer.
-  * @param  Size amount of data to be received.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
-  *         (as received data will be handled by DMA from halfword frontier). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pRxData.
-  * @note   The USART DMA transmit channel must be configured in order to generate the clock for the slave.  
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
-{
-  uint32_t *tmp;
-
-  /* Check that a Rx process is not already ongoing */
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pRxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pRxData buffer provided as input paramter 
-       should be aligned on a u16 frontier, as data copy from RDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if((((uint32_t)pRxData)&1U) != 0U)
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->pTxBuffPtr = pRxData;
-    husart->TxXferSize = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_RX;
-
-    /* Set the USART DMA Rx transfer complete callback */
-    husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
-
-    /* Set the USART DMA Rx transfer error callback */
-    husart->hdmarx->XferErrorCallback = USART_DMAError;
-
-    /* Enable the USART receive DMA channel */
-    tmp = (uint32_t*)&pRxData;
-    HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size);
-
-    /* Enable the USART transmit DMA channel: the transmit channel is used in order
-       to generate in the non-blocking mode the clock to the slave device,
-       this mode isn't a simplex receive mode but a full-duplex receive mode */
-    /* Set the USART DMA Tx Complete and Error callback to Null */
-    husart->hdmatx->XferErrorCallback = NULL;
-    husart->hdmatx->XferHalfCpltCallback = NULL;
-    husart->hdmatx->XferCpltCallback = NULL;
-    HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Parity Error Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Transmit Receive an amount of data in non-blocking mode.
-  * @param  husart USART handle.
-  * @param  pTxData pointer to TX data buffer.
-  * @param  pRxData pointer to RX data buffer.
-  * @param  Size amount of data to be received/sent.
-  * @note   When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
-  *         address of user data buffers containing data to be sent/received, should be aligned on a half word frontier (16 bits)
-  *         (as sent/received data will be handled by DMA from halfword frontier). Depending on compilation chain,
-  *         use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pTxData and pRxData.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
-{
-  uint32_t *tmp;
-
-  if(husart->State == HAL_USART_STATE_READY)
-  {
-    if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
-    {
-      return HAL_ERROR;
-    }
-
-    /* In case of 9bits/No Parity transfer, pTxData and pRxData buffers provided as input paramter 
-       should be aligned on a u16 frontier, as data copy to/from TDR/RDR will be 
-       handled by DMA from a u16 frontier. */
-    if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      if(((((uint32_t)pTxData)&1U) != 0U) || ((((uint32_t)pRxData)&1U) != 0U))
-      {
-        return  HAL_ERROR;
-      }
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(husart);
-
-    husart->pRxBuffPtr = pRxData;
-    husart->RxXferSize = Size;
-    husart->pTxBuffPtr = pTxData;
-    husart->TxXferSize = Size;
-
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-    husart->State = HAL_USART_STATE_BUSY_TX_RX;
-
-    /* Set the USART DMA Rx transfer complete callback */
-    husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
-
-    /* Set the USART DMA Tx transfer complete callback */
-    husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
-
-    /* Set the USART DMA Half transfer complete callback */
-    husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
-
-    /* Set the USART DMA Tx transfer error callback */
-    husart->hdmatx->XferErrorCallback = USART_DMAError;
-
-    /* Set the USART DMA Rx transfer error callback */
-    husart->hdmarx->XferErrorCallback = USART_DMAError;
-
-    /* Enable the USART receive DMA channel */
-    tmp = (uint32_t*)&pRxData;
-    HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size);
-
-    /* Enable the USART transmit DMA channel */
-    tmp = (uint32_t*)&pTxData;
-    HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(husart);
-
-    /* Enable the USART Parity Error Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-
-    /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Clear the TC flag in the ICR register */
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF);
-
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Enable the DMA transfer for transmit request by setting the DMAT bit
-       in the USART CR3 register */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Pause the DMA Transfer.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
-{
-  /* Process Locked */
-  __HAL_LOCK(husart);
-
-  if( (husart->State == HAL_USART_STATE_BUSY_TX) &&
-      (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)))
-  {
-    /* Disable the USART DMA Tx request */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  }
-  else if( (husart->State == HAL_USART_STATE_BUSY_RX) ||
-           (husart->State == HAL_USART_STATE_BUSY_TX_RX) )
-  {
-    if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-    {
-      /* Disable the USART DMA Tx request */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-    }
-    if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-    {
-      /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-      CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-      /* Disable the USART DMA Rx request */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-    }
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Resume the DMA Transfer.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
-{
-  /* Process Locked */
-  __HAL_LOCK(husart);
-
-  if(husart->State == HAL_USART_STATE_BUSY_TX)
-  {
-    /* Enable the USART DMA Tx request */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  }
-  else if( (husart->State == HAL_USART_STATE_BUSY_RX) ||
-           (husart->State == HAL_USART_STATE_BUSY_TX_RX) )
-  {
-    /* Clear the Overrun flag before resuming the Rx transfer*/
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF);
-
-    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-    SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the USART DMA Rx request  before the DMA Tx request */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Enable the USART DMA Tx request */
-    SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  }
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Stop the DMA Transfer.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
-{
-  /* The Lock is not implemented on this API to allow the user application
-     to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() /
-     HAL_USART_TxHalfCpltCallback() / HAL_USART_RxHalfCpltCallback (): 
-     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete interrupt is 
-     generated if the DMA transfer interruption occurs at the middle or at the end of the stream
-     and the corresponding call back is executed. 
-     */
-
-  /* Disable the USART Tx/Rx DMA requests */
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-  /* Abort the USART DMA tx channel */
-  if(husart->hdmatx != NULL)
-  {
-    HAL_DMA_Abort(husart->hdmatx);
-  }
-  /* Abort the USART DMA rx channel */
-  if(husart->hdmarx != NULL)
-  {
-    HAL_DMA_Abort(husart->hdmarx);
-  }
-
-  USART_EndTransfer(husart);
-  husart->State = HAL_USART_STATE_READY;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (blocking mode).
-  * @param  husart USART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable USART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart)
-{
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-  /* Disable the USART DMA Tx request if enabled */
-  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-  {
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */
-    if(husart->hdmatx != NULL)
-    {
-      /* Set the USART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      husart->hdmatx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(husart->hdmatx);
-    }
-  }
-
-  /* Disable the USART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */
-    if(husart->hdmarx != NULL)
-    {
-      /* Set the USART DMA Abort callback to Null. 
-         No call back execution at end of DMA abort procedure */
-      husart->hdmarx->XferAbortCallback = NULL;
-
-      HAL_DMA_Abort(husart->hdmarx);
-    }
-  }
-
-  /* Reset Tx and Rx transfer counters */
-  husart->TxXferCount = 0U; 
-  husart->RxXferCount = 0U; 
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-  /* Restore husart->State to Ready */
-  husart->State  = HAL_USART_STATE_READY;
-
-  /* Reset Handle ErrorCode to No Error */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Abort ongoing transfers (Interrupt mode).
-  * @param  husart USART handle.
-  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
-  *         This procedure performs following operations :
-  *           - Disable USART Interrupts (Tx and Rx)
-  *           - Disable the DMA transfer in the peripheral register (if enabled)
-  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
-  *           - Set handle State to READY
-  *           - At abort completion, call user abort complete callback
-  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
-  *         considered as completed only when user abort complete callback is executed (not when exiting function).
-  * @retval HAL status
-*/
-HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart)
-{
-  uint32_t abortcplt = 1U;
-  
-  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-  /* If DMA Tx and/or DMA Rx Handles are associated to USART Handle, DMA Abort complete callbacks should be initialised
-     before any call to DMA Abort functions */
-  /* DMA Tx Handle is valid */
-  if(husart->hdmatx != NULL)
-  {
-    /* Set DMA Abort Complete callback if USART DMA Tx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-    {
-      husart->hdmatx->XferAbortCallback = USART_DMATxAbortCallback;
-    }
-    else
-    {
-      husart->hdmatx->XferAbortCallback = NULL;
-    }
-  }
-  /* DMA Rx Handle is valid */
-  if(husart->hdmarx != NULL)
-  {
-    /* Set DMA Abort Complete callback if USART DMA Rx request if enabled.
-       Otherwise, set it to NULL */
-    if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-    {
-      husart->hdmarx->XferAbortCallback = USART_DMARxAbortCallback;
-    }
-    else
-    {
-      husart->hdmarx->XferAbortCallback = NULL;
-    }
-  }
-  
-  /* Disable the USART DMA Tx request if enabled */
-  if(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT))
-  {
-    /* Disable DMA Tx at USART level */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    /* Abort the USART DMA Tx channel : use non blocking DMA Abort API (callback) */
-    if(husart->hdmatx != NULL)
-    {
-      /* USART Tx DMA Abort callback has already been initialised : 
-         will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA TX */
-      if(HAL_DMA_Abort_IT(husart->hdmatx) != HAL_OK)
-      {
-        husart->hdmatx->XferAbortCallback = NULL;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* Disable the USART DMA Rx request if enabled */
-  if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-  {
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-
-    /* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */
-    if(husart->hdmarx != NULL)
-    {
-      /* USART Rx DMA Abort callback has already been initialised : 
-         will lead to call HAL_USART_AbortCpltCallback() at end of DMA abort procedure */
-
-      /* Abort DMA RX */
-      if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
-      {
-        husart->hdmarx->XferAbortCallback = NULL;
-        abortcplt = 1U;
-      }
-      else
-      {
-        abortcplt = 0U;
-      }
-    }
-  }
-
-  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
-  if (abortcplt == 1U)
-  {
-    /* Reset Tx and Rx transfer counters */
-    husart->TxXferCount = 0U; 
-    husart->RxXferCount = 0U;
-
-    /* Reset errorCode */
-    husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-    /* Clear the Error flags in the ICR register */
-    __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-    /* Restore husart->State to Ready */
-    husart->State  = HAL_USART_STATE_READY;
-
-    /* As no DMA to be aborted, call directly user Abort complete callback */
-    HAL_USART_AbortCpltCallback(husart);
-  }
-
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle USART interrupt request.
-  * @param  husart USART handle.
-  * @retval None
-  */
-void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
-{
-  uint32_t isrflags   = READ_REG(husart->Instance->ISR);
-  uint32_t cr1its     = READ_REG(husart->Instance->CR1);
-  uint32_t cr3its;
-  uint32_t errorflags;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-  if (errorflags == RESET)
-  {
-    /* USART in mode Receiver ---------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-    {
-      if(husart->State == HAL_USART_STATE_BUSY_RX)
-      {
-        USART_Receive_IT(husart);
-      }
-      else
-      {
-        USART_TransmitReceive_IT(husart);
-      }
-      return;
-    }
-  }
-
-  /* If some errors occur */
-  cr3its = READ_REG(husart->Instance->CR3);
-  if(   (errorflags != RESET)
-     && (   ((cr3its & USART_CR3_EIE) != RESET)
-         || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
-  {
-    /* USART parity error interrupt occurred -------------------------------------*/
-    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_PE;
-    }
-
-    /* USART frame error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_FE;
-    }
-
-    /* USART noise error interrupt occurred --------------------------------------*/
-    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_NE;
-    }
-
-    /* USART Over-Run interrupt occurred -----------------------------------------*/
-    if(((isrflags & USART_ISR_ORE) != RESET) &&
-       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
-    {
-      __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF);
-
-      husart->ErrorCode |= HAL_USART_ERROR_ORE;
-    }
-
-    /* Call USART Error Call back function if need be --------------------------*/
-    if(husart->ErrorCode != HAL_USART_ERROR_NONE)
-    {
-      /* USART in mode Receiver ---------------------------------------------------*/
-      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-      {
-        if(husart->State == HAL_USART_STATE_BUSY_RX)
-        {
-          USART_Receive_IT(husart);
-        }
-        else
-        {
-          USART_TransmitReceive_IT(husart);
-        }
-      }
-
-      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-         consider error as blocking */
-      if (((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) ||
-          (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)))
-      {  
-        /* Blocking error : transfer is aborted
-           Set the USART state ready to be able to start again the process,
-           Disable Interrupts, and disable DMA requests, if ongoing */
-        USART_EndTransfer(husart);
-
-        /* Disable the USART DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
-        {
-          CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR | USART_CR3_DMAR);
-
-          /* Abort the USART DMA Tx channel */
-          if(husart->hdmatx != NULL)
-          {
-            /* Set the USART Tx DMA Abort callback to NULL : no callback
-               executed at end of DMA abort procedure */
-            husart->hdmatx->XferAbortCallback = NULL;
-            
-            /* Abort DMA TX */
-            HAL_DMA_Abort_IT(husart->hdmatx);
-          }
-
-          /* Abort the USART DMA Rx channel */
-          if(husart->hdmarx != NULL)
-          {
-            /* Set the USART Rx DMA Abort callback : 
-               will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
-            husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
-
-            /* Abort DMA RX */
-            if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
-            {
-              /* Call Directly husart->hdmarx->XferAbortCallback function in case of error */
-              husart->hdmarx->XferAbortCallback(husart->hdmarx);
-            }
-          }
-          else
-          {
-            /* Call user error callback */
-            HAL_USART_ErrorCallback(husart);
-          }
-        }
-        else
-        {
-          /* Call user error callback */
-          HAL_USART_ErrorCallback(husart);
-        }
-      }
-      else
-      {
-        /* Non Blocking error : transfer could go on. 
-           Error is notified to user through user error callback */
-        HAL_USART_ErrorCallback(husart);
-        husart->ErrorCode = HAL_USART_ERROR_NONE;
-      }
-    }
-    return;
-
-  } /* End if some error occurs */
-
-
-  /* USART in mode Transmitter ------------------------------------------------*/
-  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-  {
-    if(husart->State == HAL_USART_STATE_BUSY_TX)
-    {
-      USART_Transmit_IT(husart);
-    }
-    else
-    {
-      USART_TransmitReceive_IT(husart);
-    }
-    return;
-  }
-
-  /* USART in mode Transmitter (transmission end) -----------------------------*/
-  if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
-  {
-    USART_EndTransmit_IT(husart);
-    return;
-  }
-
-}
-
-/**
-  * @brief  Tx Transfer completed callback.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_TxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Tx Half Transfer completed callback.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_USART_TxHalfCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Transfer completed callback.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_USART_RxCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  Rx Half Transfer completed callback.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_RxHalfCpltCallback can be implemented in the user file
-   */
-}
-
-/**
-  * @brief  Tx/Rx Transfers completed callback for the non-blocking process.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_TxRxCpltCallback can be implemented in the user file
-   */
-}
-
-/**
-  * @brief  USART error callback.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_ErrorCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @brief  USART Abort Complete callback.
-  * @param  husart USART handle.
-  * @retval None
-  */
-__weak void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(husart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_USART_AbortCpltCallback can be implemented in the user file.
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_Exported_Functions_Group3 Peripheral State and Error functions
- *  @brief   USART Peripheral State and Error functions
- *
-@verbatim
-  ==============================================================================
-            ##### Peripheral State and Error functions #####
-  ==============================================================================
-    [..]
-    This subsection provides functions allowing to :
-      (+) Return the USART handle state
-      (+) Return the USART handle error code
-
-@endverbatim
-  * @{
-  */
-
-
-/**
-  * @brief  Return the USART handle state.
-  * @param  husart pointer to a USART_HandleTypeDef structure that contains
-  *                  the configuration information for the specified USART.
-  * @retval USART handle state
-  */
-HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
-{
-  return husart->State;
-}
-
-/**
-  * @brief  Return the USART error code.
-  * @param  husart pointer to a USART_HandleTypeDef structure that contains
-  *                  the configuration information for the specified USART.
-  * @retval USART handle Error Code
-  */
-uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
-{
-  return husart->ErrorCode;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @defgroup USART_Private_Functions USART Private Functions
-  * @brief   USART Private functions
-  *
-@verbatim
-    [..]
-    This subsection provides a set of functions allowing to control the USART.
-     (+) USART_SetConfig() API is used to set the USART communication parameters.
-     (+) USART_CheckIdleState() APi ensures that TEACK and/or REACK bits are set after initialization
-
-@endverbatim
-  * @{
-  */
-/**
-  * @brief  End ongoing transfer on USART peripheral (following error detection or Transfer completion).
-  * @param  husart USART handle.
-  * @retval None
-  */
-static void USART_EndTransfer(USART_HandleTypeDef *husart)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-  /* At end of process, restore husart->State to Ready */
-  husart->State = HAL_USART_STATE_READY;
-}
-
-/**
-  * @brief  DMA USART transmit process complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    husart->TxXferCount = 0U;
-
-    if(husart->State == HAL_USART_STATE_BUSY_TX)
-    {
-      /* Disable the DMA transfer for transmit request by resetting the DMAT bit
-         in the USART CR3 register */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-      /* Enable the USART Transmit Complete Interrupt */
-      __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
-    }
-  }
-  /* DMA Circular mode */
-  else
-  {
-    if(husart->State == HAL_USART_STATE_BUSY_TX)
-    {
-      HAL_USART_TxCpltCallback(husart);
-    }
-  }
-}
-
-/**
-  * @brief  DMA USART transmit process half complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_USART_TxHalfCpltCallback(husart);
-}
-
-/**
-  * @brief  DMA USART receive process complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  /* DMA Normal mode */
-  if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
-  {
-    husart->RxXferCount = 0U;
-
-    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-    /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit
-       in USART CR3 register */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-    /* similarly, disable the DMA TX transfer that was started to provide the
-       clock to the slave device */
-    CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
-
-    if(husart->State == HAL_USART_STATE_BUSY_RX)
-    {
-      HAL_USART_RxCpltCallback(husart);
-    }
-    /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
-    else
-    {
-      HAL_USART_TxRxCpltCallback(husart);
-    }
-    husart->State= HAL_USART_STATE_READY;
-  }
-  /* DMA circular mode */
-  else
-  {
-    if(husart->State == HAL_USART_STATE_BUSY_RX)
-    {
-      HAL_USART_RxCpltCallback(husart);
-    }
-    /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
-    else
-    {
-      HAL_USART_TxRxCpltCallback(husart);
-    }
-  }    
-
-}
-
-/**
-  * @brief  DMA USART receive process half complete callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  HAL_USART_RxHalfCpltCallback(husart);
-}
-
-/**
-  * @brief  DMA USART communication error callback.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMAError(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-
-  husart->RxXferCount = 0U;
-  husart->TxXferCount = 0U;
-  USART_EndTransfer(husart);
-
-  husart->ErrorCode |= HAL_USART_ERROR_DMA;
-  husart->State= HAL_USART_STATE_READY;
-
-  HAL_USART_ErrorCallback(husart);
-}
-
-/**
-  * @brief  DMA USART communication abort callback, when initiated by HAL services on Error
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef*)(hdma->Parent);
-  husart->RxXferCount = 0U;
-  husart->TxXferCount = 0U;
-
-  HAL_USART_ErrorCallback(husart);
-}
-
-/**
-  * @brief  DMA USART Tx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Tx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Rx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef* )(hdma->Parent);
-  
-  husart->hdmatx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(husart->hdmarx != NULL)
-  {
-    if(husart->hdmarx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  husart->TxXferCount = 0U;
-  husart->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-  /* Restore husart->State to Ready */
-  husart->State  = HAL_USART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_USART_AbortCpltCallback(husart);
-}
-
-
-/**
-  * @brief  DMA USART Rx communication abort callback, when initiated by user
-  *         (To be called at end of DMA Rx Abort procedure following user abort request).
-  * @note   When this callback is executed, User Abort complete call back is called only if no
-  *         Abort still ongoing for Tx DMA Handle.
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
-{
-  USART_HandleTypeDef* husart = (USART_HandleTypeDef* )(hdma->Parent);
-  
-  husart->hdmarx->XferAbortCallback = NULL;
-
-  /* Check if an Abort process is still ongoing */
-  if(husart->hdmatx != NULL)
-  {
-    if(husart->hdmatx->XferAbortCallback != NULL)
-    {
-      return;
-    }
-  }
-  
-  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
-  husart->TxXferCount = 0U;
-  husart->RxXferCount = 0U;
-
-  /* Reset errorCode */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-  /* Clear the Error flags in the ICR register */
-  __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF | USART_CLEAR_NEF | USART_CLEAR_PEF | USART_CLEAR_FEF);
-
-  /* Restore husart->State to Ready */
-  husart->State  = HAL_USART_STATE_READY;
-
-  /* Call user Abort complete callback */
-  HAL_USART_AbortCpltCallback(husart);
-}
-
-
-/**
-  * @brief  Handle USART Communication Timeout.
-  * @param  husart USART handle.
-  * @param  Flag Specifies the USART flag to check.
-  * @param  Status the Flag status (SET or RESET).
-  * @param  Tickstart Tick start value
-  * @param  Timeout timeout duration.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
-{
-  /* Wait until flag is set */
-  while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
-  {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
-      {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-        CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-        husart->State= HAL_USART_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(husart);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-
-/**
-  * @brief Configure the USART peripheral.
-  * @param husart USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
-{
-  uint32_t tmpreg                      = 0x0U;
-  USART_ClockSourceTypeDef clocksource = USART_CLOCKSOURCE_UNDEFINED;
-  HAL_StatusTypeDef ret                = HAL_OK;
-  uint16_t brrtemp                     = 0x0000U;
-  uint16_t usartdiv                    = 0x0000U;  
-
-  /* Check the parameters */
-  assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
-  assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
-  assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
-  assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
-  assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
-  assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
-  assert_param(IS_USART_PARITY(husart->Init.Parity));
-  assert_param(IS_USART_MODE(husart->Init.Mode));
-
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-   /* Clear M, PCE, PS, TE and RE bits and configure
-   *  the USART Word Length, Parity and Mode:
-   *  set the M bits according to husart->Init.WordLength value
-   *  set PCE and PS bits according to husart->Init.Parity value
-   *  set TE and RE bits according to husart->Init.Mode value 
-   *  force OVER8 to 1 to allow to reach the maximum speed (Fclock/8)  */
-  tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
-  MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
-
-  /*---------------------------- USART CR2 Configuration ---------------------*/
-  /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits:
-   * set CPOL bit according to husart->Init.CLKPolarity value
-   * set CPHA bit according to husart->Init.CLKPhase value
-   * set LBCL bit according to husart->Init.CLKLastBit value
-   * set STOP[13:12] bits according to husart->Init.StopBits value */
-  tmpreg = (uint32_t)(USART_CLOCK_ENABLE);
-  tmpreg |= ((uint32_t)husart->Init.CLKPolarity | (uint32_t)husart->Init.CLKPhase);
-  tmpreg |= ((uint32_t)husart->Init.CLKLastBit | (uint32_t)husart->Init.StopBits);
-  MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  /* no CR3 register configuration                                            */
-
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  /* BRR is filled-up according to OVER8 bit setting which is forced to 1     */ 
-  USART_GETCLOCKSOURCE(husart, clocksource);
-  switch (clocksource)
-  {
-    case USART_CLOCKSOURCE_PCLK1:
-      usartdiv = (uint16_t)(((2*HAL_RCC_GetPCLK1Freq()) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_HSI:
-      usartdiv = (uint16_t)(((2*HSI_VALUE) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_SYSCLK:
-      usartdiv = (uint16_t)(((2*HAL_RCC_GetSysClockFreq()) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_LSE:
-      usartdiv = (uint16_t)(((2*LSE_VALUE) + (husart->Init.BaudRate/2)) / husart->Init.BaudRate);
-      break;
-    case USART_CLOCKSOURCE_UNDEFINED:
-    default:
-      ret = HAL_ERROR;
-      break;
-  }
-  
-  brrtemp = usartdiv & 0xFFF0U;
-  brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
-  husart->Instance->BRR = brrtemp;
-
-  return ret;
-}
-
-/**
-  * @brief Check the USART Idle State.
-  * @param husart USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart)
-{
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-  uint32_t tickstart = 0U;
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-  /* Initialize the USART ErrorCode */
-  husart->ErrorCode = HAL_USART_ERROR_NONE;
-
-#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
-
-  /* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
-     Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature. 
-  */
-  if (IS_UART_WAKEUP_FROMSTOP_INSTANCE(husart->Instance))
-  {
-    /* Check if the Transmitter is enabled */
-    if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
-    {
-      /* Wait until TEACK flag is set */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-
-    /* Check if the Receiver is enabled */
-    if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
-    {
-      /* Wait until REACK flag is set */
-      if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK)
-      {
-        /* Timeout occurred */
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
-
-  /* Initialize the USART state*/
-  husart->State= HAL_USART_STATE_READY;
-
-  /* Process Unlocked */
-  __HAL_UNLOCK(husart);
-
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Simplex send an amount of data in non-blocking mode.
-  * @note   Function called under interruption only, once
-  *         interruptions have been enabled by HAL_USART_Transmit_IT().
-  * @note   The USART errors are not managed to avoid the overrun error.
-  * @param  husart USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
-{
-  uint16_t* tmp=0U;
-
-  /* Check that a Tx process is ongoing */
-  if(husart->State == HAL_USART_STATE_BUSY_TX)
-  {
-
-    if(husart->TxXferCount == 0U)
-    {
-      /* Disable the USART Transmit data register empty interrupt */
-      __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
-
-      /* Enable the USART Transmit Complete Interrupt */
-      __HAL_USART_ENABLE_IT(husart, USART_IT_TC);
-
-      return HAL_OK;
-    }
-    else
-    {
-      if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-      {
-        tmp = (uint16_t*) husart->pTxBuffPtr;
-        husart->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-        husart->pTxBuffPtr += 2U;
-      }
-      else
-      {
-        husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFFU);
-      }
-
-      husart->TxXferCount--;
-
-      return HAL_OK;
-    }
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-
-/**
-  * @brief  Wraps up transmission in non-blocking mode.
-  * @param  husart Pointer to a USART_HandleTypeDef structure that contains
-  *                the configuration information for the specified USART module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
-{
-  /* Disable the USART Transmit Complete Interrupt */
-  __HAL_USART_DISABLE_IT(husart, USART_IT_TC);
-
-  /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-  __HAL_USART_DISABLE_IT(husart, USART_IT_ERR);
-
-  /* Tx process is ended, restore husart->State to Ready */
-  husart->State = HAL_USART_STATE_READY;
-
-  HAL_USART_TxCpltCallback(husart);
-
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Simplex receive an amount of data in non-blocking mode.
-  * @note   Function called under interruption only, once
-  *         interruptions have been enabled by HAL_USART_Receive_IT().
-  * @param  husart USART handle
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
-{
-  uint16_t* tmp=0U;
-  uint16_t uhMask = husart->Mask;
-
-  if(husart->State == HAL_USART_STATE_BUSY_RX)
-  {
-
-    if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-    {
-      tmp = (uint16_t*) husart->pRxBuffPtr;
-      *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-      husart->pRxBuffPtr += 2U;
-    }
-    else
-    {
-      *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-    }
-
-    /* Send dummy byte in order to generate the clock for the Slave to Send the next data */
-    husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FFU);
-
-    if(--husart->RxXferCount == 0U)
-    {
-      /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
-      CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore husart->State to Ready */
-      husart->State = HAL_USART_STATE_READY;
-
-      HAL_USART_RxCpltCallback(husart);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief  Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
-  * @note   Function called under interruption only, once
-  *         interruptions have been enabled by HAL_USART_TransmitReceive_IT().
-  * @param husart USART handle.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
-{
-  uint16_t* tmp=0U;
-  uint16_t uhMask = husart->Mask;
-
-  if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
-  {
-
-    if(husart->TxXferCount != 0x00U)
-    {
-      if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
-      {
-        if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-        {
-          tmp = (uint16_t*) husart->pTxBuffPtr;
-          husart->Instance->TDR = (uint16_t)(*tmp & uhMask);
-          husart->pTxBuffPtr += 2U;
-        }
-        else
-        {
-          husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)uhMask);
-        }
-        husart->TxXferCount--;
-
-        /* Check the latest data transmitted */
-        if(husart->TxXferCount == 0U)
-        {
-           __HAL_USART_DISABLE_IT(husart, USART_IT_TXE);
-        }
-      }
-    }
-
-    if(husart->RxXferCount != 0x00U)
-    {
-      if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
-      {
-        if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE))
-        {
-          tmp = (uint16_t*) husart->pRxBuffPtr;
-          *tmp = (uint16_t)(husart->Instance->RDR & uhMask);
-          husart->pRxBuffPtr += 2U;
-        }
-        else
-        {
-          *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask);
-        }
-        husart->RxXferCount--;
-      }
-    }
-
-    /* Check the latest data received */
-    if(husart->RxXferCount == 0U)
-    {
-      /* Disable the USART Parity Error Interrupt and RXNE interrupt*/
-      CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-
-      /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-
-      /* Rx process is completed, restore husart->State to Ready */
-      husart->State = HAL_USART_STATE_READY;
-
-      HAL_USART_TxRxCpltCallback(husart);
-
-      return HAL_OK;
-    }
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @}
-  */
-
-#endif /* HAL_USART_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_hal_wwdg.c b/lib/hal-stm32f0/source/stm32f0xx_hal_wwdg.c
deleted file mode 100644
index ae48b997..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_hal_wwdg.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_hal_wwdg.c
-  * @author  MCD Application Team
-  * @brief   WWDG HAL module driver.
-  *          This file provides firmware functions to manage the following 
-  *          functionalities of the Window Watchdog (WWDG) peripheral:
-  *           + Initialization and Configuration function
-  *           + IO operation functions
-  @verbatim
-  ==============================================================================
-                      ##### WWDG specific features #####
-  ==============================================================================
-  [..]
-    Once enabled the WWDG generates a system reset on expiry of a programmed
-    time period, unless the program refreshes the counter (T[6;0] downcounter)
-    before reaching 0x3F value (i.e. a reset is generated when the counter
-    value rolls over from 0x40 to 0x3F).
-
-    (+) An MCU reset is also generated if the counter value is refreshed
-        before the counter has reached the refresh window value. This
-        implies that the counter must be refreshed in a limited window.
-
-    (+) Once enabled the WWDG cannot be disabled except by a system reset.
-
-    (+) WWDGRST flag in RCC_CSR register informs when a WWDG reset has 
-        occurred (check available with __HAL_RCC_GET_FLAG(RCC_FLAG_WWDGRST)).
-
-    (+) The WWDG downcounter input clock is derived from the APB clock divided
-        by a programmable prescaler.
-	
-    (+) WWDG downcounter clock (Hz) = PCLK / (4096 * Prescaler)
-
-    (+) WWDG timeout (ms) = (1000 * (T[5;0] + 1)) / (WWDG downcounter clock)
-        where T[5;0] are the lowest 6 bits of downcounter.
-
-    (+) WWDG Counter refresh is allowed between the following limits :
-        (++) min time (ms) = (1000 * (T[5;0] - Window)) / (WWDG downcounter clock)
-        (++) max time (ms) = (1000 * (T[5;0] - 0x40)) / (WWDG downcounter clock)
-
-    (+) Min-max timeout value @48 MHz(PCLK): ~85,3us / ~5,46 ms
-	
-    (+) The Early Wakeup Interrupt (EWI) can be used if specific safety 
-        operations or data logging must be performed before the actual reset is
-        generated. When the downcounter reaches the value 0x40, an EWI interrupt
-        is generated and the corresponding interrupt service routine (ISR) can 
-        be used to trigger specific actions (such as communications or data 
-        logging), before resetting the device.
-        In some applications, the EWI interrupt can be used to manage a software
-        system check and/or system recovery/graceful degradation, without 
-        generating a WWDG reset. In this case, the corresponding interrupt 
-        service routine (ISR) should reload the WWDG counter to avoid the WWDG 
-        reset, then trigger the required actions.
-        Note:When the EWI interrupt cannot be served, e.g. due to a system lock 
-        in a higher priority task, the WWDG reset will eventually be generated.
-
-    (+) Debug mode : When the microcontroller enters debug mode (core halted),
-        the WWDG counter either continues to work normally or stops, depending 
-        on DBG_WWDG_STOP configuration bit in DBG module, accessible through
-        __HAL_DBGMCU_FREEZE_WWDG() and __HAL_DBGMCU_UNFREEZE_WWDG() macros
-
-                     ##### How to use this driver #####
-  ==============================================================================
-  [..]
-    (+) Enable WWDG APB1 clock using __HAL_RCC_WWDG_CLK_ENABLE().
-
-    (+) Set the WWDG prescaler, refresh window, counter value and Early Wakeup 
-        Interrupt mode using using HAL_WWDG_Init() function.
-        This enables WWDG peripheral and the downcounter starts downcounting 
-        from given counter value.
-        Init function can be called again to modify all watchdog parameters, 
-        however if EWI mode has been set once, it can't be clear until next 
-        reset.
-
-    (+) The application program must refresh the WWDG counter at regular
-        intervals during normal operation to prevent an MCU reset using
-        HAL_WWDG_Refresh() function. This operation must occur only when
-        the counter is lower than the window value already programmed.
-
-    (+) if Early Wakeup Interrupt mode is enable an interrupt is generated when 
-        the counter reaches 0x40. User can add his own code in weak function 
-        HAL_WWDG_EarlyWakeupCallback().
-
-     *** WWDG HAL driver macros list ***
-     ==================================
-     [..]
-       Below the list of most used macros in WWDG HAL driver.
-
-      (+) __HAL_WWDG_GET_IT_SOURCE: Check the selected WWDG's interrupt source.
-      (+) __HAL_WWDG_GET_FLAG: Get the selected WWDG's flag status.
-      (+) __HAL_WWDG_CLEAR_FLAG: Clear the WWDG's pending flags.
-
-  @endverbatim
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_hal.h"
-
-/** @addtogroup STM32F0xx_HAL_Driver
-  * @{
-  */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
-/** @defgroup WWDG WWDG
-  * @brief WWDG HAL module driver.
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-
-/** @defgroup WWDG_Exported_Functions WWDG Exported Functions
-  * @{
-  */
-
-/** @defgroup WWDG_Exported_Functions_Group1 Initialization and Configuration functions
- *  @brief    Initialization and Configuration functions.
- *
-@verbatim
-  ==============================================================================
-          ##### Initialization and Configuration functions #####
-  ==============================================================================
-  [..]  
-    This section provides functions allowing to:
-      (+) Initialize and start the WWDG according to the specified parameters
-          in the WWDG_InitTypeDef of associated handle.
-      (+) Initialize the WWDG MSP.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Initialize the WWDG according to the specified.
-  *         parameters in the WWDG_InitTypeDef of  associated handle.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Check the WWDG handle allocation */
-  if(hwwdg == NULL)
-  {
-    return HAL_ERROR;
-  }
-
-  /* Check the parameters */
-  assert_param(IS_WWDG_ALL_INSTANCE(hwwdg->Instance));
-  assert_param(IS_WWDG_PRESCALER(hwwdg->Init.Prescaler));
-  assert_param(IS_WWDG_WINDOW(hwwdg->Init.Window));
-  assert_param(IS_WWDG_COUNTER(hwwdg->Init.Counter));
-  assert_param(IS_WWDG_EWI_MODE(hwwdg->Init.EWIMode));
-
-  /* Init the low level hardware */
-  HAL_WWDG_MspInit(hwwdg);
-
-  /* Set WWDG Counter */
-  WRITE_REG(hwwdg->Instance->CR, (WWDG_CR_WDGA | hwwdg->Init.Counter));
-
-  /* Set WWDG Prescaler and Window */
-  WRITE_REG(hwwdg->Instance->CFR, (hwwdg->Init.EWIMode | hwwdg->Init.Prescaler | hwwdg->Init.Window));
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-
-/**
-  * @brief  Initialize the WWDG MSP.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @note   When rewriting this function in user file, mechanism may be added
-  *         to avoid multiple initialize when HAL_WWDG_Init function is called
-  *         again to change parameters.
-  * @retval None
-  */
-__weak void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hwwdg);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_WWDG_MspInit could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/** @defgroup WWDG_Exported_Functions_Group2 IO operation functions
- *  @brief    IO operation functions 
- *
-@verbatim
-  ==============================================================================
-                      ##### IO operation functions #####
-  ==============================================================================  
-  [..]
-    This section provides functions allowing to:
-    (+) Refresh the WWDG.
-    (+) Handle WWDG interrupt request and associated function callback.
-
-@endverbatim
-  * @{
-  */
-
-/**
-  * @brief  Refresh the WWDG.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Write to WWDG CR the WWDG Counter value to refresh with */
-  WRITE_REG(hwwdg->Instance->CR, (hwwdg->Init.Counter));
-
-  /* Return function status */
-  return HAL_OK;
-}
-
-/**
-  * @brief  Handle WWDG interrupt request.
-  * @note   The Early Wakeup Interrupt (EWI) can be used if specific safety operations
-  *         or data logging must be performed before the actual reset is generated.
-  *         The EWI interrupt is enabled by calling HAL_WWDG_Init function with 
-  *         EWIMode set to WWDG_EWI_ENABLE.
-  *         When the downcounter reaches the value 0x40, and EWI interrupt is
-  *         generated and the corresponding Interrupt Service Routine (ISR) can
-  *         be used to trigger specific actions (such as communications or data
-  *         logging), before resetting the device.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval None
-  */
-void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg)
-{
-  /* Check if Early Wakeup Interrupt is enable */
-  if(__HAL_WWDG_GET_IT_SOURCE(hwwdg, WWDG_IT_EWI) != RESET)
-  {
-    /* Check if WWDG Early Wakeup Interrupt occurred */
-    if(__HAL_WWDG_GET_FLAG(hwwdg, WWDG_FLAG_EWIF) != RESET)
-    {
-      /* Clear the WWDG Early Wakeup flag */
-      __HAL_WWDG_CLEAR_FLAG(hwwdg, WWDG_FLAG_EWIF);
-
-      /* Early Wakeup callback */ 
-      HAL_WWDG_EarlyWakeupCallback(hwwdg);
-    }
-  }
-}
-
-
-/**
-  * @brief  WWDG Early Wakeup callback.
-  * @param  hwwdg  pointer to a WWDG_HandleTypeDef structure that contains
-  *                the configuration information for the specified WWDG module.
-  * @retval None
-  */
-__weak void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hwwdg);
-
-  /* NOTE: This function should not be modified, when the callback is needed,
-           the HAL_WWDG_EarlyWakeupCallback could be implemented in the user file
-   */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* HAL_WWDG_MODULE_ENABLED */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_adc.c b/lib/hal-stm32f0/source/stm32f0xx_ll_adc.c
deleted file mode 100644
index 7db18a6a..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_adc.c
+++ /dev/null
@@ -1,567 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_adc.c
-  * @author  MCD Application Team
-  * @brief   ADC LL module driver
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_adc.h"
-#include "stm32f0xx_ll_bus.h"
-
-#ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (ADC1)
-
-/** @addtogroup ADC_LL ADC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup ADC_LL_Private_Constants
-  * @{
-  */
-
-/* Definitions of ADC hardware constraints delays */
-/* Note: Only ADC IP HW delays are defined in ADC LL driver driver,           */
-/*       not timeout values:                                                  */
-/*       Timeout values for ADC operations are dependent to device clock      */
-/*       configuration (system clock versus ADC clock),                       */
-/*       and therefore must be defined in user application.                   */
-/*       Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout     */
-/*       values definition.                                                   */
-/* Note: ADC timeout values are defined here in CPU cycles to be independent  */
-/*       of device clock setting.                                             */
-/*       In user application, ADC timeout values should be defined with       */
-/*       temporal values, in function of device clock settings.               */
-/*       Highest ratio CPU clock frequency vs ADC clock frequency:            */
-/*        - ADC clock from synchronous clock with AHB prescaler 512,          */
-/*          APB prescaler 16, ADC prescaler 4.                                */
-/*        - ADC clock from asynchronous clock (HSI) with prescaler 1,         */
-/*          with highest ratio CPU clock frequency vs HSI clock frequency:    */
-/*          CPU clock frequency max 48MHz, HSI frequency 14MHz: ratio 4.      */
-/* Unit: CPU cycles.                                                          */
-#define ADC_CLOCK_RATIO_VS_CPU_HIGHEST          ((uint32_t) 512U * 16U * 4U)
-#define ADC_TIMEOUT_DISABLE_CPU_CYCLES          (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
-#define ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES  (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
-
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-
-/** @addtogroup ADC_LL_Private_Macros
-  * @{
-  */
-
-/* Check of parameters for configuration of ADC hierarchical scope:           */
-/* common to several ADC instances.                                           */
-/* Check of parameters for configuration of ADC hierarchical scope:           */
-/* ADC instance.                                                              */
-#define IS_LL_ADC_CLOCK(__CLOCK__)                                             \
-  (   ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4)                             \
-   || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2)                             \
-   || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC)                                      \
-  )
-
-#define IS_LL_ADC_RESOLUTION(__RESOLUTION__)                                   \
-  (   ((__RESOLUTION__) == LL_ADC_RESOLUTION_12B)                              \
-   || ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B)                              \
-   || ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B)                               \
-   || ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B)                               \
-  )
-
-#define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__)                                   \
-  (   ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT)                            \
-   || ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT)                             \
-  )
-
-#define IS_LL_ADC_LOW_POWER(__LOW_POWER__)                                     \
-  (   ((__LOW_POWER__) == LL_ADC_LP_MODE_NONE)                                 \
-   || ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT)                                  \
-   || ((__LOW_POWER__) == LL_ADC_LP_AUTOPOWEROFF)                              \
-   || ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF)                     \
-  )
-
-/* Check of parameters for configuration of ADC hierarchical scope:           */
-/* ADC group regular                                                          */
-#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__)                         \
-  (   ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE)                      \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_TRGO)                 \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH4)                  \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO)                 \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO)                 \
-   || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM15_TRGO)                \
-  )
-
-#define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__)                 \
-  (   ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE)                    \
-   || ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS)                \
-  )
-
-#define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__)                       \
-  (   ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE)                 \
-   || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED)              \
-   || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED)            \
-  )
-
-#define IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(__REG_OVR_DATA_BEHAVIOR__)             \
-  (   ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_PRESERVED)           \
-   || ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_OVERWRITTEN)         \
-  )
-
-#define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__)          \
-  (   ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE)           \
-   || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK)             \
-  )
-
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup ADC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup ADC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize registers of all ADC instances belonging to
-  *         the same ADC common instance to their default reset values.
-  * @note   This function is performing a hard reset, using high level
-  *         clock source RCC ADC reset.
-  * @param  ADCxy_COMMON ADC common instance
-  *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC common registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
-{
-  /* Check the parameters */
-  assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
-  
-  /* Force reset of ADC clock (core clock) */
-  LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_ADC1);
-  
-  /* Release reset of ADC clock (core clock) */
-  LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_ADC1);
-  
-  return SUCCESS;
-}
-
-
-/**
-  * @brief  De-initialize registers of the selected ADC instance
-  *         to their default reset values.
-  * @note   To reset all ADC instances quickly (perform a hard reset),
-  *         use function @ref LL_ADC_CommonDeInit().
-  * @note   If this functions returns error status, it means that ADC instance
-  *         is in an unknown state.
-  *         In this case, perform a hard reset using high level
-  *         clock source RCC ADC reset.
-  *         Refer to function @ref LL_ADC_CommonDeInit().
-  * @param  ADCx ADC instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC registers are de-initialized
-  *          - ERROR: ADC registers are not de-initialized
-  */
-ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
-{
-  ErrorStatus status = SUCCESS;
-  
-  __IO uint32_t timeout_cpu_cycles = 0U;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(ADCx));
-  
-  /* Disable ADC instance if not already disabled.                            */
-  if(LL_ADC_IsEnabled(ADCx) == 1U)
-  {
-    /* Set ADC group regular trigger source to SW start to ensure to not      */
-    /* have an external trigger event occurring during the conversion stop    */
-    /* ADC disable process.                                                   */
-    LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE);
-    
-    /* Stop potential ADC conversion on going on ADC group regular.           */
-    if(LL_ADC_REG_IsConversionOngoing(ADCx) != 0U)
-    {
-      if(LL_ADC_REG_IsStopConversionOngoing(ADCx) == 0U)
-      {
-        LL_ADC_REG_StopConversion(ADCx);
-      }
-    }
-    
-    /* Wait for ADC conversions are effectively stopped                       */
-    timeout_cpu_cycles = ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES;
-    while (LL_ADC_REG_IsStopConversionOngoing(ADCx) == 1U)
-    {
-      if(timeout_cpu_cycles-- == 0U)
-      {
-        /* Time-out error */
-        status = ERROR;
-      }
-    }
-    
-    /* Disable the ADC instance */
-    LL_ADC_Disable(ADCx);
-    
-    /* Wait for ADC instance is effectively disabled */
-    timeout_cpu_cycles = ADC_TIMEOUT_DISABLE_CPU_CYCLES;
-    while (LL_ADC_IsDisableOngoing(ADCx) == 1U)
-    {
-      if(timeout_cpu_cycles-- == 0U)
-      {
-        /* Time-out error */
-        status = ERROR;
-      }
-    }
-  }
-  
-  /* Check whether ADC state is compliant with expected state */
-  if(READ_BIT(ADCx->CR,
-              (  ADC_CR_ADSTP | ADC_CR_ADSTART
-               | ADC_CR_ADDIS | ADC_CR_ADEN   )
-             )
-     == 0U)
-  {
-    /* ========== Reset ADC registers ========== */
-    /* Reset register IER */
-    CLEAR_BIT(ADCx->IER,
-              (  LL_ADC_IT_ADRDY
-               | LL_ADC_IT_EOC
-               | LL_ADC_IT_EOS
-               | LL_ADC_IT_OVR
-               | LL_ADC_IT_EOSMP
-               | LL_ADC_IT_AWD1 )
-             );
-    
-    /* Reset register ISR */
-    SET_BIT(ADCx->ISR,
-            (  LL_ADC_FLAG_ADRDY
-             | LL_ADC_FLAG_EOC
-             | LL_ADC_FLAG_EOS
-             | LL_ADC_FLAG_OVR
-             | LL_ADC_FLAG_EOSMP
-             | LL_ADC_FLAG_AWD1 )
-           );
-    
-    /* Reset register CR */
-    /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode     */
-    /* "read-set": no direct reset applicable.                                */
-    /* No action on register CR */
-    
-    /* Reset register CFGR1 */
-    CLEAR_BIT(ADCx->CFGR1,
-              (  ADC_CFGR1_AWDCH   | ADC_CFGR1_AWDEN  | ADC_CFGR1_AWDSGL  | ADC_CFGR1_DISCEN
-               | ADC_CFGR1_AUTOFF  | ADC_CFGR1_WAIT   | ADC_CFGR1_CONT    | ADC_CFGR1_OVRMOD
-               | ADC_CFGR1_EXTEN   | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN   | ADC_CFGR1_RES
-               | ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN                     )
-             );
-    
-    /* Reset register CFGR2 */
-    /* Note: Update of ADC clock mode is conditioned to ADC state disabled:   */
-    /*       already done above.                                              */
-    CLEAR_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE);
-    
-    /* Reset register SMPR */
-    CLEAR_BIT(ADCx->SMPR, ADC_SMPR_SMP);
-
-    /* Reset register TR */
-    MODIFY_REG(ADCx->TR, ADC_TR_HT | ADC_TR_LT, ADC_TR_HT);
-    
-    /* Reset register CHSELR */
-#if defined(ADC_CCR_VBATEN)
-    CLEAR_BIT(ADCx->CHSELR,
-              (  ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16
-               | ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
-               | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9  | ADC_CHSELR_CHSEL8
-               | ADC_CHSELR_CHSEL7  | ADC_CHSELR_CHSEL6  | ADC_CHSELR_CHSEL5  | ADC_CHSELR_CHSEL4
-               | ADC_CHSELR_CHSEL3  | ADC_CHSELR_CHSEL2  | ADC_CHSELR_CHSEL1  | ADC_CHSELR_CHSEL0 )
-             );
-#else
-    CLEAR_BIT(ADCx->CHSELR,
-              (                       ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16
-               | ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
-               | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9  | ADC_CHSELR_CHSEL8
-               | ADC_CHSELR_CHSEL7  | ADC_CHSELR_CHSEL6  | ADC_CHSELR_CHSEL5  | ADC_CHSELR_CHSEL4
-               | ADC_CHSELR_CHSEL3  | ADC_CHSELR_CHSEL2  | ADC_CHSELR_CHSEL1  | ADC_CHSELR_CHSEL0 )
-             );
-#endif
-    
-    /* Reset register DR */
-    /* bits in access mode read only, no direct reset applicable */
-    
-  }
-  else
-  {
-    /* ADC instance is in an unknown state */
-    /* Need to performing a hard reset of ADC instance, using high level      */
-    /* clock source RCC ADC reset.                                            */
-    /* Caution: On this STM32 serie, if several ADC instances are available   */
-    /*          on the selected device, RCC ADC reset will reset              */
-    /*          all ADC instances belonging to the common ADC instance.       */
-    status = ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Initialize some features of ADC instance.
-  * @note   These parameters have an impact on ADC scope: ADC instance.
-  *         Refer to corresponding unitary functions into
-  *         @ref ADC_LL_EF_Configuration_ADC_Instance .
-  * @note   The setting of these parameters by function @ref LL_ADC_Init()
-  *         is conditioned to ADC state:
-  *         ADC instance must be disabled.
-  *         This condition is applied to all ADC features, for efficiency
-  *         and compatibility over all STM32 families. However, the different
-  *         features can be set under different ADC state conditions
-  *         (setting possible with ADC enabled without conversion on going,
-  *         ADC enabled with conversion on going, ...)
-  *         Each feature can be updated afterwards with a unitary function
-  *         and potentially with ADC in a different state than disabled,
-  *         refer to description of each function for setting
-  *         conditioned to ADC state.
-  * @note   After using this function, some other features must be configured
-  *         using LL unitary functions.
-  *         The minimum configuration remaining to be done is:
-  *          - Set ADC group regular sequencer:
-  *            map channel on rank corresponding to channel number.
-  *            Refer to function @ref LL_ADC_REG_SetSequencerChannels();
-  *          - Set ADC channel sampling time
-  *            Refer to function LL_ADC_SetChannelSamplingTime();
-  * @param  ADCx ADC instance
-  * @param  ADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC registers are initialized
-  *          - ERROR: ADC registers are not initialized
-  */
-ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, LL_ADC_InitTypeDef *ADC_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(ADCx));
-  
-  assert_param(IS_LL_ADC_CLOCK(ADC_InitStruct->Clock));
-  assert_param(IS_LL_ADC_RESOLUTION(ADC_InitStruct->Resolution));
-  assert_param(IS_LL_ADC_DATA_ALIGN(ADC_InitStruct->DataAlignment));
-  assert_param(IS_LL_ADC_LOW_POWER(ADC_InitStruct->LowPowerMode));
-  
-  /* Note: Hardware constraint (refer to description of this function):       */
-  /*       ADC instance must be disabled.                                     */
-  if(LL_ADC_IsEnabled(ADCx) == 0U)
-  {
-    /* Configuration of ADC hierarchical scope:                               */
-    /*  - ADC instance                                                        */
-    /*    - Set ADC data resolution                                           */
-    /*    - Set ADC conversion data alignment                                 */
-    /*    - Set ADC low power mode                                            */
-    MODIFY_REG(ADCx->CFGR1,
-                 ADC_CFGR1_RES
-               | ADC_CFGR1_ALIGN
-               | ADC_CFGR1_WAIT
-               | ADC_CFGR1_AUTOFF
-              ,
-                 ADC_InitStruct->Resolution
-               | ADC_InitStruct->DataAlignment
-               | ADC_InitStruct->LowPowerMode
-              );
-    
-  }
-  else
-  {
-    /* Initialization error: ADC instance is not disabled. */
-    status = ERROR;
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_ADC_InitTypeDef field to default value.
-  * @param  ADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
-  *                        whose fields will be set to default values.
-  * @retval None
-  */
-void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct)
-{
-  /* Set ADC_InitStruct fields to default values */
-  /* Set fields of ADC instance */
-  ADC_InitStruct->Clock         = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
-  ADC_InitStruct->Resolution    = LL_ADC_RESOLUTION_12B;
-  ADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
-  ADC_InitStruct->LowPowerMode  = LL_ADC_LP_MODE_NONE;
-  
-}
-
-/**
-  * @brief  Initialize some features of ADC group regular.
-  * @note   These parameters have an impact on ADC scope: ADC group regular.
-  *         Refer to corresponding unitary functions into
-  *         @ref ADC_LL_EF_Configuration_ADC_Group_Regular
-  *         (functions with prefix "REG").
-  * @note   The setting of these parameters by function @ref LL_ADC_Init()
-  *         is conditioned to ADC state:
-  *         ADC instance must be disabled.
-  *         This condition is applied to all ADC features, for efficiency
-  *         and compatibility over all STM32 families. However, the different
-  *         features can be set under different ADC state conditions
-  *         (setting possible with ADC enabled without conversion on going,
-  *         ADC enabled with conversion on going, ...)
-  *         Each feature can be updated afterwards with a unitary function
-  *         and potentially with ADC in a different state than disabled,
-  *         refer to description of each function for setting
-  *         conditioned to ADC state.
-  * @note   After using this function, other features must be configured
-  *         using LL unitary functions.
-  *         The minimum configuration remaining to be done is:
-  *          - Set ADC group regular sequencer:
-  *            map channel on rank corresponding to channel number.
-  *            Refer to function @ref LL_ADC_REG_SetSequencerChannels();
-  *          - Set ADC channel sampling time
-  *            Refer to function LL_ADC_SetChannelSamplingTime();
-  * @param  ADCx ADC instance
-  * @param  ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ADC registers are initialized
-  *          - ERROR: ADC registers are not initialized
-  */
-ErrorStatus LL_ADC_REG_Init(ADC_TypeDef *ADCx, LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_ADC_ALL_INSTANCE(ADCx));
-  assert_param(IS_LL_ADC_REG_TRIG_SOURCE(ADC_REG_InitStruct->TriggerSource));
-  assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(ADC_REG_InitStruct->SequencerDiscont));
-  assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(ADC_REG_InitStruct->ContinuousMode));
-  assert_param(IS_LL_ADC_REG_DMA_TRANSFER(ADC_REG_InitStruct->DMATransfer));
-  assert_param(IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(ADC_REG_InitStruct->Overrun));
-  
-  /* Note: Hardware constraint (refer to description of this function):       */
-  /*       ADC instance must be disabled.                                     */
-  if(LL_ADC_IsEnabled(ADCx) == 0U)
-  {
-    /* Configuration of ADC hierarchical scope:                               */
-    /*  - ADC group regular                                                   */
-    /*    - Set ADC group regular trigger source                              */
-    /*    - Set ADC group regular sequencer discontinuous mode                */
-    /*    - Set ADC group regular continuous mode                             */
-    /*    - Set ADC group regular conversion data transfer: no transfer or    */
-    /*      transfer by DMA, and DMA requests mode                            */
-    /*    - Set ADC group regular overrun behavior                            */
-    /* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by     */
-    /*       setting of trigger source to SW start.                           */
-    MODIFY_REG(ADCx->CFGR1,
-                 ADC_CFGR1_EXTSEL
-               | ADC_CFGR1_EXTEN
-               | ADC_CFGR1_DISCEN
-               | ADC_CFGR1_CONT
-               | ADC_CFGR1_DMAEN
-               | ADC_CFGR1_DMACFG
-               | ADC_CFGR1_OVRMOD
-              ,
-                 ADC_REG_InitStruct->TriggerSource
-               | ADC_REG_InitStruct->SequencerDiscont
-               | ADC_REG_InitStruct->ContinuousMode
-               | ADC_REG_InitStruct->DMATransfer
-               | ADC_REG_InitStruct->Overrun
-              );
-
-  }
-  else
-  {
-    /* Initialization error: ADC instance is not disabled. */
-    status = ERROR;
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_ADC_REG_InitTypeDef field to default value.
-  * @param  ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
-  *                            whose fields will be set to default values.
-  * @retval None
-  */
-void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
-{
-  /* Set ADC_REG_InitStruct fields to default values */
-  /* Set fields of ADC group regular */
-  /* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by       */
-  /*       setting of trigger source to SW start.                             */
-  ADC_REG_InitStruct->TriggerSource    = LL_ADC_REG_TRIG_SOFTWARE;
-  ADC_REG_InitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
-  ADC_REG_InitStruct->ContinuousMode   = LL_ADC_REG_CONV_SINGLE;
-  ADC_REG_InitStruct->DMATransfer      = LL_ADC_REG_DMA_TRANSFER_NONE;
-  ADC_REG_InitStruct->Overrun          = LL_ADC_REG_OVR_DATA_OVERWRITTEN;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* ADC1 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_comp.c b/lib/hal-stm32f0/source/stm32f0xx_ll_comp.c
deleted file mode 100644
index 0a4f6f9c..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_comp.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_comp.c
-  * @author  MCD Application Team
-  * @brief   COMP LL module driver
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_comp.h"
-
-#ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (COMP1) || defined (COMP2)
-
-/** @addtogroup COMP_LL COMP
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/** @addtogroup COMP_LL_Private_Macros
-  * @{
-  */
-
-/* Check of parameters for configuration of COMP hierarchical scope:          */
-/* COMP instance.                                                             */
-
-#define IS_LL_COMP_POWER_MODE(__POWER_MODE__)                                  \
-  (   ((__POWER_MODE__) == LL_COMP_POWERMODE_HIGHSPEED)                        \
-   || ((__POWER_MODE__) == LL_COMP_POWERMODE_MEDIUMSPEED)                      \
-   || ((__POWER_MODE__) == LL_COMP_POWERMODE_LOWPOWER)                         \
-   || ((__POWER_MODE__) == LL_COMP_POWERMODE_ULTRALOWPOWER)                    \
-  )
-
-/* Note: On this STM32 serie, comparator input plus parameters are            */
-/*       the different depending on COMP instances.                           */
-#define IS_LL_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__)               \
-  (((__COMP_INSTANCE__) == COMP1)                                              \
-    ? (                                                                        \
-          ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO1)                         \
-       || ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_DAC1_CH1)                    \
-      )                                                                        \
-      :                                                                        \
-      (                                                                        \
-          ((__INPUT_PLUS__) == LL_COMP_INPUT_PLUS_IO1)                         \
-      )                                                                        \
-  )
-
-/* Note: On this STM32 serie, comparator input minus parameters are           */
-/*       the same on all COMP instances.                                      */
-/*       However, comparator instance kept as macro parameter for             */
-/*       compatibility with other STM32 families.                             */
-#define IS_LL_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__)             \
-  (   ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_1_4VREFINT)                    \
-   || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_1_2VREFINT)                    \
-   || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_3_4VREFINT)                    \
-   || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_VREFINT)                       \
-   || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH1)                      \
-   || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_DAC1_CH2)                      \
-   || ((__INPUT_MINUS__) == LL_COMP_INPUT_MINUS_IO1)                           \
-  )
-
-#define IS_LL_COMP_INPUT_HYSTERESIS(__INPUT_HYSTERESIS__)                      \
-  (   ((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_NONE)                      \
-   || ((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_LOW)                       \
-   || ((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_MEDIUM)                    \
-   || ((__INPUT_HYSTERESIS__) == LL_COMP_HYSTERESIS_HIGH)                      \
-  )
-
-#define IS_LL_COMP_OUTPUT_SELECTION(__OUTPUT_SELECTION__)                      \
-  (   ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_NONE)                          \
-   || ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_TIM1_BKIN)                     \
-   || ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_TIM1_IC1)                      \
-   || ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_TIM1_OCCLR)                    \
-   || ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_TIM2_IC4)                      \
-   || ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_TIM2_OCCLR)                    \
-   || ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_TIM3_IC1)                      \
-   || ((__OUTPUT_SELECTION__) == LL_COMP_OUTPUT_TIM3_OCCLR)                    \
-  )
-
-#define IS_LL_COMP_OUTPUT_POLARITY(__POLARITY__)                               \
-  (   ((__POLARITY__) == LL_COMP_OUTPUTPOL_NONINVERTED)                        \
-   || ((__POLARITY__) == LL_COMP_OUTPUTPOL_INVERTED)                           \
-  )
-
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup COMP_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup COMP_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize registers of the selected COMP instance
-  *         to their default reset values.
-  * @note   If comparator is locked, de-initialization by software is
-  *         not possible.
-  *         The only way to unlock the comparator is a device hardware reset.
-  * @param  COMPx COMP instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: COMP registers are de-initialized
-  *          - ERROR: COMP registers are not de-initialized
-  */
-ErrorStatus LL_COMP_DeInit(COMP_TypeDef *COMPx)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_COMP_ALL_INSTANCE(COMPx));
-  
-  /* Note: Hardware constraint (refer to description of this function):       */
-  /*       COMP instance must not be locked.                                  */
-  if(LL_COMP_IsLocked(COMPx) == 0U)
-  {
-    /* Note: Connection switch is applicable only to COMP instance COMP1,     */
-    /*       therefore is COMP2 is selected the equivalent bit is             */
-    /*       kept unmodified.                                                 */
-    if(COMPx == COMP1)
-    {
-      CLEAR_BIT(COMP->CSR,
-                (  COMP_CSR_COMP1MODE
-                 | COMP_CSR_COMP1INSEL
-                 | COMP_CSR_COMP1SW1
-                 | COMP_CSR_COMP1OUTSEL
-                 | COMP_CSR_COMP1HYST
-                 | COMP_CSR_COMP1POL
-                 | COMP_CSR_COMP1EN
-                ) << __COMP_BITOFFSET_INSTANCE(COMPx)
-               );
-    }
-    else
-    {
-      CLEAR_BIT(COMP->CSR,
-                (  COMP_CSR_COMP1MODE
-                 | COMP_CSR_COMP1INSEL
-                 | COMP_CSR_COMP1OUTSEL
-                 | COMP_CSR_COMP1HYST
-                 | COMP_CSR_COMP1POL
-                 | COMP_CSR_COMP1EN
-                ) << __COMP_BITOFFSET_INSTANCE(COMPx)
-               );
-    }
-    
-  }
-  else
-  {
-    /* Comparator instance is locked: de-initialization by software is         */
-    /* not possible.                                                           */
-    /* The only way to unlock the comparator is a device hardware reset.       */
-    status = ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief  Initialize some features of COMP instance.
-  * @note   This function configures features of the selected COMP instance.
-  *         Some features are also available at scope COMP common instance
-  *         (common to several COMP instances).
-  *         Refer to functions having argument "COMPxy_COMMON" as parameter.
-  * @param  COMPx COMP instance
-  * @param  COMP_InitStruct Pointer to a @ref LL_COMP_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: COMP registers are initialized
-  *          - ERROR: COMP registers are not initialized
-  */
-ErrorStatus LL_COMP_Init(COMP_TypeDef *COMPx, LL_COMP_InitTypeDef *COMP_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_COMP_ALL_INSTANCE(COMPx));
-  assert_param(IS_LL_COMP_POWER_MODE(COMP_InitStruct->PowerMode));
-  assert_param(IS_LL_COMP_INPUT_PLUS(COMPx, COMP_InitStruct->InputPlus));
-  assert_param(IS_LL_COMP_INPUT_MINUS(COMPx, COMP_InitStruct->InputMinus));
-  assert_param(IS_LL_COMP_INPUT_HYSTERESIS(COMP_InitStruct->InputHysteresis));
-  assert_param(IS_LL_COMP_OUTPUT_SELECTION(COMP_InitStruct->OutputSelection));
-  assert_param(IS_LL_COMP_OUTPUT_POLARITY(COMP_InitStruct->OutputPolarity));
-  
-  /* Note: Hardware constraint (refer to description of this function)        */
-  /*       COMP instance must not be locked.                                  */
-  if(LL_COMP_IsLocked(COMPx) == 0U)
-  {
-    /* Configuration of comparator instance :                                 */
-    /*  - PowerMode                                                           */
-    /*  - InputPlus                                                           */
-    /*  - InputMinus                                                          */
-    /*  - InputHysteresis                                                     */
-    /*  - OutputSelection                                                     */
-    /*  - OutputPolarity                                                      */
-    /* Note: Connection switch is applicable only to COMP instance COMP1,     */
-    /*       therefore is COMP2 is selected the equivalent bit is             */
-    /*       kept unmodified.                                                 */
-    if(COMPx == COMP1)
-    {
-      MODIFY_REG(COMP->CSR,
-                 (  COMP_CSR_COMP1MODE
-                  | COMP_CSR_COMP1INSEL
-                  | COMP_CSR_COMP1SW1
-                  | COMP_CSR_COMP1OUTSEL
-                  | COMP_CSR_COMP1HYST
-                  | COMP_CSR_COMP1POL
-                 ) << __COMP_BITOFFSET_INSTANCE(COMPx)
-                ,
-                 (  COMP_InitStruct->PowerMode
-                  | COMP_InitStruct->InputPlus
-                  | COMP_InitStruct->InputMinus
-                  | COMP_InitStruct->InputHysteresis
-                  | COMP_InitStruct->OutputSelection
-                  | COMP_InitStruct->OutputPolarity
-                 ) << __COMP_BITOFFSET_INSTANCE(COMPx)
-                );
-    }
-    else
-    {
-      MODIFY_REG(COMP->CSR,
-                 (  COMP_CSR_COMP1MODE
-                  | COMP_CSR_COMP1INSEL
-                  | COMP_CSR_COMP1OUTSEL
-                  | COMP_CSR_COMP1HYST
-                  | COMP_CSR_COMP1POL
-                 ) << __COMP_BITOFFSET_INSTANCE(COMPx)
-                ,
-                 (  COMP_InitStruct->PowerMode
-                  | COMP_InitStruct->InputPlus
-                  | COMP_InitStruct->InputMinus
-                  | COMP_InitStruct->InputHysteresis
-                  | COMP_InitStruct->OutputSelection
-                  | COMP_InitStruct->OutputPolarity
-                 ) << __COMP_BITOFFSET_INSTANCE(COMPx)
-                );
-    }
-    
-  }
-  else
-  {
-    /* Initialization error: COMP instance is locked.                         */
-    status = ERROR;
-  }
-  
-  return status;
-}
-
-/**
-  * @brief Set each @ref LL_COMP_InitTypeDef field to default value.
-  * @param COMP_InitStruct pointer to a @ref LL_COMP_InitTypeDef structure
-  *                         whose fields will be set to default values.
-  * @retval None
-  */
-void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct)
-{
-  /* Set COMP_InitStruct fields to default values */
-  COMP_InitStruct->PowerMode            = LL_COMP_POWERMODE_ULTRALOWPOWER;
-  COMP_InitStruct->InputPlus            = LL_COMP_INPUT_PLUS_IO1;
-  COMP_InitStruct->InputMinus           = LL_COMP_INPUT_MINUS_VREFINT;
-  COMP_InitStruct->InputHysteresis      = LL_COMP_HYSTERESIS_NONE;
-  COMP_InitStruct->OutputSelection      = LL_COMP_OUTPUT_NONE;
-  COMP_InitStruct->OutputPolarity       = LL_COMP_OUTPUTPOL_NONINVERTED;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* COMP1 || COMP2 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_crc.c b/lib/hal-stm32f0/source/stm32f0xx_ll_crc.c
deleted file mode 100644
index c634603c..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_crc.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_crc.c
-  * @author  MCD Application Team
-  * @brief   CRC LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_crc.h"
-
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (CRC)
-
-/** @addtogroup CRC_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup CRC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup CRC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize CRC registers (Registers restored to their default values).
-  * @param  CRCx CRC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: CRC registers are de-initialized
-  *          - ERROR: CRC registers are not de-initialized
-  */
-ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_CRC_ALL_INSTANCE(CRCx));
-
-  if (CRCx == CRC)
-  {
-#if defined(CRC_PROG_POLYNOMIAL_SUPPORT)
-    /* Set programmable polynomial size in CR register to reset value (32 bits)*/
-    LL_CRC_SetPolynomialSize(CRCx, LL_CRC_POLYLENGTH_32B);
-
-    /* Set programmable polynomial in POL register to reset value */
-    LL_CRC_SetPolynomialCoef(CRCx, LL_CRC_DEFAULT_CRC32_POLY);
-#endif
-
-    /* Set INIT register to reset value */
-    LL_CRC_SetInitialData(CRCx, LL_CRC_DEFAULT_CRC_INITVALUE);
-
-    /* Set Reversibility options on I/O data values in CR register to reset value */
-    LL_CRC_SetInputDataReverseMode(CRCx, LL_CRC_INDATA_REVERSE_NONE);
-    LL_CRC_SetOutputDataReverseMode(CRCx, LL_CRC_OUTDATA_REVERSE_NONE);
-
-    /* Reset the CRC calculation unit */
-    LL_CRC_ResetCRCCalculationUnit(CRCx);
-
-    /* Reset IDR register */
-    LL_CRC_Write_IDR(CRCx, 0x00U);
-  }
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (CRC) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_crs.c b/lib/hal-stm32f0/source/stm32f0xx_ll_crs.c
deleted file mode 100644
index 845f94e4..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_crs.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_crs.h
-  * @author  MCD Application Team
-  * @brief   CRS LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_crs.h"
-#include "stm32f0xx_ll_bus.h"
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined(CRS)
-
-/** @defgroup CRS_LL CRS
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup CRS_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup CRS_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-Initializes CRS peripheral registers to their default reset values.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: CRS registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_CRS_DeInit(void)
-{
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS);
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS);
-
-  return  SUCCESS;
-}
-
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(CRS) */
-
-/**
-  * @}
-  */
-  
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_dac.c b/lib/hal-stm32f0/source/stm32f0xx_ll_dac.c
deleted file mode 100644
index b4596d1c..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_dac.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_dac.c
-  * @author  MCD Application Team
-  * @brief   DAC LL module driver
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_dac.h"
-#include "stm32f0xx_ll_bus.h"
-
-#ifdef USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (DAC1)
-
-/** @addtogroup DAC_LL DAC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-
-/** @addtogroup DAC_LL_Private_Macros
-  * @{
-  */
-
-#if defined(DAC_CHANNEL2_SUPPORT)
-#define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__)                           \
-  (                                                                            \
-      ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1)                                  \
-   || ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_2)                                  \
-  )
-#else
-#define IS_LL_DAC_CHANNEL(__DACX__, __DAC_CHANNEL__)                           \
-  (                                                                            \
-   ((__DAC_CHANNEL__) == LL_DAC_CHANNEL_1)                                     \
-  )
-#endif /* DAC_CHANNEL2_SUPPORT */
-
-#define IS_LL_DAC_TRIGGER_SOURCE(__TRIGGER_SOURCE__)                           \
-  (   ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_SOFTWARE)                           \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM2_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM3_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM4_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM6_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM7_TRGO)                      \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_TIM15_TRGO)                     \
-   || ((__TRIGGER_SOURCE__) == LL_DAC_TRIG_EXT_EXTI_LINE9)                     \
-  )
-
-#if defined(DAC_CR_WAVE1)
-#define IS_LL_DAC_WAVE_AUTO_GENER_MODE(__WAVE_AUTO_GENERATION_MODE__)           \
-  (   ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NONE)     \
-   || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_NOISE)    \
-   || ((__WAVE_AUTO_GENERATION_MODE__) == LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE) \
-  )
-
-#define IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(__WAVE_AUTO_GENERATION_CONFIG__)      \
-  (   ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BIT0)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS1_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS2_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS3_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS4_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS5_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS6_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS7_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS8_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS9_0)  \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS10_0) \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_NOISE_LFSR_UNMASK_BITS11_0) \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1)       \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_3)       \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_7)       \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_15)      \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_31)      \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_63)      \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_127)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_255)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_511)     \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_1023)    \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_2047)    \
-   || ((__WAVE_AUTO_GENERATION_CONFIG__) == LL_DAC_TRIANGLE_AMPLITUDE_4095)    \
-  )
-#endif
-
-#define IS_LL_DAC_OUTPUT_BUFFER(__OUTPUT_BUFFER__)                             \
-  (   ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_ENABLE)                     \
-   || ((__OUTPUT_BUFFER__) == LL_DAC_OUTPUT_BUFFER_DISABLE)                    \
-  )
-
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup DAC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DAC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize registers of the selected DAC instance
-  *         to their default reset values.
-  * @param  DACx DAC instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DAC registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_DAC_DeInit(DAC_TypeDef *DACx)
-{
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(DACx));
-  
-  /* Force reset of DAC clock */
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_DAC1);
-  
-  /* Release reset of DAC clock */
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_DAC1);
-  
-  return SUCCESS;
-}
-
-/**
-  * @brief  Initialize some features of DAC instance.
-  * @note   The setting of these parameters by function @ref LL_DAC_Init()
-  *         is conditioned to DAC state:
-  *         DAC instance must be disabled.
-  * @param  DACx DAC instance
-  * @param  DAC_Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DAC_CHANNEL_1
-  *         @arg @ref LL_DAC_CHANNEL_2 (1)
-  *         
-  *         (1) On this STM32 serie, parameter not available on all devices.
-  *             Refer to device datasheet for channels availability.
-  * @param  DAC_InitStruct Pointer to a @ref LL_DAC_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DAC registers are initialized
-  *          - ERROR: DAC registers are not initialized
-  */
-ErrorStatus LL_DAC_Init(DAC_TypeDef *DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef *DAC_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  
-  /* Check the parameters */
-  assert_param(IS_DAC_ALL_INSTANCE(DACx));
-  assert_param(IS_LL_DAC_CHANNEL(DACx, DAC_Channel));
-  assert_param(IS_LL_DAC_TRIGGER_SOURCE(DAC_InitStruct->TriggerSource));
-  assert_param(IS_LL_DAC_OUTPUT_BUFFER(DAC_InitStruct->OutputBuffer));
-#if defined(DAC_CR_WAVE1)
-  assert_param(IS_LL_DAC_WAVE_AUTO_GENER_MODE(DAC_InitStruct->WaveAutoGeneration));
-  if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
-  {
-    assert_param(IS_LL_DAC_WAVE_AUTO_GENER_CONFIG(DAC_InitStruct->WaveAutoGenerationConfig));
-  }
-#endif
-  
-  /* Note: Hardware constraint (refer to description of this function)        */
-  /*       DAC instance must be disabled.                                     */
-  if(LL_DAC_IsEnabled(DACx, DAC_Channel) == 0U)
-  {
-    /* Configuration of DAC channel:                                          */
-    /*  - TriggerSource                                                       */
-#if defined(DAC_CR_WAVE1)
-    /*  - WaveAutoGeneration                                                  */
-#endif
-    /*  - OutputBuffer                                                        */
-#if defined(DAC_CR_WAVE1)
-    if (DAC_InitStruct->WaveAutoGeneration != LL_DAC_WAVE_AUTO_GENERATION_NONE)
-    {
-      MODIFY_REG(DACx->CR,
-                 (  DAC_CR_TSEL1
-                  | DAC_CR_WAVE1
-                  | DAC_CR_MAMP1
-                  | DAC_CR_BOFF1
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                ,
-                 (  DAC_InitStruct->TriggerSource
-                  | DAC_InitStruct->WaveAutoGeneration
-                  | DAC_InitStruct->WaveAutoGenerationConfig
-                  | DAC_InitStruct->OutputBuffer
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                );
-    }
-    else
-    {
-      MODIFY_REG(DACx->CR,
-                 (  DAC_CR_TSEL1
-                  | DAC_CR_WAVE1
-                  | DAC_CR_BOFF1
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                ,
-                 (  DAC_InitStruct->TriggerSource
-                  | LL_DAC_WAVE_AUTO_GENERATION_NONE
-                  | DAC_InitStruct->OutputBuffer
-                 ) << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
-                );
-    }
-#endif
-  }
-  else
-  {
-    /* Initialization error: DAC instance is not disabled.                    */
-    status = ERROR;
-  }
-  return status;
-}
-
-/**
-  * @brief Set each @ref LL_DAC_InitTypeDef field to default value.
-  * @param DAC_InitStruct pointer to a @ref LL_DAC_InitTypeDef structure
-  *                       whose fields will be set to default values.
-  * @retval None
-  */
-void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct)
-{
-  /* Set DAC_InitStruct fields to default values */
-  DAC_InitStruct->TriggerSource            = LL_DAC_TRIG_SOFTWARE;
-#if defined(DAC_CR_WAVE1)
-  DAC_InitStruct->WaveAutoGeneration       = LL_DAC_WAVE_AUTO_GENERATION_NONE;
-  /* Note: Parameter discarded if wave auto generation is disabled,           */
-  /*       set anyway to its default value.                                   */
-  DAC_InitStruct->WaveAutoGenerationConfig = LL_DAC_NOISE_LFSR_UNMASK_BIT0;
-#endif
-  DAC_InitStruct->OutputBuffer             = LL_DAC_OUTPUT_BUFFER_ENABLE;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* DAC1 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_dma.c b/lib/hal-stm32f0/source/stm32f0xx_ll_dma.c
deleted file mode 100644
index ac2a89c3..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_dma.c
+++ /dev/null
@@ -1,412 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_dma.c
-  * @author  MCD Application Team
-  * @brief   DMA LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_dma.h"
-#include "stm32f0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (DMA1) || defined (DMA2)
-
-/** @defgroup DMA_LL DMA
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup DMA_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_DMA_DIRECTION(__VALUE__)          (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY) || \
-                                                 ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) || \
-                                                 ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY))
-
-#define IS_LL_DMA_MODE(__VALUE__)               (((__VALUE__) == LL_DMA_MODE_NORMAL) || \
-                                                 ((__VALUE__) == LL_DMA_MODE_CIRCULAR))
-
-#define IS_LL_DMA_PERIPHINCMODE(__VALUE__)      (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) || \
-                                                 ((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT))
-
-#define IS_LL_DMA_MEMORYINCMODE(__VALUE__)      (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) || \
-                                                 ((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT))
-
-#define IS_LL_DMA_PERIPHDATASIZE(__VALUE__)     (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE)      || \
-                                                 ((__VALUE__) == LL_DMA_PDATAALIGN_HALFWORD)  || \
-                                                 ((__VALUE__) == LL_DMA_PDATAALIGN_WORD))
-
-#define IS_LL_DMA_MEMORYDATASIZE(__VALUE__)     (((__VALUE__) == LL_DMA_MDATAALIGN_BYTE)      || \
-                                                 ((__VALUE__) == LL_DMA_MDATAALIGN_HALFWORD)  || \
-                                                 ((__VALUE__) == LL_DMA_MDATAALIGN_WORD))
-
-#define IS_LL_DMA_NBDATA(__VALUE__)             ((__VALUE__)  <= 0x0000FFFFU)
-
-#if (defined(DMA1_CSELR_DEFAULT)||defined(DMA2_CSELR_DEFAULT))
-#define IS_LL_DMA_PERIPHREQUEST(__VALUE__)      (((__VALUE__) == LL_DMA_REQUEST_0)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_1)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_2)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_3)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_4)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_5)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_6)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_7)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_8)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_9)  || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_10) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_11) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_12) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_13) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_14) || \
-                                                 ((__VALUE__) == LL_DMA_REQUEST_15))
-#endif
-
-#define IS_LL_DMA_PRIORITY(__VALUE__)           (((__VALUE__) == LL_DMA_PRIORITY_LOW)    || \
-                                                 ((__VALUE__) == LL_DMA_PRIORITY_MEDIUM) || \
-                                                 ((__VALUE__) == LL_DMA_PRIORITY_HIGH)   || \
-                                                 ((__VALUE__) == LL_DMA_PRIORITY_VERYHIGH))
-
-#if defined (DMA2)
-#if defined (DMA2_Channel6) && defined (DMA2_Channel7)
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                         (((CHANNEL) == LL_DMA_CHANNEL_1) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_5) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_6) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_7))) || \
-                                                         (((INSTANCE) == DMA2) && \
-                                                         (((CHANNEL) == LL_DMA_CHANNEL_1) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_5) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_6) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_7))))
-#else
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                         (((CHANNEL) == LL_DMA_CHANNEL_1) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_5) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_6) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_7))) || \
-                                                         (((INSTANCE) == DMA2) && \
-                                                         (((CHANNEL) == LL_DMA_CHANNEL_1) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                          ((CHANNEL) == LL_DMA_CHANNEL_5))))
-#endif
-#else
-#if defined(DMA1_Channel6) && defined(DMA1_Channel7)
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                            (((CHANNEL) == LL_DMA_CHANNEL_1)|| \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_5) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_6) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_7))))
-#elif defined (DMA1_Channel6)
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                            (((CHANNEL) == LL_DMA_CHANNEL_1)|| \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_5) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_6))))
-#else
-#define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL)  ((((INSTANCE) == DMA1) && \
-                                                            (((CHANNEL) == LL_DMA_CHANNEL_1)|| \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_2) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_3) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_4) || \
-                                                            ((CHANNEL) == LL_DMA_CHANNEL_5))))
-#endif /* DMA1_Channel6 && DMA1_Channel7 */
-#endif
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup DMA_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup DMA_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the DMA registers to their default reset values.
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6 (*)
-  *         @arg @ref LL_DMA_CHANNEL_7 (*)
-  *
-  *         (*) value not defined in all devices
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DMA registers are de-initialized
-  *          - ERROR: DMA registers are not de-initialized
-  */
-uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel)
-{
-  DMA_Channel_TypeDef *tmp = (DMA_Channel_TypeDef *)DMA1_Channel1;
-  ErrorStatus status = SUCCESS;
-
-  /* Check the DMA Instance DMAx and Channel parameters*/
-  assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel));
-
-    tmp = (DMA_Channel_TypeDef *)(__LL_DMA_GET_CHANNEL_INSTANCE(DMAx, Channel));
-
-    /* Disable the selected DMAx_Channely */
-    CLEAR_BIT(tmp->CCR, DMA_CCR_EN);
-
-    /* Reset DMAx_Channely control register */
-    LL_DMA_WriteReg(tmp, CCR, 0U);
-
-    /* Reset DMAx_Channely remaining bytes register */
-    LL_DMA_WriteReg(tmp, CNDTR, 0U);
-
-    /* Reset DMAx_Channely peripheral address register */
-    LL_DMA_WriteReg(tmp, CPAR, 0U);
-
-    /* Reset DMAx_Channely memory address register */
-    LL_DMA_WriteReg(tmp, CMAR, 0U);
-
-#if (defined(DMA1_CSELR_DEFAULT)||defined(DMA2_CSELR_DEFAULT))
-    /* Reset Request register field for DMAx Channel */
-    LL_DMA_SetPeriphRequest(DMAx, Channel, LL_DMA_REQUEST_0);
-#endif
-
-    if (Channel == LL_DMA_CHANNEL_1)
-    {
-      /* Reset interrupt pending bits for DMAx Channel1 */
-      LL_DMA_ClearFlag_GI1(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_2)
-    {
-      /* Reset interrupt pending bits for DMAx Channel2 */
-      LL_DMA_ClearFlag_GI2(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_3)
-    {
-      /* Reset interrupt pending bits for DMAx Channel3 */
-      LL_DMA_ClearFlag_GI3(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_4)
-    {
-      /* Reset interrupt pending bits for DMAx Channel4 */
-      LL_DMA_ClearFlag_GI4(DMAx);
-    }
-    else if (Channel == LL_DMA_CHANNEL_5)
-    {
-      /* Reset interrupt pending bits for DMAx Channel5 */
-      LL_DMA_ClearFlag_GI5(DMAx);
-    }
-
-#if defined(DMA1_Channel6)
-    else if (Channel == LL_DMA_CHANNEL_6)
-    {
-      /* Reset interrupt pending bits for DMAx Channel6 */
-      LL_DMA_ClearFlag_GI6(DMAx);
-    }
-#endif
-#if defined(DMA1_Channel7)
-    else if (Channel == LL_DMA_CHANNEL_7)
-    {
-      /* Reset interrupt pending bits for DMAx Channel7 */
-      LL_DMA_ClearFlag_GI7(DMAx);
-    }
-#endif
-    else
-    {
-      status = ERROR;
-    }
-
-  return status;
-}
-
-/**
-  * @brief  Initialize the DMA registers according to the specified parameters in DMA_InitStruct.
-  * @note   To convert DMAx_Channely Instance to DMAx Instance and Channely, use helper macros :
-  *         @arg @ref __LL_DMA_GET_INSTANCE
-  *         @arg @ref __LL_DMA_GET_CHANNEL
-  * @param  DMAx DMAx Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_DMA_CHANNEL_1
-  *         @arg @ref LL_DMA_CHANNEL_2
-  *         @arg @ref LL_DMA_CHANNEL_3
-  *         @arg @ref LL_DMA_CHANNEL_4
-  *         @arg @ref LL_DMA_CHANNEL_5
-  *         @arg @ref LL_DMA_CHANNEL_6 (*)
-  *         @arg @ref LL_DMA_CHANNEL_7 (*)
-  *
-  *         (*) value not defined in all devices
-  * @param  DMA_InitStruct pointer to a @ref LL_DMA_InitTypeDef structure.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: DMA registers are initialized
-  *          - ERROR: Not applicable
-  */
-uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct)
-{
-  /* Check the DMA Instance DMAx and Channel parameters*/
-  assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel));
-
-  /* Check the DMA parameters from DMA_InitStruct */
-  assert_param(IS_LL_DMA_DIRECTION(DMA_InitStruct->Direction));
-  assert_param(IS_LL_DMA_MODE(DMA_InitStruct->Mode));
-  assert_param(IS_LL_DMA_PERIPHINCMODE(DMA_InitStruct->PeriphOrM2MSrcIncMode));
-  assert_param(IS_LL_DMA_MEMORYINCMODE(DMA_InitStruct->MemoryOrM2MDstIncMode));
-  assert_param(IS_LL_DMA_PERIPHDATASIZE(DMA_InitStruct->PeriphOrM2MSrcDataSize));
-  assert_param(IS_LL_DMA_MEMORYDATASIZE(DMA_InitStruct->MemoryOrM2MDstDataSize));
-  assert_param(IS_LL_DMA_NBDATA(DMA_InitStruct->NbData));
-#if (defined(DMA1_CSELR_DEFAULT)||defined(DMA2_CSELR_DEFAULT))
-  assert_param(IS_LL_DMA_PERIPHREQUEST(DMA_InitStruct->PeriphRequest));
-#endif
-  assert_param(IS_LL_DMA_PRIORITY(DMA_InitStruct->Priority));
-
-  /*---------------------------- DMAx CCR Configuration ------------------------
-   * Configure DMAx_Channely: data transfer direction, data transfer mode,
-   *                          peripheral and memory increment mode,
-   *                          data size alignment and  priority level with parameters :
-   * - Direction:      DMA_CCR_DIR and DMA_CCR_MEM2MEM bits
-   * - Mode:           DMA_CCR_CIRC bit
-   * - PeriphOrM2MSrcIncMode:  DMA_CCR_PINC bit
-   * - MemoryOrM2MDstIncMode:  DMA_CCR_MINC bit
-   * - PeriphOrM2MSrcDataSize: DMA_CCR_PSIZE[1:0] bits
-   * - MemoryOrM2MDstDataSize: DMA_CCR_MSIZE[1:0] bits
-   * - Priority:               DMA_CCR_PL[1:0] bits
-   */
-  LL_DMA_ConfigTransfer(DMAx, Channel, DMA_InitStruct->Direction              | \
-                        DMA_InitStruct->Mode                   | \
-                        DMA_InitStruct->PeriphOrM2MSrcIncMode  | \
-                        DMA_InitStruct->MemoryOrM2MDstIncMode  | \
-                        DMA_InitStruct->PeriphOrM2MSrcDataSize | \
-                        DMA_InitStruct->MemoryOrM2MDstDataSize | \
-                        DMA_InitStruct->Priority);
-
-  /*-------------------------- DMAx CMAR Configuration -------------------------
-   * Configure the memory or destination base address with parameter :
-   * - MemoryOrM2MDstAddress: DMA_CMAR_MA[31:0] bits
-   */
-  LL_DMA_SetMemoryAddress(DMAx, Channel, DMA_InitStruct->MemoryOrM2MDstAddress);
-
-  /*-------------------------- DMAx CPAR Configuration -------------------------
-   * Configure the peripheral or source base address with parameter :
-   * - PeriphOrM2MSrcAddress: DMA_CPAR_PA[31:0] bits
-   */
-  LL_DMA_SetPeriphAddress(DMAx, Channel, DMA_InitStruct->PeriphOrM2MSrcAddress);
-
-  /*--------------------------- DMAx CNDTR Configuration -----------------------
-   * Configure the peripheral base address with parameter :
-   * - NbData: DMA_CNDTR_NDT[15:0] bits
-   */
-  LL_DMA_SetDataLength(DMAx, Channel, DMA_InitStruct->NbData);
-
-#if (defined(DMA1_CSELR_DEFAULT)||defined(DMA2_CSELR_DEFAULT))
-  /*--------------------------- DMAx CSELR Configuration -----------------------
-   * Configure the DMA request for DMA instance on Channel x with parameter :
-   * - PeriphRequest: DMA_CSELR[31:0] bits
-   */
-  LL_DMA_SetPeriphRequest(DMAx, Channel, DMA_InitStruct->PeriphRequest);
-#endif
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set each @ref LL_DMA_InitTypeDef field to default value.
-  * @param  DMA_InitStruct Pointer to a @ref LL_DMA_InitTypeDef structure.
-  * @retval None
-  */
-void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct)
-{
-  /* Set DMA_InitStruct fields to default values */
-  DMA_InitStruct->PeriphOrM2MSrcAddress  = 0x00000000U;
-  DMA_InitStruct->MemoryOrM2MDstAddress  = 0x00000000U;
-  DMA_InitStruct->Direction              = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
-  DMA_InitStruct->Mode                   = LL_DMA_MODE_NORMAL;
-  DMA_InitStruct->PeriphOrM2MSrcIncMode  = LL_DMA_PERIPH_NOINCREMENT;
-  DMA_InitStruct->MemoryOrM2MDstIncMode  = LL_DMA_MEMORY_NOINCREMENT;
-  DMA_InitStruct->PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
-  DMA_InitStruct->MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
-  DMA_InitStruct->NbData                 = 0x00000000U;
-#if (defined(DMA1_CSELR_DEFAULT)||defined(DMA2_CSELR_DEFAULT))
-  DMA_InitStruct->PeriphRequest          = LL_DMA_REQUEST_0;
-#endif
-  DMA_InitStruct->Priority               = LL_DMA_PRIORITY_LOW;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* DMA1 || DMA2 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_exti.c b/lib/hal-stm32f0/source/stm32f0xx_ll_exti.c
deleted file mode 100644
index d9e42531..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_exti.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_exti.c
-  * @author  MCD Application Team
-  * @brief   EXTI LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_exti.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (EXTI)
-
-/** @defgroup EXTI_LL EXTI
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup EXTI_LL_Private_Macros
-  * @{
-  */
-
-#define IS_LL_EXTI_LINE_0_31(__VALUE__)              (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U)
-
-#define IS_LL_EXTI_MODE(__VALUE__)                   (((__VALUE__) == LL_EXTI_MODE_IT)            \
-                                                   || ((__VALUE__) == LL_EXTI_MODE_EVENT)         \
-                                                   || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT))
-
-
-#define IS_LL_EXTI_TRIGGER(__VALUE__)                (((__VALUE__) == LL_EXTI_TRIGGER_NONE)       \
-                                                   || ((__VALUE__) == LL_EXTI_TRIGGER_RISING)     \
-                                                   || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING)    \
-                                                   || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING))
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup EXTI_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup EXTI_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the EXTI registers to their default reset values.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: EXTI registers are de-initialized
-  *          - ERROR: not applicable
-  */
-uint32_t LL_EXTI_DeInit(void)
-{
-  /* Interrupt mask register set to default reset values */
-#if defined(STM32F030x6) || defined(STM32F031x6) ||defined(STM32F038xx)
-  LL_EXTI_WriteReg(IMR,   0x0FF40000U);
-#elif defined(STM32F070x6) || defined(STM32F042x6) || defined(STM32F048xx)
-  LL_EXTI_WriteReg(IMR,   0x7FF40000U);
-#elif defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx)
-  LL_EXTI_WriteReg(IMR,   0x0F940000U);
-#else
-  LL_EXTI_WriteReg(IMR,   0x7F840000U);
-#endif
-  /* Event mask register set to default reset values */
-  LL_EXTI_WriteReg(EMR,   0x00000000U);
-  /* Rising Trigger selection register set to default reset values */
-  LL_EXTI_WriteReg(RTSR,  0x00000000U);
-  /* Falling Trigger selection register set to default reset values */
-  LL_EXTI_WriteReg(FTSR,  0x00000000U);
-  /* Software interrupt event register set to default reset values */
-  LL_EXTI_WriteReg(SWIER, 0x00000000U);
-  /* Pending register clear */
-  LL_EXTI_WriteReg(PR,    0x007BFFFFU);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct.
-  * @param  EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: EXTI registers are initialized
-  *          - ERROR: not applicable
-  */
-uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  /* Check the parameters */
-  assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31));
-  assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand));
-  assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode));
-
-  /* ENABLE LineCommand */
-  if (EXTI_InitStruct->LineCommand != DISABLE)
-  {
-    assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger));
-
-    /* Configure EXTI Lines in range from 0 to 31 */
-    if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE)
-    {
-      switch (EXTI_InitStruct->Mode)
-      {
-        case LL_EXTI_MODE_IT:
-          /* First Disable Event on provided Lines */
-          LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
-          /* Then Enable IT on provided Lines */
-          LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
-          break;
-        case LL_EXTI_MODE_EVENT:
-          /* First Disable IT on provided Lines */
-          LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
-          /* Then Enable Event on provided Lines */
-          LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
-          break;
-        case LL_EXTI_MODE_IT_EVENT:
-          /* Directly Enable IT & Event on provided Lines */
-          LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
-          LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
-          break;
-        default:
-          status = ERROR;
-          break;
-      }
-      if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
-      {
-        switch (EXTI_InitStruct->Trigger)
-        {
-          case LL_EXTI_TRIGGER_RISING:
-            /* First Disable Falling Trigger on provided Lines */
-            LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            /* Then Enable Rising Trigger on provided Lines */
-            LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            break;
-          case LL_EXTI_TRIGGER_FALLING:
-            /* First Disable Rising Trigger on provided Lines */
-            LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            /* Then Enable Falling Trigger on provided Lines */
-            LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            break;
-          case LL_EXTI_TRIGGER_RISING_FALLING:
-            LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
-            break;
-          default:
-            status = ERROR;
-            break;
-        }
-      }
-    }
-  }
-  /* DISABLE LineCommand */
-  else
-  {
-    /* De-configure EXTI Lines in range from 0 to 31 */
-    LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
-    LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_EXTI_InitTypeDef field to default value.
-  * @param  EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure.
-  * @retval None
-  */
-void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct)
-{
-  EXTI_InitStruct->Line_0_31      = LL_EXTI_LINE_NONE;
-  EXTI_InitStruct->LineCommand    = DISABLE;
-  EXTI_InitStruct->Mode           = LL_EXTI_MODE_IT;
-  EXTI_InitStruct->Trigger        = LL_EXTI_TRIGGER_FALLING;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (EXTI) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_gpio.c b/lib/hal-stm32f0/source/stm32f0xx_ll_gpio.c
deleted file mode 100644
index 3fae50cc..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_gpio.c
+++ /dev/null
@@ -1,279 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_gpio.c
-  * @author  MCD Application Team
-  * @brief   GPIO LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_gpio.h"
-#include "stm32f0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF)
-
-/** @addtogroup GPIO_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup GPIO_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_GPIO_PIN(__VALUE__)          (((0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
-
-#define IS_LL_GPIO_MODE(__VALUE__)         (((__VALUE__) == LL_GPIO_MODE_INPUT)     ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_OUTPUT)    ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\
-                                            ((__VALUE__) == LL_GPIO_MODE_ANALOG))
-
-#define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__)  (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL)  ||\
-                                            ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
-
-#define IS_LL_GPIO_SPEED(__VALUE__)        (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW)       ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM)    ||\
-                                            ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH))
-
-#define IS_LL_GPIO_PULL(__VALUE__)         (((__VALUE__) == LL_GPIO_PULL_NO)   ||\
-                                            ((__VALUE__) == LL_GPIO_PULL_UP)   ||\
-                                            ((__VALUE__) == LL_GPIO_PULL_DOWN))
-
-#define IS_LL_GPIO_ALTERNATE(__VALUE__)    (((__VALUE__) == LL_GPIO_AF_0  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_1  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_2  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_3  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_4  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_5  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_6  )   ||\
-                                            ((__VALUE__) == LL_GPIO_AF_7 ))
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup GPIO_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup GPIO_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize GPIO registers (Registers restored to their default values).
-  * @param  GPIOx GPIO Port
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: GPIO registers are de-initialized
-  *          - ERROR:   Wrong GPIO Port
-  */
-ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-
-  /* Force and Release reset on clock of GPIOx Port */
-  if (GPIOx == GPIOA)
-  {
-    LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOA);
-    LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOA);
-  }
-  else if (GPIOx == GPIOB)
-  {
-    LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOB);
-    LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOB);
-  }
-  else if (GPIOx == GPIOC)
-  {
-    LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOC);
-    LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOC);
-  }
-#if defined(GPIOD)
-  else if (GPIOx == GPIOD)
-  {
-    LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD);
-    LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD);
-  }
-#endif /* GPIOD */
-#if defined(GPIOE)
-  else if (GPIOx == GPIOE)
-  {
-    LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOE);
-    LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOE);
-  }
-#endif /* GPIOE */
-#if defined(GPIOF)
-  else if (GPIOx == GPIOF)
-  {
-    LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOF);
-    LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOF);
-  }
-#endif /* GPIOF */
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @brief  Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
-  * @param  GPIOx GPIO Port
-  * @param  GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
-  *         that contains the configuration information for the specified GPIO peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
-  *          - ERROR:   Not applicable
-  */
-ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
-{
-  uint32_t pinpos     = 0x00000000U;
-  uint32_t currentpin = 0x00000000U;
-
-  /* Check the parameters */
-  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
-  assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
-  assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
-  assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
-
-  /* ------------------------- Configure the port pins ---------------- */
-  /* Initialize  pinpos on first pin set */
-  /* pinpos = 0; useless as already done in default initialization */
-
-  /* Configure the port pins */
-  while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
-  {
-    /* Get current io position */
-    currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos);
-
-    if (currentpin)
-    {
-      /* Pin Mode configuration */
-      LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
-
-      if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
-      {
-        /* Check Speed mode parameters */
-        assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
-
-        /* Speed mode configuration */
-        LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
-      }
-
-      /* Pull-up Pull down resistor configuration*/
-      LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
-
-      if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
-      {
-        /* Check Alternate parameter */
-        assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
-
-        /* Speed mode configuration */
-        if (currentpin < LL_GPIO_PIN_8)
-        {
-          LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
-        }
-        else
-        {
-          LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
-        }
-      }
-    }
-    pinpos++;
-  }
-
-  if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
-  {
-    /* Check Output mode parameters */
-    assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
-
-    /* Output mode configuration*/
-    LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
-
-  }
-  return (SUCCESS);
-}
-
-/**
-  * @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
-  * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure
-  *                          whose fields will be set to default values.
-  * @retval None
-  */
-
-void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
-{
-  /* Reset GPIO init structure parameters values */
-  GPIO_InitStruct->Pin        = LL_GPIO_PIN_ALL;
-  GPIO_InitStruct->Mode       = LL_GPIO_MODE_ANALOG;
-  GPIO_InitStruct->Speed      = LL_GPIO_SPEED_FREQ_LOW;
-  GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-  GPIO_InitStruct->Pull       = LL_GPIO_PULL_NO;
-  GPIO_InitStruct->Alternate  = LL_GPIO_AF_0;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_i2c.c b/lib/hal-stm32f0/source/stm32f0xx_ll_i2c.c
deleted file mode 100644
index 5d886404..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_i2c.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_i2c.c
-  * @author  MCD Application Team
-  * @brief   I2C LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_i2c.h"
-#include "stm32f0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (I2C1) || defined (I2C2)
-
-/** @defgroup I2C_LL I2C
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup I2C_LL_Private_Macros
-  * @{
-  */
-
-#define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__)    (((__VALUE__) == LL_I2C_MODE_I2C)          || \
-                                                 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST)   || \
-                                                 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
-                                                 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
-
-#define IS_LL_I2C_ANALOG_FILTER(__VALUE__)      (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
-                                                 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
-
-#define IS_LL_I2C_DIGITAL_FILTER(__VALUE__)     ((__VALUE__) <= 0x0000000FU)
-
-#define IS_LL_I2C_OWN_ADDRESS1(__VALUE__)       ((__VALUE__) <= 0x000003FFU)
-
-#define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__)   (((__VALUE__) == LL_I2C_ACK) || \
-                                                 ((__VALUE__) == LL_I2C_NACK))
-
-#define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__)       (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
-                                                 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup I2C_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup I2C_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the I2C registers to their default reset values.
-  * @param  I2Cx I2C Instance.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: I2C registers are de-initialized
-  *          - ERROR: I2C registers are not de-initialized
-  */
-uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the I2C Instance I2Cx */
-  assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
-
-  if (I2Cx == I2C1)
-  {
-    /* Force reset of I2C clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
-
-    /* Release reset of I2C clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
-  }
-#if defined(I2C2)
-  else if (I2Cx == I2C2)
-  {
-    /* Force reset of I2C clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
-
-    /* Release reset of I2C clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
-
-  }
-#endif
-  else
-  {
-    status = ERROR;
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
-  * @param  I2Cx I2C Instance.
-  * @param  I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: I2C registers are initialized
-  *          - ERROR: Not applicable
-  */
-uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
-{
-  /* Check the I2C Instance I2Cx */
-  assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
-
-  /* Check the I2C parameters from I2C_InitStruct */
-  assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
-  assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
-  assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
-  assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
-  assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
-  assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
-
-  /* Disable the selected I2Cx Peripheral */
-  LL_I2C_Disable(I2Cx);
-
-  /*---------------------------- I2Cx CR1 Configuration ------------------------
-   * Configure the analog and digital noise filters with parameters :
-   * - AnalogFilter: I2C_CR1_ANFOFF bit
-   * - DigitalFilter: I2C_CR1_DNF[3:0] bits
-   */
-  LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
-
-  /*---------------------------- I2Cx TIMINGR Configuration --------------------
-   * Configure the SDA setup, hold time and the SCL high, low period with parameter :
-   * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
-   *           I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
-   */
-  LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
-
-  /* Enable the selected I2Cx Peripheral */
-  LL_I2C_Enable(I2Cx);
-
-  /*---------------------------- I2Cx OAR1 Configuration -----------------------
-   * Disable, Configure and Enable I2Cx device own address 1 with parameters :
-   * - OwnAddress1:  I2C_OAR1_OA1[9:0] bits
-   * - OwnAddrSize:  I2C_OAR1_OA1MODE bit
-   */
-  LL_I2C_DisableOwnAddress1(I2Cx);
-  LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
-
-  /* OwnAdress1 == 0 is reserved for General Call address */
-  if (I2C_InitStruct->OwnAddress1 != 0U)
-  {
-    LL_I2C_EnableOwnAddress1(I2Cx);
-  }
-
-  /*---------------------------- I2Cx MODE Configuration -----------------------
-  * Configure I2Cx peripheral mode with parameter :
-   * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
-   */
-  LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
-
-  /*---------------------------- I2Cx CR2 Configuration ------------------------
-   * Configure the ACKnowledge or Non ACKnowledge condition
-   * after the address receive match code or next received byte with parameter :
-   * - TypeAcknowledge: I2C_CR2_NACK bit
-   */
-  LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set each @ref LL_I2C_InitTypeDef field to default value.
-  * @param  I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
-  * @retval None
-  */
-void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
-{
-  /* Set I2C_InitStruct fields to default values */
-  I2C_InitStruct->PeripheralMode  = LL_I2C_MODE_I2C;
-  I2C_InitStruct->Timing          = 0U;
-  I2C_InitStruct->AnalogFilter    = LL_I2C_ANALOGFILTER_ENABLE;
-  I2C_InitStruct->DigitalFilter   = 0U;
-  I2C_InitStruct->OwnAddress1     = 0U;
-  I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
-  I2C_InitStruct->OwnAddrSize     = LL_I2C_OWNADDRESS1_7BIT;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* I2C1 || I2C2 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_pwr.c b/lib/hal-stm32f0/source/stm32f0xx_ll_pwr.c
deleted file mode 100644
index b4bf6650..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_pwr.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_pwr.c
-  * @author  MCD Application Team
-  * @brief   PWR LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_pwr.h"
-#include "stm32f0xx_ll_bus.h"
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined(PWR)
-
-/** @defgroup PWR_LL PWR
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup PWR_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup PWR_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the PWR registers to their default reset values.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: PWR registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_PWR_DeInit(void)
-{
-  /* Force reset of PWR clock */
-  LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR);
-
-  /* Release reset of PWR clock */
-  LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR);
-
-  return SUCCESS;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* defined(PWR) */
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_rcc.c b/lib/hal-stm32f0/source/stm32f0xx_ll_rcc.c
deleted file mode 100644
index 6a244fdd..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_rcc.c
+++ /dev/null
@@ -1,599 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_rcc.c
-  * @author  MCD Application Team
-  * @brief   RCC LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_rcc.h"
-#ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RCC)
-
-/** @defgroup RCC_LL RCC
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup RCC_LL_Private_Macros
-  * @{
-  */
-#if defined(RCC_CFGR3_USART2SW) && defined(RCC_CFGR3_USART3SW)
-#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__)  (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
-                                            || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE) \
-                                            || ((__VALUE__) == LL_RCC_USART3_CLKSOURCE))
-#elif defined(RCC_CFGR3_USART2SW) && !defined(RCC_CFGR3_USART3SW)
-#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__)  (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
-                                            || ((__VALUE__) == LL_RCC_USART2_CLKSOURCE))
-#elif defined(RCC_CFGR3_USART3SW) && !defined(RCC_CFGR3_USART2SW)
-#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__)  (((__VALUE__) == LL_RCC_USART1_CLKSOURCE) \
-                                            || ((__VALUE__) == LL_RCC_USART3_CLKSOURCE))
-#else
-#define IS_LL_RCC_USART_CLKSOURCE(__VALUE__)  (((__VALUE__) == LL_RCC_USART1_CLKSOURCE))
-#endif /* RCC_CFGR3_USART2SW && RCC_CFGR3_USART3SW */
-
-#define IS_LL_RCC_I2C_CLKSOURCE(__VALUE__)     ((__VALUE__) == LL_RCC_I2C1_CLKSOURCE)
-
-#if defined(USB)
-#define IS_LL_RCC_USB_CLKSOURCE(__VALUE__)    (((__VALUE__) == LL_RCC_USB_CLKSOURCE))
-#endif /* USB */
-
-#if defined(CEC)
-#define IS_LL_RCC_CEC_CLKSOURCE(__VALUE__)    (((__VALUE__) == LL_RCC_CEC_CLKSOURCE))
-#endif /* CEC */
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup RCC_LL_Private_Functions RCC Private functions
-  * @{
-  */
-uint32_t RCC_GetSystemClockFreq(void);
-uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
-uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
-uint32_t RCC_PLL_GetFreqDomain_SYS(void);
-/**
-  * @}
-  */
-
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RCC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RCC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  Reset the RCC clock configuration to the default reset state.
-  * @note   The default reset state of the clock configuration is given below:
-  *         - HSI ON and used as system clock source
-  *         - HSE and PLL OFF
-  *         - AHB and APB1 prescaler set to 1.
-  *         - CSS, MCO OFF
-  *         - All interrupts disabled
-  * @note   This function doesn't modify the configuration of the
-  *         - Peripheral clocks
-  *         - LSI, LSE and RTC clocks
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RCC registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_RCC_DeInit(void)
-{
-  uint32_t vl_mask = 0U;
-
-  /* Set HSION bit */
-  LL_RCC_HSI_Enable();
-
-  /* Set HSITRIM bits to the reset value*/
-  LL_RCC_HSI_SetCalibTrimming(0x10U);
-
-  /* Reset SW, HPRE, PPRE and MCOSEL bits */
-  vl_mask = 0xFFFFFFFFU;
-  CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCOSEL));
-  LL_RCC_WriteReg(CFGR, vl_mask);
-
-  /* Reset HSEON, CSSON, PLLON bits */
-  vl_mask = 0xFFFFFFFFU;
-  CLEAR_BIT(vl_mask, (RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON));
-  LL_RCC_WriteReg(CR, vl_mask);
-
-  /* Reset HSEBYP bit */
-  LL_RCC_HSE_DisableBypass();
-
-  /* Reset CFGR register */
-  LL_RCC_WriteReg(CFGR, 0x00000000U);
-
-#if defined(RCC_HSI48_SUPPORT)
-  /* Reset CR2 register */
-  LL_RCC_WriteReg(CR2, 0x00000000U);
-
-  /* Disable HSI48 */
-  LL_RCC_HSI48_Disable();
-
-#endif /*RCC_HSI48_SUPPORT*/
-  /* Set HSI14TRIM/HSI14ON/HSI14DIS bits to the reset value*/
-  LL_RCC_HSI14_SetCalibTrimming(0x10U);
-  LL_RCC_HSI14_Disable();
-  LL_RCC_HSI14_EnableADCControl();
-
-  /* Reset CFGR2 register */
-  LL_RCC_WriteReg(CFGR2, 0x00000000U);
-
-  /* Reset CFGR3 register */
-  LL_RCC_WriteReg(CFGR3, 0x00000000U);
-
-  /* Clear pending flags */
-#if defined(RCC_HSI48_SUPPORT)
-  vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_HSI14RDYC | LL_RCC_CIR_HSI48RDYC | LL_RCC_CIR_CSSC);
-#else
-  vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_HSI14RDYC | LL_RCC_CIR_CSSC);
-#endif /* RCC_HSI48_SUPPORT */
-  SET_BIT(RCC->CIR, vl_mask);
-
-  /* Disable all interrupts */
-  LL_RCC_WriteReg(CIR, 0x00000000U);
-
-  return SUCCESS;
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup RCC_LL_EF_Get_Freq
-  * @brief  Return the frequencies of different on chip clocks;  System, AHB and APB1 buses clocks
-  *         and different peripheral clocks available on the device.
-  * @note   If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
-  * @note   If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
-  * @note   If SYSCLK source is PLL, function returns values based on 
-  *         HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
-  * @note   (**) HSI_VALUE is a defined constant but the real value may vary 
-  *              depending on the variations in voltage and temperature.
-  * @note   (***) HSE_VALUE is a defined constant, user has to ensure that
-  *               HSE_VALUE is same as the real frequency of the crystal used.
-  *               Otherwise, this function may have wrong result.
-  * @note   The result of this function could be incorrect when using fractional
-  *         value for HSE crystal.
-  * @note   This function can be used by the user application to compute the
-  *         baud-rate for the communication peripherals or configure other parameters.
-  * @{
-  */
-
-/**
-  * @brief  Return the frequencies of different on chip clocks;  System, AHB and APB1 buses clocks
-  * @note   Each time SYSCLK, HCLK and/or PCLK1 clock changes, this function
-  *         must be called to update structure fields. Otherwise, any
-  *         configuration based on this function will be incorrect.
-  * @param  RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
-  * @retval None
-  */
-void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
-{
-  /* Get SYSCLK frequency */
-  RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
-
-  /* HCLK clock frequency */
-  RCC_Clocks->HCLK_Frequency   = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
-
-  /* PCLK1 clock frequency */
-  RCC_Clocks->PCLK1_Frequency  = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
-}
-
-/**
-  * @brief  Return USARTx clock frequency
-  * @param  USARTxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_USART1_CLKSOURCE
-  *         @arg @ref LL_RCC_USART2_CLKSOURCE (*)
-  *         @arg @ref LL_RCC_USART3_CLKSOURCE (*)
-  *
-  *         (*) value not defined in all devices.
-  * @retval USART clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI or LSE) is not ready
-  */
-uint32_t LL_RCC_GetUSARTClockFreq(uint32_t USARTxSource)
-{
-  uint32_t usart_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource));
-#if defined(RCC_CFGR3_USART1SW)
-  if (USARTxSource == LL_RCC_USART1_CLKSOURCE)
-  {
-    /* USART1CLK clock frequency */
-    switch (LL_RCC_GetUSARTClockSource(USARTxSource))
-    {
-      case LL_RCC_USART1_CLKSOURCE_SYSCLK: /* USART1 Clock is System Clock */
-        usart_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_USART1_CLKSOURCE_HSI:    /* USART1 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          usart_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART1_CLKSOURCE_LSE:    /* USART1 Clock is LSE Osc. */
-        if (LL_RCC_LSE_IsReady())
-        {
-          usart_frequency = LSE_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART1_CLKSOURCE_PCLK1:  /* USART1 Clock is PCLK1 */
-      default:
-        usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-#endif /* RCC_CFGR3_USART1SW  */
-
-#if defined(RCC_CFGR3_USART2SW)
-  if (USARTxSource == LL_RCC_USART2_CLKSOURCE)
-  {
-    /* USART2CLK clock frequency */
-    switch (LL_RCC_GetUSARTClockSource(USARTxSource))
-    {
-      case LL_RCC_USART2_CLKSOURCE_SYSCLK: /* USART2 Clock is System Clock */
-        usart_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_USART2_CLKSOURCE_HSI:    /* USART2 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          usart_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART2_CLKSOURCE_LSE:    /* USART2 Clock is LSE Osc. */
-        if (LL_RCC_LSE_IsReady())
-        {
-          usart_frequency = LSE_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART2_CLKSOURCE_PCLK1:  /* USART2 Clock is PCLK1 */
-      default:
-        usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-#endif /* RCC_CFGR3_USART2SW */
-
-#if defined(RCC_CFGR3_USART3SW)
-  if (USARTxSource == LL_RCC_USART3_CLKSOURCE)
-  {
-    /* USART3CLK clock frequency */
-    switch (LL_RCC_GetUSARTClockSource(USARTxSource))
-    {
-      case LL_RCC_USART3_CLKSOURCE_SYSCLK: /* USART3 Clock is System Clock */
-        usart_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_USART3_CLKSOURCE_HSI:    /* USART3 Clock is HSI Osc. */
-        if (LL_RCC_HSI_IsReady())
-        {
-          usart_frequency = HSI_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART3_CLKSOURCE_LSE:    /* USART3 Clock is LSE Osc. */
-        if (LL_RCC_LSE_IsReady())
-        {
-          usart_frequency = LSE_VALUE;
-        }
-        break;
-
-      case LL_RCC_USART3_CLKSOURCE_PCLK1:  /* USART3 Clock is PCLK1 */
-      default:
-        usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
-        break;
-    }
-  }
-
-#endif /* RCC_CFGR3_USART3SW */
-  return usart_frequency;
-}
-
-/**
-  * @brief  Return I2Cx clock frequency
-  * @param  I2CxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_I2C1_CLKSOURCE
-  * @retval I2C clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that HSI oscillator is not ready
-  */
-uint32_t LL_RCC_GetI2CClockFreq(uint32_t I2CxSource)
-{
-  uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_I2C_CLKSOURCE(I2CxSource));
-
-  /* I2C1 CLK clock frequency */
-  if (I2CxSource == LL_RCC_I2C1_CLKSOURCE)
-  {
-    switch (LL_RCC_GetI2CClockSource(I2CxSource))
-    {
-      case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */
-        i2c_frequency = RCC_GetSystemClockFreq();
-        break;
-
-      case LL_RCC_I2C1_CLKSOURCE_HSI:    /* I2C1 Clock is HSI Osc. */
-      default:
-        if (LL_RCC_HSI_IsReady())
-        {
-          i2c_frequency = HSI_VALUE;
-        }
-        break;
-    }
-  }
-
-  return i2c_frequency;
-}
-
-#if defined(USB)
-/**
-  * @brief  Return USBx clock frequency
-  * @param  USBxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_USB_CLKSOURCE
-  * @retval USB clock frequency (in Hz)
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI48) or PLL is not ready
-  *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NA indicates that no clock source selected
-  */
-uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
-{
-  uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource));
-
-  /* USBCLK clock frequency */
-  switch (LL_RCC_GetUSBClockSource(USBxSource))
-  {
-    case LL_RCC_USB_CLKSOURCE_PLL:        /* PLL clock used as USB clock source */
-      if (LL_RCC_PLL_IsReady())
-      {
-        usb_frequency = RCC_PLL_GetFreqDomain_SYS();
-      }
-      break;
-
-#if defined(RCC_CFGR3_USBSW_HSI48)
-    case LL_RCC_USB_CLKSOURCE_HSI48:      /* HSI48 clock used as USB clock source */
-    default:
-      if (LL_RCC_HSI48_IsReady())
-      {
-        usb_frequency = HSI48_VALUE;
-      }
-      break;
-#else
-    case LL_RCC_USB_CLKSOURCE_NONE:       /* No clock used as USB clock source */
-    default:
-      usb_frequency = LL_RCC_PERIPH_FREQUENCY_NA;
-      break;
-#endif /* RCC_CFGR3_USBSW_HSI48 */
-  }
-
-  return usb_frequency;
-}
-#endif /* USB */
-
-#if defined(CEC)
-/**
-  * @brief  Return CECx clock frequency
-  * @param  CECxSource This parameter can be one of the following values:
-  *         @arg @ref LL_RCC_CEC_CLKSOURCE
-  * @retval CEC clock frequency (in Hz)
-  *        @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillators (HSI or LSE) are not ready
-  */
-uint32_t LL_RCC_GetCECClockFreq(uint32_t CECxSource)
-{
-  uint32_t cec_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
-
-  /* Check parameter */
-  assert_param(IS_LL_RCC_CEC_CLKSOURCE(CECxSource));
-
-  /* CECCLK clock frequency */
-  switch (LL_RCC_GetCECClockSource(CECxSource))
-  {
-    case LL_RCC_CEC_CLKSOURCE_HSI_DIV244:   /* HSI / 244 clock used as CEC clock source */
-      if (LL_RCC_HSI_IsReady())
-      {
-        cec_frequency = HSI_VALUE / 244U;
-      }
-      break;
-
-    case LL_RCC_CEC_CLKSOURCE_LSE:          /* LSE clock used as CEC clock source */
-    default:
-      if (LL_RCC_LSE_IsReady())
-      {
-        cec_frequency = LSE_VALUE;
-      }
-      break;
-  }
-
-  return cec_frequency;
-}
-#endif /* CEC */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup RCC_LL_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Return SYSTEM clock frequency
-  * @retval SYSTEM clock frequency (in Hz)
-  */
-uint32_t RCC_GetSystemClockFreq(void)
-{
-  uint32_t frequency = 0U;
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  switch (LL_RCC_GetSysClkSource())
-  {
-    case LL_RCC_SYS_CLKSOURCE_STATUS_HSI:  /* HSI used as system clock  source */
-      frequency = HSI_VALUE;
-      break;
-
-    case LL_RCC_SYS_CLKSOURCE_STATUS_HSE:  /* HSE used as system clock  source */
-      frequency = HSE_VALUE;
-      break;
-
-    case LL_RCC_SYS_CLKSOURCE_STATUS_PLL:  /* PLL used as system clock  source */
-      frequency = RCC_PLL_GetFreqDomain_SYS();
-      break;
-
-#if defined(RCC_HSI48_SUPPORT)
-    case LL_RCC_SYS_CLKSOURCE_STATUS_HSI48:/* HSI48 used as system clock  source */
-      frequency = HSI48_VALUE;
-      break;
-#endif /* RCC_HSI48_SUPPORT */
-
-    default:
-      frequency = HSI_VALUE;
-      break;
-  }
-
-  return frequency;
-}
-
-/**
-  * @brief  Return HCLK clock frequency
-  * @param  SYSCLK_Frequency SYSCLK clock frequency
-  * @retval HCLK clock frequency (in Hz)
-  */
-uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
-{
-  /* HCLK clock frequency */
-  return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
-}
-
-/**
-  * @brief  Return PCLK1 clock frequency
-  * @param  HCLK_Frequency HCLK clock frequency
-  * @retval PCLK1 clock frequency (in Hz)
-  */
-uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
-{
-  /* PCLK1 clock frequency */
-  return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
-}
-/**
-  * @brief  Return PLL clock frequency used for system domain
-  * @retval PLL clock frequency (in Hz)
-  */
-uint32_t RCC_PLL_GetFreqDomain_SYS(void)
-{
-  uint32_t pllinputfreq = 0U, pllsource = 0U;
-
-  /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */
-
-  /* Get PLL source */
-  pllsource = LL_RCC_PLL_GetMainSource();
-
-  switch (pllsource)
-  {
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-    case LL_RCC_PLLSOURCE_HSI:       /* HSI used as PLL clock source */
-      pllinputfreq = HSI_VALUE;
-#else
-    case LL_RCC_PLLSOURCE_HSI_DIV_2: /* HSI used as PLL clock source */
-      pllinputfreq = HSI_VALUE / 2U;
-#endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
-      break;
-
-#if defined(RCC_HSI48_SUPPORT)
-    case LL_RCC_PLLSOURCE_HSI48:     /* HSI48 used as PLL clock source */
-      pllinputfreq = HSI48_VALUE;
-      break;
-#endif /* RCC_HSI48_SUPPORT */
-
-    case LL_RCC_PLLSOURCE_HSE:       /* HSE used as PLL clock source */
-      pllinputfreq = HSE_VALUE;
-      break;
-
-    default:
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-      pllinputfreq = HSI_VALUE;
-#else
-      pllinputfreq = HSI_VALUE / 2U;
-#endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
-      break;
-  }
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-  return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetPrediv());
-#else
-  return __LL_RCC_CALC_PLLCLK_FREQ((pllinputfreq / (LL_RCC_PLL_GetPrediv() + 1U)), LL_RCC_PLL_GetMultiplicator());
-#endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(RCC) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_rtc.c b/lib/hal-stm32f0/source/stm32f0xx_ll_rtc.c
deleted file mode 100644
index 6c1ba8e0..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_rtc.c
+++ /dev/null
@@ -1,740 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_rtc.c
-  * @author  MCD Application Team
-  * @brief   RTC LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_rtc.h"
-#include "stm32f0xx_ll_cortex.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined(RTC)
-
-/** @addtogroup RTC_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup RTC_LL_Private_Constants
-  * @{
-  */
-/* Default values used for prescaler */
-#define RTC_ASYNCH_PRESC_DEFAULT     0x0000007FU
-#define RTC_SYNCH_PRESC_DEFAULT      0x000000FFU
-
-/* Values used for timeout */
-#define RTC_INITMODE_TIMEOUT         1000U /* 1s when tick set to 1ms */
-#define RTC_SYNCHRO_TIMEOUT          1000U /* 1s when tick set to 1ms */
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup RTC_LL_Private_Macros
-  * @{
-  */
-
-#define IS_LL_RTC_HOURFORMAT(__VALUE__) (((__VALUE__) == LL_RTC_HOURFORMAT_24HOUR) \
-                                      || ((__VALUE__) == LL_RTC_HOURFORMAT_AMPM))
-
-#define IS_LL_RTC_ASYNCH_PREDIV(__VALUE__)   ((__VALUE__) <= 0x7FU)
-
-#define IS_LL_RTC_SYNCH_PREDIV(__VALUE__)    ((__VALUE__) <= 0x7FFFU)
-
-#define IS_LL_RTC_FORMAT(__VALUE__) (((__VALUE__) == LL_RTC_FORMAT_BIN) \
-                                  || ((__VALUE__) == LL_RTC_FORMAT_BCD))
-
-#define IS_LL_RTC_TIME_FORMAT(__VALUE__) (((__VALUE__) == LL_RTC_TIME_FORMAT_AM_OR_24) \
-                                       || ((__VALUE__) == LL_RTC_TIME_FORMAT_PM))
-
-#define IS_LL_RTC_HOUR12(__HOUR__)            (((__HOUR__) > 0U) && ((__HOUR__) <= 12U))
-#define IS_LL_RTC_HOUR24(__HOUR__)            ((__HOUR__) <= 23U)
-#define IS_LL_RTC_MINUTES(__MINUTES__)        ((__MINUTES__) <= 59U)
-#define IS_LL_RTC_SECONDS(__SECONDS__)        ((__SECONDS__) <= 59U)
-
-#define IS_LL_RTC_WEEKDAY(__VALUE__) (((__VALUE__) == LL_RTC_WEEKDAY_MONDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_TUESDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_WEDNESDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_THURSDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_FRIDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_SATURDAY) \
-                                   || ((__VALUE__) == LL_RTC_WEEKDAY_SUNDAY))
-
-#define IS_LL_RTC_DAY(__DAY__)    (((__DAY__) >= 1U) && ((__DAY__) <= 31U))
-
-#define IS_LL_RTC_MONTH(__VALUE__) (((__VALUE__) == LL_RTC_MONTH_JANUARY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_FEBRUARY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_MARCH) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_APRIL) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_MAY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_JUNE) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_JULY) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_AUGUST) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_SEPTEMBER) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_OCTOBER) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_NOVEMBER) \
-                                 || ((__VALUE__) == LL_RTC_MONTH_DECEMBER))
-
-#define IS_LL_RTC_YEAR(__YEAR__) ((__YEAR__) <= 99U)
-
-#define IS_LL_RTC_ALMA_MASK(__VALUE__) (((__VALUE__) == LL_RTC_ALMA_MASK_NONE) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_DATEWEEKDAY) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_HOURS) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_MINUTES) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_SECONDS) \
-                                     || ((__VALUE__) == LL_RTC_ALMA_MASK_ALL))
-
-
-#define IS_LL_RTC_ALMA_DATE_WEEKDAY_SEL(__SEL__) (((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE) || \
-                                                  ((__SEL__) == LL_RTC_ALMA_DATEWEEKDAYSEL_WEEKDAY))
-
-
-/**
-  * @}
-  */
-/* Private function prototypes -----------------------------------------------*/
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup RTC_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup RTC_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-Initializes the RTC registers to their default reset values.
-  * @note   This function doesn't reset the RTC Clock source and RTC Backup Data
-  *         registers.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC registers are de-initialized
-  *          - ERROR: RTC registers are not de-initialized
-  */
-ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Reset TR, DR and CR registers */
-    LL_RTC_WriteReg(RTCx, TR,       0x00000000U);
-#if defined(RTC_WAKEUP_SUPPORT)
-    LL_RTC_WriteReg(RTCx, WUTR,     RTC_WUTR_WUT);
-#endif /* RTC_WAKEUP_SUPPORT */
-    LL_RTC_WriteReg(RTCx, DR  ,     (RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0));
-    /* Reset All CR bits except CR[2:0] */
-#if defined(RTC_WAKEUP_SUPPORT)
-    LL_RTC_WriteReg(RTCx, CR, (LL_RTC_ReadReg(RTCx, CR) & RTC_CR_WUCKSEL));
-#else
-    LL_RTC_WriteReg(RTCx, CR, 0x00000000U);
-#endif /* RTC_WAKEUP_SUPPORT */
-    LL_RTC_WriteReg(RTCx, PRER,     (RTC_PRER_PREDIV_A | RTC_SYNCH_PRESC_DEFAULT));
-    LL_RTC_WriteReg(RTCx, ALRMAR,   0x00000000U);
-    LL_RTC_WriteReg(RTCx, SHIFTR,   0x00000000U);
-    LL_RTC_WriteReg(RTCx, CALR,     0x00000000U);
-    LL_RTC_WriteReg(RTCx, ALRMASSR, 0x00000000U);
-
-    /* Reset ISR register and exit initialization mode */
-    LL_RTC_WriteReg(RTCx, ISR,      0x00000000U);
-
-    /* Reset Tamper and alternate functions configuration register */
-    LL_RTC_WriteReg(RTCx, TAFCR, 0x00000000U);
-
-    /* Wait till the RTC RSF flag is set */
-    status = LL_RTC_WaitForSynchro(RTCx);
-  }
-
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Initializes the RTC registers according to the specified parameters
-  *         in RTC_InitStruct.
-  * @param  RTCx RTC Instance
-  * @param  RTC_InitStruct pointer to a @ref LL_RTC_InitTypeDef structure that contains
-  *         the configuration information for the RTC peripheral.
-  * @note   The RTC Prescaler register is write protected and can be written in
-  *         initialization mode only.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC registers are initialized
-  *          - ERROR: RTC registers are not initialized
-  */
-ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_HOURFORMAT(RTC_InitStruct->HourFormat));
-  assert_param(IS_LL_RTC_ASYNCH_PREDIV(RTC_InitStruct->AsynchPrescaler));
-  assert_param(IS_LL_RTC_SYNCH_PREDIV(RTC_InitStruct->SynchPrescaler));
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Set Hour Format */
-    LL_RTC_SetHourFormat(RTCx, RTC_InitStruct->HourFormat);
-
-    /* Configure Synchronous and Asynchronous prescaler factor */
-    LL_RTC_SetSynchPrescaler(RTCx, RTC_InitStruct->SynchPrescaler);
-    LL_RTC_SetAsynchPrescaler(RTCx, RTC_InitStruct->AsynchPrescaler);
-
-    /* Exit Initialization mode */
-    LL_RTC_DisableInitMode(RTCx);
-
-    status = SUCCESS;
-  }
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_InitTypeDef field to default value.
-  * @param  RTC_InitStruct pointer to a @ref LL_RTC_InitTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct)
-{
-  /* Set RTC_InitStruct fields to default values */
-  RTC_InitStruct->HourFormat      = LL_RTC_HOURFORMAT_24HOUR;
-  RTC_InitStruct->AsynchPrescaler = RTC_ASYNCH_PRESC_DEFAULT;
-  RTC_InitStruct->SynchPrescaler  = RTC_SYNCH_PRESC_DEFAULT;
-}
-
-/**
-  * @brief  Set the RTC current time.
-  * @param  RTCx RTC Instance
-  * @param  RTC_Format This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_FORMAT_BIN
-  *         @arg @ref LL_RTC_FORMAT_BCD
-  * @param  RTC_TimeStruct pointer to a RTC_TimeTypeDef structure that contains
-  *                        the time configuration information for the RTC.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC Time register is configured
-  *          - ERROR: RTC Time register is not configured
-  */
-ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_FORMAT(RTC_Format));
-
-  if (RTC_Format == LL_RTC_FORMAT_BIN)
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(RTC_TimeStruct->Hours));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_TimeStruct->TimeFormat));
-    }
-    else
-    {
-      RTC_TimeStruct->TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(RTC_TimeStruct->Hours));
-    }
-    assert_param(IS_LL_RTC_MINUTES(RTC_TimeStruct->Minutes));
-    assert_param(IS_LL_RTC_SECONDS(RTC_TimeStruct->Seconds));
-  }
-  else
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Hours)));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_TimeStruct->TimeFormat));
-    }
-    else
-    {
-      RTC_TimeStruct->TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Hours)));
-    }
-    assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Minutes)));
-    assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_TimeStruct->Seconds)));
-  }
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Check the input parameters format */
-    if (RTC_Format != LL_RTC_FORMAT_BIN)
-    {
-      LL_RTC_TIME_Config(RTCx, RTC_TimeStruct->TimeFormat, RTC_TimeStruct->Hours,
-                         RTC_TimeStruct->Minutes, RTC_TimeStruct->Seconds);
-    }
-    else
-    {
-      LL_RTC_TIME_Config(RTCx, RTC_TimeStruct->TimeFormat, __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Hours),
-                         __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Minutes),
-                         __LL_RTC_CONVERT_BIN2BCD(RTC_TimeStruct->Seconds));
-    }
-
-    /* Exit Initialization mode */
-    LL_RTC_DisableInitMode(RTC);
-
-    /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U)
-    {
-      status = LL_RTC_WaitForSynchro(RTCx);
-    }
-    else
-    {
-      status = SUCCESS;
-    }
-  }
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_TimeTypeDef field to default value (Time = 00h:00min:00sec).
-  * @param  RTC_TimeStruct pointer to a @ref LL_RTC_TimeTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct)
-{
-  /* Time = 00h:00min:00sec */
-  RTC_TimeStruct->TimeFormat = LL_RTC_TIME_FORMAT_AM_OR_24;
-  RTC_TimeStruct->Hours      = 0U;
-  RTC_TimeStruct->Minutes    = 0U;
-  RTC_TimeStruct->Seconds    = 0U;
-}
-
-/**
-  * @brief  Set the RTC current date.
-  * @param  RTCx RTC Instance
-  * @param  RTC_Format This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_FORMAT_BIN
-  *         @arg @ref LL_RTC_FORMAT_BCD
-  * @param  RTC_DateStruct pointer to a RTC_DateTypeDef structure that contains
-  *                         the date configuration information for the RTC.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC Day register is configured
-  *          - ERROR: RTC Day register is not configured
-  */
-ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_DateTypeDef *RTC_DateStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_FORMAT(RTC_Format));
-
-  if ((RTC_Format == LL_RTC_FORMAT_BIN) && ((RTC_DateStruct->Month & 0x10U) == 0x10U))
-  {
-    RTC_DateStruct->Month = (RTC_DateStruct->Month & (uint32_t)~(0x10U)) + 0x0AU;
-  }
-  if (RTC_Format == LL_RTC_FORMAT_BIN)
-  {
-    assert_param(IS_LL_RTC_YEAR(RTC_DateStruct->Year));
-    assert_param(IS_LL_RTC_MONTH(RTC_DateStruct->Month));
-    assert_param(IS_LL_RTC_DAY(RTC_DateStruct->Day));
-  }
-  else
-  {
-    assert_param(IS_LL_RTC_YEAR(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Year)));
-    assert_param(IS_LL_RTC_MONTH(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Month)));
-    assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_DateStruct->Day)));
-  }
-  assert_param(IS_LL_RTC_WEEKDAY(RTC_DateStruct->WeekDay));
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Set Initialization mode */
-  if (LL_RTC_EnterInitMode(RTCx) != ERROR)
-  {
-    /* Check the input parameters format */
-    if (RTC_Format != LL_RTC_FORMAT_BIN)
-    {
-      LL_RTC_DATE_Config(RTCx, RTC_DateStruct->WeekDay, RTC_DateStruct->Day, RTC_DateStruct->Month, RTC_DateStruct->Year);
-    }
-    else
-    {
-      LL_RTC_DATE_Config(RTCx, RTC_DateStruct->WeekDay, __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Day),
-                         __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Month), __LL_RTC_CONVERT_BIN2BCD(RTC_DateStruct->Year));
-    }
-
-    /* Exit Initialization mode */
-    LL_RTC_DisableInitMode(RTC);
-
-    /* If  RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
-    if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U)
-    {
-      status = LL_RTC_WaitForSynchro(RTCx);
-    }
-    else
-    {
-      status = SUCCESS;
-    }
-  }
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_DateTypeDef field to default value (date = Monday, January 01 xx00)
-  * @param  RTC_DateStruct pointer to a @ref LL_RTC_DateTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_DATE_StructInit(LL_RTC_DateTypeDef *RTC_DateStruct)
-{
-  /* Monday, January 01 xx00 */
-  RTC_DateStruct->WeekDay = LL_RTC_WEEKDAY_MONDAY;
-  RTC_DateStruct->Day     = 1U;
-  RTC_DateStruct->Month   = LL_RTC_MONTH_JANUARY;
-  RTC_DateStruct->Year    = 0U;
-}
-
-/**
-  * @brief  Set the RTC Alarm A.
-  * @note   The Alarm register can only be written when the corresponding Alarm
-  *         is disabled (Use @ref LL_RTC_ALMA_Disable function).
-  * @param  RTCx RTC Instance
-  * @param  RTC_Format This parameter can be one of the following values:
-  *         @arg @ref LL_RTC_FORMAT_BIN
-  *         @arg @ref LL_RTC_FORMAT_BCD
-  * @param  RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure that
-  *                         contains the alarm configuration parameters.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: ALARMA registers are configured
-  *          - ERROR: ALARMA registers are not configured
-  */
-ErrorStatus LL_RTC_ALMA_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-  assert_param(IS_LL_RTC_FORMAT(RTC_Format));
-  assert_param(IS_LL_RTC_ALMA_MASK(RTC_AlarmStruct->AlarmMask));
-  assert_param(IS_LL_RTC_ALMA_DATE_WEEKDAY_SEL(RTC_AlarmStruct->AlarmDateWeekDaySel));
-
-  if (RTC_Format == LL_RTC_FORMAT_BIN)
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(RTC_AlarmStruct->AlarmTime.Hours));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(RTC_AlarmStruct->AlarmTime.Hours));
-    }
-    assert_param(IS_LL_RTC_MINUTES(RTC_AlarmStruct->AlarmTime.Minutes));
-    assert_param(IS_LL_RTC_SECONDS(RTC_AlarmStruct->AlarmTime.Seconds));
-
-    if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_LL_RTC_DAY(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-    else
-    {
-      assert_param(IS_LL_RTC_WEEKDAY(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-  }
-  else
-  {
-    if (LL_RTC_GetHourFormat(RTCx) != LL_RTC_HOURFORMAT_24HOUR)
-    {
-      assert_param(IS_LL_RTC_HOUR12(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours)));
-      assert_param(IS_LL_RTC_TIME_FORMAT(RTC_AlarmStruct->AlarmTime.TimeFormat));
-    }
-    else
-    {
-      RTC_AlarmStruct->AlarmTime.TimeFormat = 0x00U;
-      assert_param(IS_LL_RTC_HOUR24(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Hours)));
-    }
-
-    assert_param(IS_LL_RTC_MINUTES(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Minutes)));
-    assert_param(IS_LL_RTC_SECONDS(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmTime.Seconds)));
-
-    if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE)
-    {
-      assert_param(IS_LL_RTC_DAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay)));
-    }
-    else
-    {
-      assert_param(IS_LL_RTC_WEEKDAY(__LL_RTC_CONVERT_BCD2BIN(RTC_AlarmStruct->AlarmDateWeekDay)));
-    }
-  }
-
-  /* Disable the write protection for RTC registers */
-  LL_RTC_DisableWriteProtection(RTCx);
-
-  /* Select weekday selection */
-  if (RTC_AlarmStruct->AlarmDateWeekDaySel == LL_RTC_ALMA_DATEWEEKDAYSEL_DATE)
-  {
-    /* Set the date for ALARM */
-    LL_RTC_ALMA_DisableWeekday(RTCx);
-    if (RTC_Format != LL_RTC_FORMAT_BIN)
-    {
-      LL_RTC_ALMA_SetDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay);
-    }
-    else
-    {
-      LL_RTC_ALMA_SetDay(RTCx, __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmDateWeekDay));
-    }
-  }
-  else
-  {
-    /* Set the week day for ALARM */
-    LL_RTC_ALMA_EnableWeekday(RTCx);
-    LL_RTC_ALMA_SetWeekDay(RTCx, RTC_AlarmStruct->AlarmDateWeekDay);
-  }
-
-  /* Configure the Alarm register */
-  if (RTC_Format != LL_RTC_FORMAT_BIN)
-  {
-    LL_RTC_ALMA_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat, RTC_AlarmStruct->AlarmTime.Hours,
-                           RTC_AlarmStruct->AlarmTime.Minutes, RTC_AlarmStruct->AlarmTime.Seconds);
-  }
-  else
-  {
-    LL_RTC_ALMA_ConfigTime(RTCx, RTC_AlarmStruct->AlarmTime.TimeFormat,
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Hours),
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Minutes),
-                           __LL_RTC_CONVERT_BIN2BCD(RTC_AlarmStruct->AlarmTime.Seconds));
-  }
-  /* Set ALARM mask */
-  LL_RTC_ALMA_SetMask(RTCx, RTC_AlarmStruct->AlarmMask);
-
-  /* Enable the write protection for RTC registers */
-  LL_RTC_EnableWriteProtection(RTCx);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set each @ref LL_RTC_AlarmTypeDef of ALARMA field to default value (Time = 00h:00mn:00sec /
-  *         Day = 1st day of the month/Mask = all fields are masked).
-  * @param  RTC_AlarmStruct pointer to a @ref LL_RTC_AlarmTypeDef structure which will be initialized.
-  * @retval None
-  */
-void LL_RTC_ALMA_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct)
-{
-  /* Alarm Time Settings : Time = 00h:00mn:00sec */
-  RTC_AlarmStruct->AlarmTime.TimeFormat = LL_RTC_ALMA_TIME_FORMAT_AM;
-  RTC_AlarmStruct->AlarmTime.Hours      = 0U;
-  RTC_AlarmStruct->AlarmTime.Minutes    = 0U;
-  RTC_AlarmStruct->AlarmTime.Seconds    = 0U;
-
-  /* Alarm Day Settings : Day = 1st day of the month */
-  RTC_AlarmStruct->AlarmDateWeekDaySel = LL_RTC_ALMA_DATEWEEKDAYSEL_DATE;
-  RTC_AlarmStruct->AlarmDateWeekDay    = 1U;
-
-  /* Alarm Masks Settings : Mask =  all fields are not masked */
-  RTC_AlarmStruct->AlarmMask           = LL_RTC_ALMA_MASK_NONE;
-}
-
-/**
-  * @brief  Enters the RTC Initialization mode.
-  * @note   The RTC Initialization mode is write protected, use the
-  *         @ref LL_RTC_DisableWriteProtection before calling this function.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC is in Init mode
-  *          - ERROR: RTC is not in Init mode
-  */
-ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx)
-{
-  __IO uint32_t timeout = RTC_INITMODE_TIMEOUT;
-  ErrorStatus status = SUCCESS;
-  uint32_t tmp = 0U;
-
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Check if the Initialization mode is set */
-  if (LL_RTC_IsActiveFlag_INIT(RTCx) == 0U)
-  {
-    /* Set the Initialization mode */
-    LL_RTC_EnableInitMode(RTCx);
-
-    /* Wait till RTC is in INIT state and if Time out is reached exit */
-    tmp = LL_RTC_IsActiveFlag_INIT(RTCx);
-    while ((timeout != 0U) && (tmp != 1U))
-    {
-      if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
-      {
-        timeout --;
-      }
-      tmp = LL_RTC_IsActiveFlag_INIT(RTCx);
-      if (timeout == 0U)
-      {
-        status = ERROR;
-      }
-    }
-  }
-  return status;
-}
-
-/**
-  * @brief  Exit the RTC Initialization mode.
-  * @note   When the initialization sequence is complete, the calendar restarts
-  *         counting after 4 RTCCLK cycles.
-  * @note   The RTC Initialization mode is write protected, use the
-  *         @ref LL_RTC_DisableWriteProtection before calling this function.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC exited from in Init mode
-  *          - ERROR: Not applicable
-  */
-ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx)
-{
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Disable initialization mode */
-  LL_RTC_DisableInitMode(RTCx);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Waits until the RTC Time and Day registers (RTC_TR and RTC_DR) are
-  *         synchronized with RTC APB clock.
-  * @note   The RTC Resynchronization mode is write protected, use the
-  *         @ref LL_RTC_DisableWriteProtection before calling this function.
-  * @note   To read the calendar through the shadow registers after Calendar
-  *         initialization, calendar update or after wakeup from low power modes
-  *         the software must first clear the RSF flag.
-  *         The software must then wait until it is set again before reading
-  *         the calendar, which means that the calendar registers have been
-  *         correctly copied into the RTC_TR and RTC_DR shadow registers.
-  * @param  RTCx RTC Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: RTC registers are synchronised
-  *          - ERROR: RTC registers are not synchronised
-  */
-ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx)
-{
-  __IO uint32_t timeout = RTC_SYNCHRO_TIMEOUT;
-  ErrorStatus status = SUCCESS;
-  uint32_t tmp = 0U;
-
-  /* Check the parameter */
-  assert_param(IS_RTC_ALL_INSTANCE(RTCx));
-
-  /* Clear RSF flag */
-  LL_RTC_ClearFlag_RS(RTCx);
-
-  /* Wait the registers to be synchronised */
-  tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-  while ((timeout != 0U) && (tmp != 0U))
-  {
-    if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
-    {
-      timeout--;
-    }
-    tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-    if (timeout == 0U)
-    {
-      status = ERROR;
-    }
-  }
-
-  if (status != ERROR)
-  {
-    timeout = RTC_SYNCHRO_TIMEOUT;
-    tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-    while ((timeout != 0U) && (tmp != 1U))
-    {
-      if (LL_SYSTICK_IsActiveCounterFlag() == 1U)
-      {
-        timeout--;
-      }
-      tmp = LL_RTC_IsActiveFlag_RS(RTCx);
-      if (timeout == 0U)
-      {
-        status = ERROR;
-      }
-    }
-  }
-
-  return (status);
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* defined(RTC) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_spi.c b/lib/hal-stm32f0/source/stm32f0xx_ll_spi.c
deleted file mode 100644
index 30054902..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_spi.c
+++ /dev/null
@@ -1,545 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_spi.c
-  * @author  MCD Application Team
-  * @brief   SPI LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_spi.h"
-#include "stm32f0xx_ll_bus.h"
-#include "stm32f0xx_ll_rcc.h"
-
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (SPI1) || defined (SPI2)
-
-/** @addtogroup SPI_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup SPI_LL_Private_Constants SPI Private Constants
-  * @{
-  */
-/* SPI registers Masks */
-#define SPI_CR1_CLEAR_MASK                 (SPI_CR1_CPHA    | SPI_CR1_CPOL     | SPI_CR1_MSTR   | \
-                                            SPI_CR1_BR      | SPI_CR1_LSBFIRST | SPI_CR1_SSI    | \
-                                            SPI_CR1_SSM     | SPI_CR1_RXONLY   | SPI_CR1_CRCL   | \
-                                            SPI_CR1_CRCNEXT | SPI_CR1_CRCEN    | SPI_CR1_BIDIOE | \
-                                            SPI_CR1_BIDIMODE)
-/**
-  * @}
-  */
-
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup SPI_LL_Private_Macros SPI Private Macros
-  * @{
-  */
-#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)    \
-                                              || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
-                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
-                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
-
-#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
-                                || ((__VALUE__) == LL_SPI_MODE_SLAVE))
-
-#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT)  \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT)  \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT)  \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT)  \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT)  \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
-                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
-
-#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
-                                    || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
-
-#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
-                                 || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
-
-#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
-                               || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
-                               || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
-
-#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)   \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
-                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
-
-#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
-                                    || ((__VALUE__) == LL_SPI_MSB_FIRST))
-
-#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
-                                          || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
-
-#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup SPI_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup SPI_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the SPI registers to their default reset values.
-  * @param  SPIx SPI Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: SPI registers are de-initialized
-  *          - ERROR: SPI registers are not de-initialized
-  */
-ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the parameters */
-  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
-
-#if defined(SPI1)
-  if (SPIx == SPI1)
-  {
-    /* Force reset of SPI clock */
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_SPI1);
-
-    /* Release reset of SPI clock */
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_SPI1);
-
-    status = SUCCESS;
-  }
-#endif /* SPI1 */
-#if defined(SPI2)
-  if (SPIx == SPI2)
-  {
-    /* Force reset of SPI clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
-
-    /* Release reset of SPI clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
-
-    status = SUCCESS;
-  }
-#endif /* SPI2 */
-
-  return status;
-}
-
-/**
-  * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
-  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
-  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @param  SPIx SPI Instance
-  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
-  */
-ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
-{
-  ErrorStatus status = ERROR;
-
-  /* Check the SPI Instance SPIx*/
-  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
-
-  /* Check the SPI parameters from SPI_InitStruct*/
-  assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
-  assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
-  assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
-  assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
-  assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
-  assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
-  assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
-  assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
-  assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
-
-  if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
-  {
-    /*---------------------------- SPIx CR1 Configuration ------------------------
-     * Configure SPIx CR1 with parameters:
-     * - TransferDirection:  SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
-     * - Master/Slave Mode:  SPI_CR1_MSTR bit
-     * - ClockPolarity:      SPI_CR1_CPOL bit
-     * - ClockPhase:         SPI_CR1_CPHA bit
-     * - NSS management:     SPI_CR1_SSM bit
-     * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
-     * - BitOrder:           SPI_CR1_LSBFIRST bit
-     * - CRCCalculation:     SPI_CR1_CRCEN bit
-     */
-    MODIFY_REG(SPIx->CR1,
-               SPI_CR1_CLEAR_MASK,
-               SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode |
-               SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
-               SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
-               SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
-
-    /*---------------------------- SPIx CR2 Configuration ------------------------
-     * Configure SPIx CR2 with parameters:
-     * - DataWidth:          DS[3:0] bits
-     * - NSS management:     SSOE bit
-     */
-    MODIFY_REG(SPIx->CR2,
-               SPI_CR2_DS | SPI_CR2_SSOE,
-               SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U));
-
-    /*---------------------------- SPIx CRCPR Configuration ----------------------
-     * Configure SPIx CRCPR with parameters:
-     * - CRCPoly:            CRCPOLY[15:0] bits
-     */
-    if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
-    {
-      assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
-      LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
-    }
-    status = SUCCESS;
-  }
-
-#if defined (SPI_I2S_SUPPORT)
-  /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
-  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD);
-#endif /* SPI_I2S_SUPPORT */
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_SPI_InitTypeDef field to default value.
-  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
-  * whose fields will be set to default values.
-  * @retval None
-  */
-void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
-{
-  /* Set SPI_InitStruct fields to default values */
-  SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
-  SPI_InitStruct->Mode              = LL_SPI_MODE_SLAVE;
-  SPI_InitStruct->DataWidth         = LL_SPI_DATAWIDTH_8BIT;
-  SPI_InitStruct->ClockPolarity     = LL_SPI_POLARITY_LOW;
-  SPI_InitStruct->ClockPhase        = LL_SPI_PHASE_1EDGE;
-  SPI_InitStruct->NSS               = LL_SPI_NSS_HARD_INPUT;
-  SPI_InitStruct->BaudRate          = LL_SPI_BAUDRATEPRESCALER_DIV2;
-  SPI_InitStruct->BitOrder          = LL_SPI_MSB_FIRST;
-  SPI_InitStruct->CRCCalculation    = LL_SPI_CRCCALCULATION_DISABLE;
-  SPI_InitStruct->CRCPoly           = 7U;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#if defined(SPI_I2S_SUPPORT)
-/** @addtogroup I2S_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @defgroup I2S_LL_Private_Constants I2S Private Constants
-  * @{
-  */
-/* I2S registers Masks */
-#define I2S_I2SCFGR_CLEAR_MASK             (SPI_I2SCFGR_CHLEN   | SPI_I2SCFGR_DATLEN | \
-                                            SPI_I2SCFGR_CKPOL   | SPI_I2SCFGR_I2SSTD | \
-                                            SPI_I2SCFGR_I2SCFG  | SPI_I2SCFGR_I2SMOD )
-
-#define I2S_I2SPR_CLEAR_MASK               0x0002U
-/**
-  * @}
-  */
-/* Private macros ------------------------------------------------------------*/
-/** @defgroup I2S_LL_Private_Macros I2S Private Macros
-  * @{
-  */
-
-#define IS_LL_I2S_DATAFORMAT(__VALUE__)  (((__VALUE__) == LL_I2S_DATAFORMAT_16B)          \
-                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
-                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_24B)          \
-                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
-
-#define IS_LL_I2S_CPOL(__VALUE__)        (((__VALUE__) == LL_I2S_POLARITY_LOW)  \
-                                       || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
-
-#define IS_LL_I2S_STANDARD(__VALUE__)    (((__VALUE__) == LL_I2S_STANDARD_PHILIPS)   \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_MSB)       \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_LSB)       \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
-                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
-
-#define IS_LL_I2S_MODE(__VALUE__)        (((__VALUE__) == LL_I2S_MODE_SLAVE_TX)  \
-                                       || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX)  \
-                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
-                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
-
-#define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
-                                       || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
-
-#define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K)    \
-                                       && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
-                                       || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
-
-#define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__)  ((__VALUE__) >= 0x2U)
-
-#define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
-                                           || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup I2S_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup I2S_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize the SPI/I2S registers to their default reset values.
-  * @param  SPIx SPI Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: SPI registers are de-initialized
-  *          - ERROR: SPI registers are not de-initialized
-  */
-ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
-{
-  return LL_SPI_DeInit(SPIx);
-}
-
-/**
-  * @brief  Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
-  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
-  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @param  SPIx SPI Instance
-  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: SPI registers are Initialized
-  *          - ERROR: SPI registers are not Initialized
-  */
-ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
-{
-  uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;
-  uint32_t tmp = 0U;
-  LL_RCC_ClocksTypeDef rcc_clocks;
-  uint32_t sourceclock = 0U;
-  ErrorStatus status = ERROR;
-
-  /* Check the I2S parameters */
-  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
-  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
-  assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));
-  assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));
-  assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput));
-  assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq));
-  assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));
-
-  if (LL_I2S_IsEnabled(SPIx) == 0x00000000U)
-  {
-    /*---------------------------- SPIx I2SCFGR Configuration --------------------
-     * Configure SPIx I2SCFGR with parameters:
-     * - Mode:          SPI_I2SCFGR_I2SCFG[1:0] bit
-     * - Standard:      SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits
-     * - DataFormat:    SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits
-     * - ClockPolarity: SPI_I2SCFGR_CKPOL bit
-     */
-
-    /* Write to SPIx I2SCFGR */
-    MODIFY_REG(SPIx->I2SCFGR,
-               I2S_I2SCFGR_CLEAR_MASK,
-               I2S_InitStruct->Mode | I2S_InitStruct->Standard |
-               I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |
-               SPI_I2SCFGR_I2SMOD);
-
-    /*---------------------------- SPIx I2SPR Configuration ----------------------
-     * Configure SPIx I2SPR with parameters:
-     * - MCLKOutput:    SPI_I2SPR_MCKOE bit
-     * - AudioFreq:     SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits
-     */
-
-    /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv)
-     * else, default values are used:  i2sodd = 0U, i2sdiv = 2U.
-     */
-    if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT)
-    {
-      /* Check the frame length (For the Prescaler computing)
-       * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U).
-       */
-      if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
-      {
-        /* Packet length is 32 bits */
-        packetlength = 2U;
-      }
-
-      /* I2S Clock source is System clock: Get System Clock frequency */
-      LL_RCC_GetSystemClocksFreq(&rcc_clocks);
-
-      /* Get the source clock value: based on System Clock value */
-      sourceclock = rcc_clocks.SYSCLK_Frequency;
-
-      /* Compute the Real divider depending on the MCLK output state with a floating point */
-      if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
-      {
-        /* MCLK output is enabled */
-        tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
-      }
-      else
-      {
-        /* MCLK output is disabled */
-        tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
-      }
-
-      /* Remove the floating point */
-      tmp = tmp / 10U;
-
-      /* Check the parity of the divider */
-      i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U);
-
-      /* Compute the i2sdiv prescaler */
-      i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);
-
-      /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
-      i2sodd = (uint16_t)(i2sodd << 8U);
-    }
-
-    /* Test if the divider is 1 or 0 or greater than 0xFF */
-    if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
-    {
-      /* Set the default values */
-      i2sdiv = 2U;
-      i2sodd = 0U;
-    }
-
-    /* Write to SPIx I2SPR register the computed value */
-    WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput);
-
-    status = SUCCESS;
-  }
-  return status;
-}
-
-/**
-  * @brief  Set each @ref LL_I2S_InitTypeDef field to default value.
-  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
-  *         whose fields will be set to default values.
-  * @retval None
-  */
-void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct)
-{
-  /*--------------- Reset I2S init structure parameters values -----------------*/
-  I2S_InitStruct->Mode              = LL_I2S_MODE_SLAVE_TX;
-  I2S_InitStruct->Standard          = LL_I2S_STANDARD_PHILIPS;
-  I2S_InitStruct->DataFormat        = LL_I2S_DATAFORMAT_16B;
-  I2S_InitStruct->MCLKOutput        = LL_I2S_MCLK_OUTPUT_DISABLE;
-  I2S_InitStruct->AudioFreq         = LL_I2S_AUDIOFREQ_DEFAULT;
-  I2S_InitStruct->ClockPolarity     = LL_I2S_POLARITY_LOW;
-}
-
-/**
-  * @brief  Set linear and parity prescaler.
-  * @note   To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
-  *         Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
-  * @param  SPIx SPI Instance
-  * @param  PrescalerLinear value: Min_Data=0x02 and Max_Data=0xFF.
-  * @param  PrescalerParity This parameter can be one of the following values:
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
-  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
-  * @retval None
-  */
-void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity)
-{
-  /* Check the I2S parameters */
-  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
-  assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear));
-  assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity));
-
-  /* Write to SPIx I2SPR */
-  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U));
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-#endif /* SPI_I2S_SUPPORT */
-
-#endif /* defined (SPI1) || defined (SPI2) */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_tim.c b/lib/hal-stm32f0/source/stm32f0xx_ll_tim.c
deleted file mode 100644
index fa745e11..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_tim.c
+++ /dev/null
@@ -1,1175 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_tim.c
-  * @author  MCD Application Team
-  * @brief   TIM LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_tim.h"
-#include "stm32f0xx_ll_bus.h"
-
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (TIM1) || defined (TIM2) || defined (TIM3) || defined (TIM14) || defined (TIM15) || defined (TIM16) || defined (TIM17) || defined (TIM6) || defined (TIM7)
-
-/** @addtogroup TIM_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup TIM_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN))
-
-#define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \
-                                         || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \
-                                         || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4))
-
-#define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_PWM1) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_PWM2))
-
-#define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \
-                                   || ((__VALUE__) == LL_TIM_OCSTATE_ENABLE))
-
-#define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \
-                                      || ((__VALUE__) == LL_TIM_OCPOLARITY_LOW))
-
-#define IS_LL_TIM_OCIDLESTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCIDLESTATE_LOW) \
-                                       || ((__VALUE__) == LL_TIM_OCIDLESTATE_HIGH))
-
-#define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \
-                                       || ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \
-                                       || ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC))
-
-#define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV8))
-
-#define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8))
-
-#define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
-                                       || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING) \
-                                       || ((__VALUE__) == LL_TIM_IC_POLARITY_BOTHEDGE))
-
-#define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \
-                                       || ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \
-                                       || ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12))
-
-#define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
-                                               || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
-
-#define IS_LL_TIM_OSSR_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSR_DISABLE) \
-                                     || ((__VALUE__) == LL_TIM_OSSR_ENABLE))
-
-#define IS_LL_TIM_OSSI_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSI_DISABLE) \
-                                      || ((__VALUE__) == LL_TIM_OSSI_ENABLE))
-
-#define IS_LL_TIM_LOCK_LEVEL(__VALUE__) (((__VALUE__) == LL_TIM_LOCKLEVEL_OFF) \
-                                      || ((__VALUE__) == LL_TIM_LOCKLEVEL_1)   \
-                                      || ((__VALUE__) == LL_TIM_LOCKLEVEL_2)   \
-                                      || ((__VALUE__) == LL_TIM_LOCKLEVEL_3))
-
-#define IS_LL_TIM_BREAK_STATE(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_DISABLE) \
-                                       || ((__VALUE__) == LL_TIM_BREAK_ENABLE))
-
-#define IS_LL_TIM_BREAK_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_POLARITY_LOW) \
-                                          || ((__VALUE__) == LL_TIM_BREAK_POLARITY_HIGH))
-
-#define IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(__VALUE__) (((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_DISABLE) \
-                                                  || ((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_ENABLE))
-/**
-  * @}
-  */
-
-
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup TIM_LL_Private_Functions TIM Private Functions
-  * @{
-  */
-static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup TIM_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup TIM_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  Set TIMx registers to their reset values.
-  * @param  TIMx Timer instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: invalid TIMx instance
-  */
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx)
-{
-  ErrorStatus result = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(TIMx));
-
-  if (TIMx == TIM1)
-  {
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM1);
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM1);
-  }
-#if defined (TIM2)
-  else if (TIMx == TIM2)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
-  }
-#endif
-#if defined(TIM3)
-  else if (TIMx == TIM3)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
-  }
-#endif
-#if defined(TIM5)
-  else if (TIMx == TIM5)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM5);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM5);
-  }
-#endif
-#if defined (TIM6)
-  else if (TIMx == TIM6)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
-  }
-#endif
-#if defined (TIM7)
-  else if (TIMx == TIM7)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
-  }
-#endif
-#if defined(TIM8)
-  else if (TIMx == TIM8)
-  {
-    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM8);
-    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM8);
-  }
-#endif
-#if defined (TIM14)
-  else if (TIMx == TIM14)
-  {
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM14);
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14);
-  }
-#endif
-#if defined (TIM15)
-  else if (TIMx == TIM15)
-  {
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM15);
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM15);
-  }
-#endif
-#if defined (TIM16)
-  else if (TIMx == TIM16)
-  {
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM16);
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM16);
-  }
-#endif
-#if defined(TIM17)
-  else if (TIMx == TIM17)
-  {
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM17);
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM17);
-  }
-#endif
-  else
-  {
-    result = ERROR;
-  }
-
-  return result;
-}
-
-/**
-  * @brief  Set the fields of the time base unit configuration data structure
-  *         to their default values.
-  * @param  TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (time base unit configuration data structure)
-  * @retval None
-  */
-void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct)
-{
-  /* Set the default configuration */
-  TIM_InitStruct->Prescaler         = (uint16_t)0x0000U;
-  TIM_InitStruct->CounterMode       = LL_TIM_COUNTERMODE_UP;
-  TIM_InitStruct->Autoreload        = 0xFFFFFFFFU;
-  TIM_InitStruct->ClockDivision     = LL_TIM_CLOCKDIVISION_DIV1;
-  TIM_InitStruct->RepetitionCounter = (uint8_t)0x00U;
-}
-
-/**
-  * @brief  Configure the TIMx time base unit.
-  * @param  TIMx Timer Instance
-  * @param  TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
-{
-  uint32_t tmpcr1 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode));
-  assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision));
-
-  tmpcr1 = LL_TIM_ReadReg(TIMx, CR1);
-
-  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
-  {
-    /* Select the Counter Mode */
-    MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode);
-  }
-
-  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
-  {
-    /* Set the clock division */
-    MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision);
-  }
-
-  /* Write to TIMx CR1 */
-  LL_TIM_WriteReg(TIMx, CR1, tmpcr1);
-
-  /* Set the Autoreload value */
-  LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload);
-
-  /* Set the Prescaler value */
-  LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler);
-
-  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
-  {
-    /* Set the Repetition Counter value */
-    LL_TIM_SetRepetitionCounter(TIMx, TIM_InitStruct->RepetitionCounter);
-  }
-
-  /* Generate an update event to reload the Prescaler
-     and the repetition counter value (if applicable) immediately */
-  LL_TIM_GenerateEvent_UPDATE(TIMx);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set the fields of the TIMx output channel configuration data
-  *         structure to their default values.
-  * @param  TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)
-  * @retval None
-  */
-void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
-{
-  /* Set the default configuration */
-  TIM_OC_InitStruct->OCMode       = LL_TIM_OCMODE_FROZEN;
-  TIM_OC_InitStruct->OCState      = LL_TIM_OCSTATE_DISABLE;
-  TIM_OC_InitStruct->OCNState     = LL_TIM_OCSTATE_DISABLE;
-  TIM_OC_InitStruct->CompareValue = 0x00000000U;
-  TIM_OC_InitStruct->OCPolarity   = LL_TIM_OCPOLARITY_HIGH;
-  TIM_OC_InitStruct->OCNPolarity  = LL_TIM_OCPOLARITY_HIGH;
-  TIM_OC_InitStruct->OCIdleState  = LL_TIM_OCIDLESTATE_LOW;
-  TIM_OC_InitStruct->OCNIdleState = LL_TIM_OCIDLESTATE_LOW;
-}
-
-/**
-  * @brief  Configure the TIMx output channel.
-  * @param  TIMx Timer Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx output channel is initialized
-  *          - ERROR: TIMx output channel is not initialized
-  */
-ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
-{
-  ErrorStatus result = ERROR;
-
-  switch (Channel)
-  {
-    case LL_TIM_CHANNEL_CH1:
-      result = OC1Config(TIMx, TIM_OC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH2:
-      result = OC2Config(TIMx, TIM_OC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH3:
-      result = OC3Config(TIMx, TIM_OC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH4:
-      result = OC4Config(TIMx, TIM_OC_InitStruct);
-      break;
-    default:
-      break;
-  }
-
-  return result;
-}
-
-/**
-  * @brief  Set the fields of the TIMx input channel configuration data
-  *         structure to their default values.
-  * @param  TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)
-  * @retval None
-  */
-void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Set the default configuration */
-  TIM_ICInitStruct->ICPolarity    = LL_TIM_IC_POLARITY_RISING;
-  TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
-  TIM_ICInitStruct->ICPrescaler   = LL_TIM_ICPSC_DIV1;
-  TIM_ICInitStruct->ICFilter      = LL_TIM_IC_FILTER_FDIV1;
-}
-
-/**
-  * @brief  Configure the TIMx input channel.
-  * @param  TIMx Timer Instance
-  * @param  Channel This parameter can be one of the following values:
-  *         @arg @ref LL_TIM_CHANNEL_CH1
-  *         @arg @ref LL_TIM_CHANNEL_CH2
-  *         @arg @ref LL_TIM_CHANNEL_CH3
-  *         @arg @ref LL_TIM_CHANNEL_CH4
-  * @param  TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx output channel is initialized
-  *          - ERROR: TIMx output channel is not initialized
-  */
-ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct)
-{
-  ErrorStatus result = ERROR;
-
-  switch (Channel)
-  {
-    case LL_TIM_CHANNEL_CH1:
-      result = IC1Config(TIMx, TIM_IC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH2:
-      result = IC2Config(TIMx, TIM_IC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH3:
-      result = IC3Config(TIMx, TIM_IC_InitStruct);
-      break;
-    case LL_TIM_CHANNEL_CH4:
-      result = IC4Config(TIMx, TIM_IC_InitStruct);
-      break;
-    default:
-      break;
-  }
-
-  return result;
-}
-
-/**
-  * @brief  Fills each TIM_EncoderInitStruct field with its default value
-  * @param  TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)
-  * @retval None
-  */
-void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
-{
-  /* Set the default configuration */
-  TIM_EncoderInitStruct->EncoderMode    = LL_TIM_ENCODERMODE_X2_TI1;
-  TIM_EncoderInitStruct->IC1Polarity    = LL_TIM_IC_POLARITY_RISING;
-  TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
-  TIM_EncoderInitStruct->IC1Prescaler   = LL_TIM_ICPSC_DIV1;
-  TIM_EncoderInitStruct->IC1Filter      = LL_TIM_IC_FILTER_FDIV1;
-  TIM_EncoderInitStruct->IC2Polarity    = LL_TIM_IC_POLARITY_RISING;
-  TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
-  TIM_EncoderInitStruct->IC2Prescaler   = LL_TIM_ICPSC_DIV1;
-  TIM_EncoderInitStruct->IC2Filter      = LL_TIM_IC_FILTER_FDIV1;
-}
-
-/**
-  * @brief  Configure the encoder interface of the timer instance.
-  * @param  TIMx Timer Instance
-  * @param  TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode));
-  assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter));
-  assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter));
-
-  /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */
-  TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E);
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
-
-  /* Get the TIMx CCER register value */
-  tmpccer = LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Configure TI1 */
-  tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U);
-
-  /* Configure TI2 */
-  tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F  | TIM_CCMR1_IC2PSC);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U);
-  tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U);
-
-  /* Set TI1 and TI2 polarity and enable TI1 and TI2 */
-  tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP);
-  tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity);
-  tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U);
-  tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E);
-
-  /* Set encoder mode */
-  LL_TIM_SetEncoderMode(TIMx, TIM_EncoderInitStruct->EncoderMode);
-
-  /* Write to TIMx CCMR1 */
-  LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set the fields of the TIMx Hall sensor interface configuration data
-  *         structure to their default values.
-  * @param  TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface configuration data structure)
-  * @retval None
-  */
-void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
-{
-  /* Set the default configuration */
-  TIM_HallSensorInitStruct->IC1Polarity       = LL_TIM_IC_POLARITY_RISING;
-  TIM_HallSensorInitStruct->IC1Prescaler      = LL_TIM_ICPSC_DIV1;
-  TIM_HallSensorInitStruct->IC1Filter         = LL_TIM_IC_FILTER_FDIV1;
-  TIM_HallSensorInitStruct->CommutationDelay  = 0U;
-}
-
-/**
-  * @brief  Configure the Hall sensor interface of the timer instance.
-  * @note TIMx CH1, CH2 and CH3 inputs connected through a XOR
-  *       to the TI1 input channel
-  * @note TIMx slave mode controller is configured in reset mode.
-          Selected internal trigger is TI1F_ED.
-  * @note Channel 1 is configured as input, IC1 is mapped on TRC.
-  * @note Captured value stored in TIMx_CCR1 correspond to the time elapsed
-  *       between 2 changes on the inputs. It gives information about motor speed.
-  * @note Channel 2 is configured in output PWM 2 mode.
-  * @note Compare value stored in TIMx_CCR2 corresponds to the commutation delay.
-  * @note OC2REF is selected as trigger output on TRGO.
-  * @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used
-  *       when TIMx operates in Hall sensor interface mode.
-  * @param  TIMx Timer Instance
-  * @param  TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor interface configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
-{
-  uint32_t tmpcr2 = 0U;
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpsmcr = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_HallSensorInitStruct->IC1Polarity));
-  assert_param(IS_LL_TIM_ICPSC(TIM_HallSensorInitStruct->IC1Prescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_HallSensorInitStruct->IC1Filter));
-
-  /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */
-  TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
-
-  /* Get the TIMx CCER register value */
-  tmpccer = LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx SMCR register value */
-  tmpsmcr = LL_TIM_ReadReg(TIMx, SMCR);
-
-  /* Connect TIMx_CH1, CH2 and CH3 pins to the TI1 input */
-  tmpcr2 |= TIM_CR2_TI1S;
-
-  /* OC2REF signal is used as trigger output (TRGO) */
-  tmpcr2 |= LL_TIM_TRGO_OC2REF;
-
-  /* Configure the slave mode controller */
-  tmpsmcr &= (uint32_t)~(TIM_SMCR_TS | TIM_SMCR_SMS);
-  tmpsmcr |= LL_TIM_TS_TI1F_ED;
-  tmpsmcr |= LL_TIM_SLAVEMODE_RESET;
-
-  /* Configure input channel 1 */
-  tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F  | TIM_CCMR1_IC1PSC);
-  tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U);
-  tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U);
-  tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);
-
-  /* Configure input channel 2 */
-  tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE  | TIM_CCMR1_OC2PE  | TIM_CCMR1_OC2CE);
-  tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U);
-
-  /* Set Channel 1 polarity and enable Channel 1 and Channel2 */
-  tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP);
-  tmpccer |= (uint32_t)(TIM_HallSensorInitStruct->IC1Polarity);
-  tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E);
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx SMCR */
-  LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr);
-
-  /* Write to TIMx CCMR1 */
-  LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  /* Write to TIMx CCR2 */
-  LL_TIM_OC_SetCompareCH2(TIMx, TIM_HallSensorInitStruct->CommutationDelay);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Set the fields of the Break and Dead Time configuration data structure
-  *         to their default values.
-  * @param  TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure)
-  * @retval None
-  */
-void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
-{
-  /* Set the default configuration */
-  TIM_BDTRInitStruct->OSSRState       = LL_TIM_OSSR_DISABLE;
-  TIM_BDTRInitStruct->OSSIState       = LL_TIM_OSSI_DISABLE;
-  TIM_BDTRInitStruct->LockLevel       = LL_TIM_LOCKLEVEL_OFF;
-  TIM_BDTRInitStruct->DeadTime        = (uint8_t)0x00U;
-  TIM_BDTRInitStruct->BreakState      = LL_TIM_BREAK_DISABLE;
-  TIM_BDTRInitStruct->BreakPolarity   = LL_TIM_BREAK_POLARITY_LOW;
-  TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE;
-}
-
-/**
-  * @brief  Configure the Break and Dead Time feature of the timer instance.
-  * @note As the bits AOE, BKP, BKE, OSSR, OSSI and DTG[7:0] can be write-locked
-  *  depending on the LOCK configuration, it can be necessary to configure all of
-  *  them during the first write access to the TIMx_BDTR register.
-  * @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-  *       a timer instance provides a break input.
-  * @param  TIMx Timer Instance
-  * @param  TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure(Break and Dead Time configuration data structure)
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Break and Dead Time is initialized
-  *          - ERROR: not applicable
-  */
-ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
-{
-  uint32_t tmpbdtr = 0;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_BREAK_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OSSR_STATE(TIM_BDTRInitStruct->OSSRState));
-  assert_param(IS_LL_TIM_OSSI_STATE(TIM_BDTRInitStruct->OSSIState));
-  assert_param(IS_LL_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->LockLevel));
-  assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState));
-  assert_param(IS_LL_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->BreakPolarity));
-  assert_param(IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->AutomaticOutput));
-
-  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
-  the OSSI State, the dead time value and the Automatic Output Enable Bit */
-
-  /* Set the BDTR bits */
-  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput);
-  MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, TIM_BDTRInitStruct->AutomaticOutput);
-
-  /* Set TIMx_BDTR */
-  LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr);
-
-  return SUCCESS;
-}
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup TIM_LL_Private_Functions TIM Private Functions
- *  @brief   Private functions
-  * @{
-  */
-/**
-  * @brief  Configure the TIMx output channel 1.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer = LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S);
-
-  /* Set the Output Compare Mode */
-  MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState);
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
-
-    /* Set the complementary output Polarity */
-    MODIFY_REG(tmpccer, TIM_CCER_CC1NP, TIM_OCInitStruct->OCNPolarity << 2U);
-
-    /* Set the complementary output State */
-    MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U);
-
-    /* Set the Output Idle state */
-    MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState);
-
-    /* Set the complementary output Idle state */
-    MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U);
-  }
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR1 */
-  LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx output channel 2.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 2 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr1 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer =  LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR1 register value */
-  tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S);
-
-  /* Select the Output Compare Mode */
-  MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC2E, TIM_OCInitStruct->OCState << 4U);
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
-
-    /* Set the complementary output Polarity */
-    MODIFY_REG(tmpccer, TIM_CCER_CC2NP, TIM_OCInitStruct->OCNPolarity << 6U);
-
-    /* Set the complementary output State */
-    MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U);
-
-    /* Set the Output Idle state */
-    MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U);
-
-    /* Set the complementary output Idle state */
-    MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U);
-  }
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR1 */
-  LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH2(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx output channel 3.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC3_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
-
-  /* Disable the Channel 3: Reset the CC3E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer =  LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S);
-
-  /* Select the Output Compare Mode */
-  MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC3P, TIM_OCInitStruct->OCPolarity << 8U);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC3E, TIM_OCInitStruct->OCState << 8U);
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
-
-    /* Set the complementary output Polarity */
-    MODIFY_REG(tmpccer, TIM_CCER_CC3NP, TIM_OCInitStruct->OCNPolarity << 10U);
-
-    /* Set the complementary output State */
-    MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U);
-
-    /* Set the Output Idle state */
-    MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U);
-
-    /* Set the complementary output Idle state */
-    MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U);
-  }
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR2 */
-  LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx output channel 4.
-  * @param  TIMx Timer Instance
-  * @param  TIM_OCInitStruct pointer to the the TIMx output channel 4 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
-{
-  uint32_t tmpccmr2 = 0U;
-  uint32_t tmpccer = 0U;
-  uint32_t tmpcr2 = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_TIM_CC4_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
-  assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
-  assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
-
-  /* Get the TIMx CCER register value */
-  tmpccer = LL_TIM_ReadReg(TIMx, CCER);
-
-  /* Get the TIMx CR2 register value */
-  tmpcr2 =  LL_TIM_ReadReg(TIMx, CR2);
-
-  /* Get the TIMx CCMR2 register value */
-  tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
-
-  /* Reset Capture/Compare selection Bits */
-  CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S);
-
-  /* Select the Output Compare Mode */
-  MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U);
-
-  /* Set the Output Compare Polarity */
-  MODIFY_REG(tmpccer, TIM_CCER_CC4P, TIM_OCInitStruct->OCPolarity << 12U);
-
-  /* Set the Output State */
-  MODIFY_REG(tmpccer, TIM_CCER_CC4E, TIM_OCInitStruct->OCState << 12U);
-
-  if (IS_TIM_BREAK_INSTANCE(TIMx))
-  {
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
-    assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
-
-    /* Set the Output Idle state */
-    MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U);
-  }
-
-  /* Write to TIMx CR2 */
-  LL_TIM_WriteReg(TIMx, CR2, tmpcr2);
-
-  /* Write to TIMx CCMR2 */
-  LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2);
-
-  /* Set the Capture Compare Register value */
-  LL_TIM_OC_SetCompareCH4(TIMx, TIM_OCInitStruct->CompareValue);
-
-  /* Write to TIMx CCER */
-  LL_TIM_WriteReg(TIMx, CCER, tmpccer);
-
-  return SUCCESS;
-}
-
-
-/**
-  * @brief  Configure the TIMx input channel 1.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 1 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC1_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 1: Reset the CC1E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR1,
-             (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 16U);
-
-  /* Select the Polarity and set the CC1E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC1P | TIM_CCER_CC1NP),
-             (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E));
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx input channel 2.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 2 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC2_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 2: Reset the CC2E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC2E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR1,
-             (TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
-
-  /* Select the Polarity and set the CC2E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC2P | TIM_CCER_CC2NP),
-             ((TIM_ICInitStruct->ICPolarity << 4U) | TIM_CCER_CC2E));
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx input channel 3.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 3 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC3_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 3: Reset the CC3E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC3E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR2,
-             (TIM_CCMR2_CC3S | TIM_CCMR2_IC3F | TIM_CCMR2_IC3PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 16U);
-
-  /* Select the Polarity and set the CC3E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC3P | TIM_CCER_CC3NP),
-             ((TIM_ICInitStruct->ICPolarity << 8U) | TIM_CCER_CC3E));
-
-  return SUCCESS;
-}
-
-/**
-  * @brief  Configure the TIMx input channel 4.
-  * @param  TIMx Timer Instance
-  * @param  TIM_ICInitStruct pointer to the the TIMx input channel 4 configuration data structure
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: TIMx registers are de-initialized
-  *          - ERROR: not applicable
-  */
-static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
-{
-  /* Check the parameters */
-  assert_param(IS_TIM_CC4_INSTANCE(TIMx));
-  assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity));
-  assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput));
-  assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler));
-  assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
-
-  /* Disable the Channel 4: Reset the CC4E Bit */
-  TIMx->CCER &= (uint32_t)~TIM_CCER_CC4E;
-
-  /* Select the Input and set the filter and the prescaler value */
-  MODIFY_REG(TIMx->CCMR2,
-             (TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC),
-             (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
-
-  /* Select the Polarity and set the CC2E Bit */
-  MODIFY_REG(TIMx->CCER,
-             (TIM_CCER_CC4P | TIM_CCER_CC4NP),
-             ((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E));
-
-  return SUCCESS;
-}
-
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* TIM1 || TIM2 || TIM3  || TIM14 || TIM15 || TIM16 || TIM17 || TIM6 || TIM7 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_usart.c b/lib/hal-stm32f0/source/stm32f0xx_ll_usart.c
deleted file mode 100644
index d671b293..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_usart.c
+++ /dev/null
@@ -1,529 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_usart.c
-  * @author  MCD Application Team
-  * @brief   USART LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-#if defined(USE_FULL_LL_DRIVER)
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_usart.h"
-#include "stm32f0xx_ll_rcc.h"
-#include "stm32f0xx_ll_bus.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-#if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART4) || defined (USART5) || defined (USART6) || defined (USART7) || defined (USART8)
-
-/** @addtogroup USART_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup USART_LL_Private_Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup USART_LL_Private_Macros
-  * @{
-  */
-
-/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
- *              divided by the smallest oversampling used on the USART (i.e. 8)    */
-#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 6000000U)
-
-/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
-#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
-
-/* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
-#define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
-
-#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
-                                       || ((__VALUE__) == LL_USART_DIRECTION_RX) \
-                                       || ((__VALUE__) == LL_USART_DIRECTION_TX) \
-                                       || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
-
-#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
-                                    || ((__VALUE__) == LL_USART_PARITY_EVEN) \
-                                    || ((__VALUE__) == LL_USART_PARITY_ODD))
-
-#if defined(USART_7BITS_SUPPORT)
-#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
-                                       || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
-                                       || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
-#else
-#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
-                                       || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
-#endif
-
-#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
-                                          || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
-
-#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
-                                              || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
-
-#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
-                                        || ((__VALUE__) == LL_USART_PHASE_2EDGE))
-
-#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
-                                           || ((__VALUE__) == LL_USART_POLARITY_HIGH))
-
-#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
-                                         || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
-
-#if defined(USART_SMARTCARD_SUPPORT)
-#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
-                                      || ((__VALUE__) == LL_USART_STOPBITS_1) \
-                                      || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
-                                      || ((__VALUE__) == LL_USART_STOPBITS_2))
-#else
-#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_1) \
-                                      || ((__VALUE__) == LL_USART_STOPBITS_2))
-#endif
-
-#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
-                                       || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
-                                       || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
-                                       || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
-
-/**
-  * @}
-  */
-
-/* Private function prototypes -----------------------------------------------*/
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup USART_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup USART_LL_EF_Init
-  * @{
-  */
-
-/**
-  * @brief  De-initialize USART registers (Registers restored to their default values).
-  * @param  USARTx USART Instance
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: USART registers are de-initialized
-  *          - ERROR: USART registers are not de-initialized
-  */
-ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check the parameters */
-  assert_param(IS_UART_INSTANCE(USARTx));
-
-  if (USARTx == USART1)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART1);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART1);
-  }
-#if defined(USART2)
-  else if (USARTx == USART2)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
-  }
-#endif /* USART2 */
-#if defined(USART3)
-  else if (USARTx == USART3)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
-  }
-#endif /* USART3 */
-#if defined(USART4)
-  else if (USARTx == USART4)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
-  }
-#endif /* USART4 */
-#if defined(USART5)
-  else if (USARTx == USART5)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
-  }
-#endif /* USART5 */
-#if defined(USART6)
-  else if (USARTx == USART6)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART6);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART6);
-  }
-#endif /* USART6 */
-#if defined(USART7)
-  else if (USARTx == USART7)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART7);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART7);
-  }
-#endif /* USART7 */
-#if defined(USART8)
-  else if (USARTx == USART8)
-  {
-    /* Force reset of USART clock */
-    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART8);
-
-    /* Release reset of USART clock */
-    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART8);
-  }
-#endif /* USART8 */
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @brief  Initialize USART registers according to the specified
-  *         parameters in USART_InitStruct.
-  * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
-  *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
-  * @param  USARTx USART Instance
-  * @param  USART_InitStruct pointer to a LL_USART_InitTypeDef structure
-  *         that contains the configuration information for the specified USART peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
-  *          - ERROR: Problem occurred during USART Registers initialization
-  */
-ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
-{
-  ErrorStatus status = ERROR;
-  uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
-#if defined(STM32F030x8) || defined(STM32F030xC) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F051x8) || defined(STM32F058xx) || defined(STM32F070x6) || defined(STM32F070xB) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
-  LL_RCC_ClocksTypeDef RCC_Clocks;
-#endif
-
-  /* Check the parameters */
-  assert_param(IS_UART_INSTANCE(USARTx));
-  assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
-  assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
-  assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
-  assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
-  assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
-  assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
-  assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
-
-  /* USART needs to be in disabled state, in order to be able to configure some bits in
-     CRx registers */
-  if (LL_USART_IsEnabled(USARTx) == 0U)
-  {
-    /*---------------------------- USART CR1 Configuration ---------------------
-     * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
-     * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
-     * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
-     * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
-     * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
-     */
-    MODIFY_REG(USARTx->CR1,
-               (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
-                USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
-               (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
-                USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
-
-    /*---------------------------- USART CR2 Configuration ---------------------
-     * Configure USARTx CR2 (Stop bits) with parameters:
-     * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
-     * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
-     */
-    LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
-
-    /*---------------------------- USART CR3 Configuration ---------------------
-     * Configure USARTx CR3 (Hardware Flow Control) with parameters:
-     * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
-     */
-    LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
-
-    /*---------------------------- USART BRR Configuration ---------------------
-     * Retrieve Clock frequency used for USART Peripheral
-     */
-    if (USARTx == USART1)
-    {
-      periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
-    }
-#if defined(USART2)
-    else if (USARTx == USART2)
-    {
-#if defined (RCC_CFGR3_USART2SW)
-      periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
-#else
-      /* USART2 clock is PCLK */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-#endif
-    }
-#endif /* USART2 */
-#if defined(USART3)
-    else if (USARTx == USART3)
-    {
-#if defined (RCC_CFGR3_USART3SW)
-      periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
-#else
-      /* USART3 clock is PCLK */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-#endif
-    }
-#endif /* USART3 */
-#if defined(USART4)
-    else if (USARTx == USART4)
-    {
-      /* USART4 clock is PCLK */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-    }
-#endif /* USART4 */
-#if defined(USART5)
-    else if (USARTx == USART5)
-    {
-      /* USART5 clock is PCLK */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-    }
-#endif /* USART5 */
-#if defined(USART6)
-    else if (USARTx == USART6)
-    {
-      /* USART6 clock is PCLK */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-    }
-#endif /* USART6 */
-#if defined(USART7)
-    else if (USARTx == USART7)
-    {
-      /* USART7 clock is PCLK */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-    }
-#endif /* USART7 */
-#if defined(USART8)
-    else if (USARTx == USART8)
-    {
-      /* USART8 clock is PCLK */
-      LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
-      periphclk = RCC_Clocks.PCLK1_Frequency;
-    }
-#endif /* USART8 */
-    else
-    {
-      /* Nothing to do, as error code is already assigned to ERROR value */
-    }
-
-    /* Configure the USART Baud Rate :
-       - valid baud rate value (different from 0) is required
-       - Peripheral clock as returned by RCC service, should be valid (different from 0).
-    */
-    if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
-        && (USART_InitStruct->BaudRate != 0U))
-    {
-      status = SUCCESS;
-      LL_USART_SetBaudRate(USARTx,
-                           periphclk,
-                           USART_InitStruct->OverSampling,
-                           USART_InitStruct->BaudRate);
-
-      /* Check BRR is greater than or equal to 16d */
-      assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
-
-      /* Check BRR is greater than or equal to 16d */
-      assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
-    }
-  }
-  /* Endif (=> USART not in Disabled state => return ERROR) */
-
-  return (status);
-}
-
-/**
-  * @brief Set each @ref LL_USART_InitTypeDef field to default value.
-  * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
-  *                          whose fields will be set to default values.
-  * @retval None
-  */
-
-void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
-{
-  /* Set USART_InitStruct fields to default values */
-  USART_InitStruct->BaudRate            = 9600U;
-  USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
-  USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
-  USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
-  USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
-  USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
-  USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
-}
-
-/**
-  * @brief  Initialize USART Clock related settings according to the
-  *         specified parameters in the USART_ClockInitStruct.
-  * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
-  *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
-  * @param  USARTx USART Instance
-  * @param  USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
-  *         that contains the Clock configuration information for the specified USART peripheral.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
-  *          - ERROR: Problem occurred during USART Registers initialization
-  */
-ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check USART Instance and Clock signal output parameters */
-  assert_param(IS_UART_INSTANCE(USARTx));
-  assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
-
-  /* USART needs to be in disabled state, in order to be able to configure some bits in
-     CRx registers */
-  if (LL_USART_IsEnabled(USARTx) == 0U)
-  {
-    /*---------------------------- USART CR2 Configuration -----------------------*/
-    /* If Clock signal has to be output */
-    if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
-    {
-      /* Deactivate Clock signal delivery :
-       * - Disable Clock Output:        USART_CR2_CLKEN cleared
-       */
-      LL_USART_DisableSCLKOutput(USARTx);
-    }
-    else
-    {
-      /* Ensure USART instance is USART capable */
-      assert_param(IS_USART_INSTANCE(USARTx));
-
-      /* Check clock related parameters */
-      assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
-      assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
-      assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
-
-      /*---------------------------- USART CR2 Configuration -----------------------
-       * Configure USARTx CR2 (Clock signal related bits) with parameters:
-       * - Enable Clock Output:         USART_CR2_CLKEN set
-       * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
-       * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
-       * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
-       */
-      MODIFY_REG(USARTx->CR2,
-                 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
-                 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
-                 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
-    }
-  }
-  /* Else (USART not in Disabled state => return ERROR */
-  else
-  {
-    status = ERROR;
-  }
-
-  return (status);
-}
-
-/**
-  * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
-  * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
-  *                               whose fields will be set to default values.
-  * @retval None
-  */
-void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
-{
-  /* Set LL_USART_ClockInitStruct fields with default values */
-  USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
-  USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
-  USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
-  USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-#endif /* USART1 || USART2|| USART3 || USART4 || USART5 || USART6 || USART7 || USART8 */
-
-/**
-  * @}
-  */
-
-#endif /* USE_FULL_LL_DRIVER */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/lib/hal-stm32f0/source/stm32f0xx_ll_utils.c b/lib/hal-stm32f0/source/stm32f0xx_ll_utils.c
deleted file mode 100644
index 836204a0..00000000
--- a/lib/hal-stm32f0/source/stm32f0xx_ll_utils.c
+++ /dev/null
@@ -1,620 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx_ll_utils.c
-  * @author  MCD Application Team
-  * @brief   UTILS LL module driver.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f0xx_ll_rcc.h"
-#include "stm32f0xx_ll_utils.h"
-#include "stm32f0xx_ll_system.h"
-#ifdef  USE_FULL_ASSERT
-#include "stm32_assert.h"
-#else
-#define assert_param(expr) ((void)0U)
-#endif
-
-/** @addtogroup STM32F0xx_LL_Driver
-  * @{
-  */
-
-/** @addtogroup UTILS_LL
-  * @{
-  */
-
-/* Private types -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private constants ---------------------------------------------------------*/
-/** @addtogroup UTILS_LL_Private_Constants
-  * @{
-  */
-
-/* Defines used for PLL range */
-#define UTILS_PLL_OUTPUT_MIN        16000000U           /*!< Frequency min for PLL output, in Hz  */
-#define UTILS_PLL_OUTPUT_MAX        48000000U    /*!< Frequency max for PLL output, in Hz  */
-
-/* Defines used for HSE range */
-#define UTILS_HSE_FREQUENCY_MIN      4000000U       /*!< Frequency min for HSE frequency, in Hz   */
-#define UTILS_HSE_FREQUENCY_MAX     32000000U       /*!< Frequency max for HSE frequency, in Hz   */
-
-/* Defines used for FLASH latency according to SYSCLK Frequency */
-#define UTILS_LATENCY1_FREQ         24000000U        /*!< SYSCLK frequency to set FLASH latency 1 */
-/**
-  * @}
-  */
-/* Private macros ------------------------------------------------------------*/
-/** @addtogroup UTILS_LL_Private_Macros
-  * @{
-  */
-#define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8)   \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16)  \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64)  \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \
-                                        || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512))
-
-#define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_2) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_4) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_8) \
-                                      || ((__VALUE__) == LL_RCC_APB1_DIV_16))
-
-#define IS_LL_UTILS_PLLMUL_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_MUL_2) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_3) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_4) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_5) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_6) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_7) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_8) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_9) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_10) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_11) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_12) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_13) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_14) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_15) \
-                                          || ((__VALUE__) == LL_RCC_PLL_MUL_16))
-
-#define IS_LL_UTILS_PREDIV_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PREDIV_DIV_1)  || ((__VALUE__) == LL_RCC_PREDIV_DIV_2)   || \
-                                             ((__VALUE__) == LL_RCC_PREDIV_DIV_3)  || ((__VALUE__) == LL_RCC_PREDIV_DIV_4)   || \
-                                             ((__VALUE__) == LL_RCC_PREDIV_DIV_5)  || ((__VALUE__) == LL_RCC_PREDIV_DIV_6)   || \
-                                             ((__VALUE__) == LL_RCC_PREDIV_DIV_7)  || ((__VALUE__) == LL_RCC_PREDIV_DIV_8)   || \
-                                             ((__VALUE__) == LL_RCC_PREDIV_DIV_9)  || ((__VALUE__) == LL_RCC_PREDIV_DIV_10)  || \
-                                             ((__VALUE__) == LL_RCC_PREDIV_DIV_11) || ((__VALUE__) == LL_RCC_PREDIV_DIV_12)  || \
-                                             ((__VALUE__) == LL_RCC_PREDIV_DIV_13) || ((__VALUE__) == LL_RCC_PREDIV_DIV_14)  || \
-                                             ((__VALUE__) == LL_RCC_PREDIV_DIV_15) || ((__VALUE__) == LL_RCC_PREDIV_DIV_16))
-
-#define IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) ((UTILS_PLL_OUTPUT_MIN <= (__VALUE__)) && ((__VALUE__) <= UTILS_PLL_OUTPUT_MAX))
-
-
-#define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \
-                                        || ((__STATE__) == LL_UTILS_HSEBYPASS_OFF))
-
-#define IS_LL_UTILS_HSE_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) >= UTILS_HSE_FREQUENCY_MIN) && ((__FREQUENCY__) <= UTILS_HSE_FREQUENCY_MAX))
-/**
-  * @}
-  */
-/* Private function prototypes -----------------------------------------------*/
-/** @defgroup UTILS_LL_Private_Functions UTILS Private functions
-  * @{
-  */
-static uint32_t    UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency,
-                                               LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct);
-#if defined(FLASH_ACR_LATENCY)
-static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency);
-#endif /* FLASH_ACR_LATENCY */
-static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
-static ErrorStatus UTILS_PLL_IsBusy(void);
-/**
-  * @}
-  */
-
-/* Exported functions --------------------------------------------------------*/
-/** @addtogroup UTILS_LL_Exported_Functions
-  * @{
-  */
-
-/** @addtogroup UTILS_LL_EF_DELAY
-  * @{
-  */
-
-/**
-  * @brief  This function configures the Cortex-M SysTick source to have 1ms time base.
-  * @note   When a RTOS is used, it is recommended to avoid changing the Systick
-  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
-  * @param  HCLKFrequency HCLK frequency in Hz
-  * @note   HCLK frequency can be calculated thanks to RCC helper macro or function @ref LL_RCC_GetSystemClocksFreq
-  * @retval None
-  */
-void LL_Init1msTick(uint32_t HCLKFrequency)
-{
-  /* Use frequency provided in argument */
-  LL_InitTick(HCLKFrequency, 1000U);
-}
-
-/**
-  * @brief  This function provides accurate delay (in milliseconds) based
-  *         on SysTick counter flag
-  * @note   When a RTOS is used, it is recommended to avoid using blocking delay
-  *         and use rather osDelay service.
-  * @note   To respect 1ms timebase, user should call @ref LL_Init1msTick function which
-  *         will configure Systick to 1ms
-  * @param  Delay specifies the delay time length, in milliseconds.
-  * @retval None
-  */
-void LL_mDelay(uint32_t Delay)
-{
-  __IO uint32_t  tmp = SysTick->CTRL;  /* Clear the COUNTFLAG first */
-  /* Add this code to indicate that local variable is not used */
-  ((void)tmp);
-
-  /* Add a period to guaranty minimum wait */
-  if (Delay < LL_MAX_DELAY)
-  {
-    Delay++;
-  }
-
-  while (Delay)
-  {
-    if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U)
-    {
-      Delay--;
-    }
-  }
-}
-
-/**
-  * @}
-  */
-
-/** @addtogroup UTILS_EF_SYSTEM
-  *  @brief    System Configuration functions
-  *
-  @verbatim
- ===============================================================================
-           ##### System Configuration functions #####
- ===============================================================================
-    [..]
-         System, AHB and APB buses clocks configuration
-
-         (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 48000000 Hz.
-  @endverbatim
-  @internal
-             Depending on the SYSCLK frequency, the flash latency should be adapted accordingly:
-             (++) +-----------------------------------------------+
-             (++) | Latency       | SYSCLK clock frequency (MHz)  |
-             (++) |---------------|-------------------------------|
-             (++) |0WS(1CPU cycle)|       0 < SYSCLK <= 24        |
-             (++) |---------------|-------------------------------|
-             (++) |1WS(2CPU cycle)|      24 < SYSCLK <= 48        |
-             (++) +-----------------------------------------------+
-  @endinternal
-  * @{
-  */
-
-/**
-  * @brief  This function sets directly SystemCoreClock CMSIS variable.
-  * @note   Variable can be calculated also through SystemCoreClockUpdate function.
-  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
-  * @retval None
-  */
-void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
-{
-  /* HCLK clock frequency */
-  SystemCoreClock = HCLKFrequency;
-}
-
-/**
-  * @brief  This function configures system clock with HSI as clock source of the PLL
-  * @note   The application need to ensure that PLL is disabled.
-  * @note   Function is based on the following formula:
-  *         - PLL output frequency = ((HSI frequency / PREDIV) * PLLMUL)
-  *         - PREDIV: Set to 2 for few devices
-  *         - PLLMUL: The application software must set correctly the PLL multiplication factor to 
-  *                   be in the range 16-48MHz
-  * @note   FLASH latency can be modified through this function. 
-  * @param  UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
-  *                             the configuration information for the PLL.
-  * @param  UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
-  *                             the configuration information for the BUS prescalers.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Max frequency configuration done
-  *          - ERROR: Max frequency configuration not done
-  */
-ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
-                                         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  uint32_t pllfreq = 0U;
-
-  /* Check if one of the PLL is enabled */
-  if (UTILS_PLL_IsBusy() == SUCCESS)
-  {
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-    /* Check PREDIV value */
-    assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->PLLDiv));
-#else
-    /* Force PREDIV value to 2 */
-    UTILS_PLLInitStruct->Prediv = LL_RCC_PREDIV_DIV_2;
-#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
-    /* Calculate the new PLL output frequency */
-    pllfreq = UTILS_GetPLLOutputFrequency(HSI_VALUE, UTILS_PLLInitStruct);
-
-    /* Enable HSI if not enabled */
-    if (LL_RCC_HSI_IsReady() != 1U)
-    {
-      LL_RCC_HSI_Enable();
-      while (LL_RCC_HSI_IsReady() != 1U)
-      {
-        /* Wait for HSI ready */
-      }
-    }
-
-    /* Configure PLL */
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-    LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
-#else
-    LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI_DIV_2, UTILS_PLLInitStruct->PLLMul);
-#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
-
-    /* Enable PLL and switch system clock to PLL */
-    status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
-  }
-  else
-  {
-    /* Current PLL configuration cannot be modified */
-    status = ERROR;
-  }
-
-  return status;
-}
-
-#if defined(RCC_CFGR_SW_HSI48)
-/**
-  * @brief  This function configures system clock with HSI48 as clock source of the PLL
-  * @note   The application need to ensure that PLL is disabled.
-  * @note   Function is based on the following formula:
-  *         - PLL output frequency = ((HSI48 frequency / PREDIV) * PLLMUL)
-  *         - PLLMUL: The application software must set correctly the PLL multiplication factor to 
-  *                   be in the range 16-48MHz
-  * @param  UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
-  *                             the configuration information for the PLL.
-  * @param  UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
-  *                             the configuration information for the BUS prescalers.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Max frequency configuration done
-  *          - ERROR: Max frequency configuration not done
-  */
-ErrorStatus LL_PLL_ConfigSystemClock_HSI48(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
-                                         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  uint32_t pllfreq = 0U;
-
-  /* Check if one of the PLL is enabled */
-  if (UTILS_PLL_IsBusy() == SUCCESS)
-  {
-    /* Check PREDIV value */
-    assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->PLLDiv));
-
-    /* Calculate the new PLL output frequency */
-    pllfreq = UTILS_GetPLLOutputFrequency(HSI48_VALUE, UTILS_PLLInitStruct);
-
-    /* Enable HSI48 if not enabled */
-    if (LL_RCC_HSI48_IsReady() != 1U)
-    {
-      LL_RCC_HSI48_Enable();
-      while (LL_RCC_HSI48_IsReady() != 1U)
-      {
-        /* Wait for HSI48 ready */
-      }
-    }
-
-    /* Configure PLL */
-    LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI48, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
-
-    /* Enable PLL and switch system clock to PLL */
-    status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
-  }
-  else
-  {
-    /* Current PLL configuration cannot be modified */
-    status = ERROR;
-  }
-
-  return status;
-}
-
-#endif /*RCC_CFGR_SW_HSI48*/
-/**
-  * @brief  This function configures system clock with HSE as clock source of the PLL
-  * @note   The application need to ensure that PLL is disabled.
-  * @note   Function is based on the following formula:
-  *         - PLL output frequency = ((HSE frequency / PREDIV) * PLLMUL)
-  *         - PLLMUL: The application software must set correctly the PLL multiplication factor to 
-  *                   be in the range 16-48MHz
-  * @note   FLASH latency can be modified through this function. 
-  * @param  HSEFrequency Value between Min_Data = 4000000 and Max_Data = 32000000
-  * @param  HSEBypass This parameter can be one of the following values:
-  *         @arg @ref LL_UTILS_HSEBYPASS_ON
-  *         @arg @ref LL_UTILS_HSEBYPASS_OFF
-  * @param  UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
-  *                             the configuration information for the PLL.
-  * @param  UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
-  *                             the configuration information for the BUS prescalers.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Max frequency configuration done
-  *          - ERROR: Max frequency configuration not done
-  */
-ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
-                                         LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  uint32_t pllfreq = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_LL_UTILS_HSE_FREQUENCY(HSEFrequency));
-  assert_param(IS_LL_UTILS_HSE_BYPASS(HSEBypass));
-
-  /* Check if one of the PLL is enabled */
-  if (UTILS_PLL_IsBusy() == SUCCESS)
-  {
-    /* Check PREDIV value */
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-    assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->PLLDiv));
-#else
-    assert_param(IS_LL_UTILS_PREDIV_VALUE(UTILS_PLLInitStruct->Prediv));
-#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
-
-    /* Calculate the new PLL output frequency */
-    pllfreq = UTILS_GetPLLOutputFrequency(HSEFrequency, UTILS_PLLInitStruct);
-
-    /* Enable HSE if not enabled */
-    if (LL_RCC_HSE_IsReady() != 1U)
-    {
-      /* Check if need to enable HSE bypass feature or not */
-      if (HSEBypass == LL_UTILS_HSEBYPASS_ON)
-      {
-        LL_RCC_HSE_EnableBypass();
-      }
-      else
-      {
-        LL_RCC_HSE_DisableBypass();
-      }
-
-      /* Enable HSE */
-      LL_RCC_HSE_Enable();
-      while (LL_RCC_HSE_IsReady() != 1U)
-      {
-        /* Wait for HSE ready */
-      }
-    }
-
-      /* Configure PLL */
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-      LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
-#else
-    LL_RCC_PLL_ConfigDomain_SYS((RCC_CFGR_PLLSRC_HSE_PREDIV | UTILS_PLLInitStruct->Prediv), UTILS_PLLInitStruct->PLLMul);
-#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
-
-    /* Enable PLL and switch system clock to PLL */
-    status = UTILS_EnablePLLAndSwitchSystem(pllfreq, UTILS_ClkInitStruct);
-  }
-  else
-  {
-    /* Current PLL configuration cannot be modified */
-    status = ERROR;
-  }
-
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup UTILS_LL_Private_Functions
-  * @{
-  */
-/**
-  * @brief  Update number of Flash wait states in line with new frequency and current
-            voltage range.
-  * @param  Frequency  SYSCLK frequency
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: Latency has been modified
-  *          - ERROR: Latency cannot be modified
-  */
-#if defined(FLASH_ACR_LATENCY)
-static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency)
-{
-  ErrorStatus status = SUCCESS;
-
-  uint32_t latency = LL_FLASH_LATENCY_0;  /* default value 0WS */
-
-  /* Frequency cannot be equal to 0 */
-  if (Frequency == 0U)
-  {
-    status = ERROR;
-  }
-  else
-  {
-    if (Frequency > UTILS_LATENCY1_FREQ)
-    {
-      /* 24 < SYSCLK <= 48 => 1WS (2 CPU cycles) */
-      latency = LL_FLASH_LATENCY_1;
-    }
-    /* else SYSCLK < 24MHz default LL_FLASH_LATENCY_0 0WS */
-
-    LL_FLASH_SetLatency(latency);
-
-    /* Check that the new number of wait states is taken into account to access the Flash
-       memory by reading the FLASH_ACR register */
-    if (LL_FLASH_GetLatency() != latency)
-    {
-      status = ERROR;
-    }
-  }
-  return status;
-}
-#endif /* FLASH_ACR_LATENCY */
-
-/**
-  * @brief  Function to check that PLL can be modified
-  * @param  PLL_InputFrequency  PLL input frequency (in Hz)
-  * @param  UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains
-  *                             the configuration information for the PLL.
-  * @retval PLL output frequency (in Hz)
-  */
-static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct)
-{
-  uint32_t pllfreq = 0U;
-
-  /* Check the parameters */
-  assert_param(IS_LL_UTILS_PLLMUL_VALUE(UTILS_PLLInitStruct->PLLMul));
-
-  /* Check different PLL parameters according to RM                          */
-  /* The application software must set correctly the PLL multiplication factor to 
-     be in the range 16-48MHz */
-#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
-  pllfreq = __LL_RCC_CALC_PLLCLK_FREQ(PLL_InputFrequency, UTILS_PLLInitStruct->PLLMul, UTILS_PLLInitStruct->PLLDiv);
-#else
-  pllfreq = __LL_RCC_CALC_PLLCLK_FREQ(PLL_InputFrequency / (UTILS_PLLInitStruct->Prediv + 1U), UTILS_PLLInitStruct->PLLMul);
-#endif /*RCC_PLLSRC_PREDIV1_SUPPORT*/
-  assert_param(IS_LL_UTILS_PLL_FREQUENCY(pllfreq));
-
-  return pllfreq;
-}
-
-/**
-  * @brief  Function to check that PLL can be modified
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: PLL modification can be done
-  *          - ERROR: PLL is busy
-  */
-static ErrorStatus UTILS_PLL_IsBusy(void)
-{
-  ErrorStatus status = SUCCESS;
-
-  /* Check if PLL is busy*/
-  if (LL_RCC_PLL_IsReady() != 0U)
-  {
-    /* PLL configuration cannot be modified */
-    status = ERROR;
-  }
-
-  return status;
-}
-
-/**
-  * @brief  Function to enable PLL and switch system clock to PLL
-  * @param  SYSCLK_Frequency SYSCLK frequency
-  * @param  UTILS_ClkInitStruct pointer to a @ref LL_UTILS_ClkInitTypeDef structure that contains
-  *                             the configuration information for the BUS prescalers.
-  * @retval An ErrorStatus enumeration value:
-  *          - SUCCESS: No problem to switch system to PLL
-  *          - ERROR: Problem to switch system to PLL
-  */
-static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
-{
-  ErrorStatus status = SUCCESS;
-  uint32_t sysclk_frequency_current = 0U;
-
-  assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider));
-  assert_param(IS_LL_UTILS_APB1_DIV(UTILS_ClkInitStruct->APB1CLKDivider));
-
-  /* Calculate current SYSCLK frequency */
-  sysclk_frequency_current = (SystemCoreClock << AHBPrescTable[LL_RCC_GetAHBPrescaler() >> RCC_POSITION_HPRE]);
-
-  /* Increasing the number of wait states because of higher CPU frequency */
-  if (sysclk_frequency_current < SYSCLK_Frequency)
-  {
-    /* Set FLASH latency to highest latency */
-    status = UTILS_SetFlashLatency(SYSCLK_Frequency);
-  }
-
-  /* Update system clock configuration */
-  if (status == SUCCESS)
-  {
-    /* Enable PLL */
-    LL_RCC_PLL_Enable();
-    while (LL_RCC_PLL_IsReady() != 1U)
-    {
-      /* Wait for PLL ready */
-    }
-
-    /* Sysclk activation on the main PLL */
-    LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider);
-    LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
-    while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
-    {
-      /* Wait for system clock switch to PLL */
-    }
-
-    /* Set APB1 & APB2 prescaler*/
-    LL_RCC_SetAPB1Prescaler(UTILS_ClkInitStruct->APB1CLKDivider);
-  }
-
-  /* Decreasing the number of wait states because of lower CPU frequency */
-  if (sysclk_frequency_current > SYSCLK_Frequency)
-  {
-    /* Set FLASH latency to lowest latency */
-    status = UTILS_SetFlashLatency(SYSCLK_Frequency);
-  }
-
-  /* Update SystemCoreClock variable */
-  if (status == SUCCESS)
-  {
-    LL_SetSystemCoreClock(__LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider));
-  }
-
-  return status;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/