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author | Kevin O'Connor <kevin@koconnor.net> | 2018-07-31 11:01:24 -0400 |
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committer | Kevin O'Connor <kevin@koconnor.net> | 2018-08-06 23:36:05 -0400 |
commit | 742048a08d11982e98a1dc00c67a3974e6b5618c (patch) | |
tree | f7ff056f3484db64245e629b4e2ca7505559662c /lib/cmsis-sam3x8e/include/component/component_rstc.h | |
parent | e1146c04fd4b8d3f1de0c4fe202513c843868acb (diff) | |
download | kutter-742048a08d11982e98a1dc00c67a3974e6b5618c.tar.gz kutter-742048a08d11982e98a1dc00c67a3974e6b5618c.tar.xz kutter-742048a08d11982e98a1dc00c67a3974e6b5618c.zip |
lib: Remove the (now unused) cmsis-sam3x8e directory
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'lib/cmsis-sam3x8e/include/component/component_rstc.h')
-rw-r--r-- | lib/cmsis-sam3x8e/include/component/component_rstc.h | 73 |
1 files changed, 0 insertions, 73 deletions
diff --git a/lib/cmsis-sam3x8e/include/component/component_rstc.h b/lib/cmsis-sam3x8e/include/component/component_rstc.h deleted file mode 100644 index c22778aa..00000000 --- a/lib/cmsis-sam3x8e/include/component/component_rstc.h +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------------- - * SAM Software Package License - * ---------------------------------------------------------------------------- - * Copyright (c) 2012, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following condition is met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _SAM3XA_RSTC_COMPONENT_ -#define _SAM3XA_RSTC_COMPONENT_ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Reset Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3XA_RSTC Reset Controller */ -/*@{*/ - -#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) -/** \brief Rstc hardware registers */ -typedef struct { - WoReg RSTC_CR; /**< \brief (Rstc Offset: 0x00) Control Register */ - RoReg RSTC_SR; /**< \brief (Rstc Offset: 0x04) Status Register */ - RwReg RSTC_MR; /**< \brief (Rstc Offset: 0x08) Mode Register */ -} Rstc; -#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ -/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ -#define RSTC_CR_PROCRST (0x1u << 0) /**< \brief (RSTC_CR) Processor Reset */ -#define RSTC_CR_PERRST (0x1u << 2) /**< \brief (RSTC_CR) Peripheral Reset */ -#define RSTC_CR_EXTRST (0x1u << 3) /**< \brief (RSTC_CR) External Reset */ -#define RSTC_CR_KEY_Pos 24 -#define RSTC_CR_KEY_Msk (0xffu << RSTC_CR_KEY_Pos) /**< \brief (RSTC_CR) Password */ -#define RSTC_CR_KEY(value) ((RSTC_CR_KEY_Msk & ((value) << RSTC_CR_KEY_Pos))) -/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ -#define RSTC_SR_URSTS (0x1u << 0) /**< \brief (RSTC_SR) User Reset Status */ -#define RSTC_SR_RSTTYP_Pos 8 -#define RSTC_SR_RSTTYP_Msk (0x7u << RSTC_SR_RSTTYP_Pos) /**< \brief (RSTC_SR) Reset Type */ -#define RSTC_SR_NRSTL (0x1u << 16) /**< \brief (RSTC_SR) NRST Pin Level */ -#define RSTC_SR_SRCMP (0x1u << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ -/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ -#define RSTC_MR_URSTEN (0x1u << 0) /**< \brief (RSTC_MR) User Reset Enable */ -#define RSTC_MR_URSTIEN (0x1u << 4) /**< \brief (RSTC_MR) User Reset Interrupt Enable */ -#define RSTC_MR_ERSTL_Pos 8 -#define RSTC_MR_ERSTL_Msk (0xfu << RSTC_MR_ERSTL_Pos) /**< \brief (RSTC_MR) External Reset Length */ -#define RSTC_MR_ERSTL(value) ((RSTC_MR_ERSTL_Msk & ((value) << RSTC_MR_ERSTL_Pos))) -#define RSTC_MR_KEY_Pos 24 -#define RSTC_MR_KEY_Msk (0xffu << RSTC_MR_KEY_Pos) /**< \brief (RSTC_MR) Password */ -#define RSTC_MR_KEY(value) ((RSTC_MR_KEY_Msk & ((value) << RSTC_MR_KEY_Pos))) - -/*@}*/ - - -#endif /* _SAM3XA_RSTC_COMPONENT_ */ |