serial: Add Fysetc Cheetah board specific reset sequence

Fysetc Cheetah v1.2 boards require a special sequence to reset reliably.
This sequence works for me in all cases. Simpler sequences without
double reset did not work correctly. This is likely because of a weird
stateful circuitry for toggling the bootloader state.

Cheetah boards use RTS to configure bootloader triggering. By default,
pySerial sets RTS on connect, which unfortunately configures the board
to start the bootloader on reset.

Add a toggle for the RTS state to allow users to workaround. The RTS state
is set before the serial connection is opened, so there are no glitches.

Addresses #2026.

Signed-off-by: Grigori Goronzy <greg@chown.ath.cx>

1 files changed, 32 insertions, 2 deletions

diff --git a/klippy/serialhdl.py b/klippy/serialhdl.py
index bc8a9d3c..46e31ed4 100644
--- a/klippy/serialhdl.py
+++ b/klippy/serialhdl.py
@@ -13,12 +13,13 @@ class error(Exception):
 
 class SerialReader:
     BITS_PER_BYTE = 10.
-    def __init__(self, reactor, serialport, baud):
+    def __init__(self, reactor, serialport, baud, rts=True):
         self.reactor = reactor
         self.serialport = serialport
         self.baud = baud
         # Serial port
         self.ser = None
+        self.rts = rts
         self.msgparser = msgproto.MessageParser()
         # C interface
         self.ffi_main, self.ffi_lib = chelper.get_ffi()
@@ -85,7 +86,10 @@ class SerialReader:
             try:
                 if self.baud:
                     self.ser = serial.Serial(
-                        self.serialport, self.baud, timeout=0, exclusive=True)
+                        baudrate=self.baud, timeout=0, exclusive=True)
+                    self.ser.port = self.serialport
+                    self.ser.rts = self.rts
+                    self.ser.open()
                 else:
                     self.ser = open(self.serialport, 'rb+')
             except (OSError, IOError, serial.SerialException) as e:
@@ -266,6 +270,32 @@ def stk500v2_leave(ser, reactor):
     logging.debug("Got %s from stk500v2", repr(res))
     ser.baudrate = origbaud
 
+def cheetah_reset(serialport, reactor):
+    # Fysetc Cheetah v1.2 boards have a weird stateful circuitry for
+    # configuring the bootloader. This sequence takes care of disabling it for
+    # sure.
+    # Open the serial port with RTS asserted
+    ser = serial.Serial(baudrate=2400, timeout=0, exclusive=True)
+    ser.port = serialport
+    ser.rts = True
+    ser.open()
+    ser.read(1)
+    reactor.pause(reactor.monotonic() + 0.100)
+    # Toggle DTR
+    ser.dtr = True
+    reactor.pause(reactor.monotonic() + 0.100)
+    ser.dtr = False
+    # Deassert RTS
+    reactor.pause(reactor.monotonic() + 0.100)
+    ser.rts = False
+    reactor.pause(reactor.monotonic() + 0.100)
+    # Toggle DTR again
+    ser.dtr = True
+    reactor.pause(reactor.monotonic() + 0.100)
+    ser.dtr = False
+    reactor.pause(reactor.monotonic() + 0.100)
+    ser.close()
+
 # Attempt an arduino style reset on a serial port
 def arduino_reset(serialport, reactor):
     # First try opening the port at a different baud