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authorMRX8024 <57844100+MRX8024@users.noreply.github.com>2025-03-24 12:46:41 +0200
committerKevinOConnor <kevin@koconnor.net>2025-04-03 14:08:23 -0400
commit81a1a03ed07de873b2c43d20fbcaa1e8804f81ad (patch)
tree851f64d36e4faf66b079100e4cdf9b60d0ffdf0b /klippy/extras
parent869440a7edb6d999c292e27550e79458116c9781 (diff)
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icm20948: Formatting refactor
Signed-off-by: Maksim Bolgov maksim8024@gmail.com
Diffstat (limited to 'klippy/extras')
-rw-r--r--klippy/extras/icm20948.py53
1 files changed, 24 insertions, 29 deletions
diff --git a/klippy/extras/icm20948.py b/klippy/extras/icm20948.py
index 29eece7b..92b89cc0 100644
--- a/klippy/extras/icm20948.py
+++ b/klippy/extras/icm20948.py
@@ -12,42 +12,40 @@
import logging
from . import bus, adxl345, bulk_sensor
-ICM20948_ADDR = 0x68
+ICM20948_ADDR = 0x68
ICM_DEV_IDS = {
0xEA: "icm-20948",
#everything above are normal ICM IDs
- }
-
+}
# ICM20948 registers
-REG_DEVID = 0x00 # 0xEA
-REG_FIFO_EN = 0x67 # FIFO_EN_2
-REG_ACCEL_SMPLRT_DIV1 = 0x10 # MSB
-REG_ACCEL_SMPLRT_DIV2 = 0x11 # LSB
-REG_ACCEL_CONFIG = 0x14
-REG_USER_CTRL = 0x03
-REG_PWR_MGMT_1 = 0x06
-REG_PWR_MGMT_2 = 0x07
-REG_INT_STATUS = 0x19
-REG_BANK_SEL = 0x7F
+REG_DEVID = 0x00 # 0xEA
+REG_FIFO_EN = 0x67 # FIFO_EN_2
+REG_ACCEL_SMPLRT_DIV1 = 0x10 # MSB
+REG_ACCEL_SMPLRT_DIV2 = 0x11 # LSB
+REG_ACCEL_CONFIG = 0x14
+REG_USER_CTRL = 0x03
+REG_PWR_MGMT_1 = 0x06
+REG_PWR_MGMT_2 = 0x07
+REG_INT_STATUS = 0x19
+REG_BANK_SEL = 0x7F
SAMPLE_RATE_DIVS = { 4500: 0x00 }
-#SET_CONFIG = 0x01 # FIFO mode 'stream' style
-SET_BANK_0 = 0x00
-SET_BANK_1 = 0x10
-SET_BANK_2 = 0x20
-SET_BANK_3 = 0x30
-SET_ACCEL_CONFIG = 0x06 # 16g full scale, 1209Hz BW, ??? delay 4.5kHz samp rate
-SET_PWR_MGMT_1_WAKE = 0x01
-SET_PWR_MGMT_1_SLEEP= 0x41
+SET_BANK_0 = 0x00
+SET_BANK_1 = 0x10
+SET_BANK_2 = 0x20
+SET_BANK_3 = 0x30
+SET_ACCEL_CONFIG = 0x06 # 16g full scale, 1209Hz BW, 4.5kHz samp rate
+SET_PWR_MGMT_1_WAKE = 0x01
+SET_PWR_MGMT_1_SLEEP = 0x41
SET_PWR_MGMT_2_ACCEL_ON = 0x07
-SET_PWR_MGMT_2_OFF = 0x3F
-SET_USER_FIFO_RESET = 0x0E
-SET_USER_FIFO_EN = 0x40
-SET_ENABLE_FIFO = 0x10
-SET_DISABLE_FIFO = 0x00
+SET_PWR_MGMT_2_OFF = 0x3F
+SET_USER_FIFO_RESET = 0x0E
+SET_USER_FIFO_EN = 0x40
+SET_ENABLE_FIFO = 0x10
+SET_DISABLE_FIFO = 0x00
FREEFALL_ACCEL = 9.80665 * 1000.
# SCALE = 1/2048 g/LSB @16g scale * Earth gravity in mm/s**2
@@ -129,7 +127,6 @@ class ICM20948:
% (dev_id))
else:
logging.info("Found %s with id %x"% (ICM_DEV_IDS[dev_id], dev_id))
-
# Setup chip in requested query rate
self.set_reg(REG_PWR_MGMT_1, SET_PWR_MGMT_1_WAKE)
self.set_reg(REG_PWR_MGMT_2, SET_PWR_MGMT_2_ACCEL_ON)
@@ -137,7 +134,6 @@ class ICM20948:
self.read_reg(REG_DEVID) # Dummy read to ensure queues flushed
self.set_reg(REG_ACCEL_SMPLRT_DIV1, SAMPLE_RATE_DIVS[self.data_rate])
self.set_reg(REG_ACCEL_SMPLRT_DIV2, SAMPLE_RATE_DIVS[self.data_rate])
- # self.set_reg(REG_CONFIG, SET_CONFIG) # No config register
self.set_reg(REG_BANK_SEL, SET_BANK_2)
self.set_reg(REG_ACCEL_CONFIG, SET_ACCEL_CONFIG)
self.set_reg(REG_BANK_SEL, SET_BANK_0)
@@ -146,7 +142,6 @@ class ICM20948:
self.set_reg(REG_USER_CTRL, SET_USER_FIFO_RESET)
self.set_reg(REG_USER_CTRL, SET_USER_FIFO_EN)
self.read_reg(REG_INT_STATUS) # clear FIFO overflow flag
-
# Start bulk reading
rest_ticks = self.mcu.seconds_to_clock(4. / self.data_rate)
self.query_icm20948_cmd.send([self.oid, rest_ticks])