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| author | Grigori Goronzy <greg@chown.ath.cx> | 2018-07-02 23:17:28 +0200 |
|---|---|---|
| committer | KevinOConnor <kevin@koconnor.net> | 2018-07-07 11:05:33 -0400 |
| commit | 5c7c8c984b582304d1f1c36de0f1d9bacbd8d42d (patch) | |
| tree | 780781bf7d848453eabf4b8364addfb04478df88 /docs/stm32f1.md | |
| parent | b0ee323e2e01ba2084bea8de733f16474f1167eb (diff) | |
| download | kutter-5c7c8c984b582304d1f1c36de0f1d9bacbd8d42d.tar.gz kutter-5c7c8c984b582304d1f1c36de0f1d9bacbd8d42d.tar.xz kutter-5c7c8c984b582304d1f1c36de0f1d9bacbd8d42d.zip | |
stm32f1: add SPI support
Add basic SPI support and associated documentation.
v2: remove baud rate check, fix baud rate calculations
v3: finish transaction with BSY check, disable SPI when not in use
Signed-off-by: Grigori Goronzy <greg@chown.ath.cx>
Diffstat (limited to 'docs/stm32f1.md')
| -rw-r--r-- | docs/stm32f1.md | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/docs/stm32f1.md b/docs/stm32f1.md index c75dd304..04868ec6 100644 --- a/docs/stm32f1.md +++ b/docs/stm32f1.md @@ -22,7 +22,8 @@ Fixed pins The UART used for communication with the host is fixed to pins PA9 (TX) and PA10 (RX). SWD pins (PA13/PA14) are enabled for debugging and cannot be used for any -I/O. +I/O. SPI uses pins PB13/PB14/PB15, but the pins can be used as general I/O if +SPI is not used. Digital I/O =========== @@ -44,4 +45,5 @@ PC0-PC5). SPI === -SPI support is currently unimplemented. +SPI uses pin PB13 (SCK), PB14 (MISO) and PB15 (MOSI). The clock speed range is +0.15..18 MHz. Chip select pins do not have any restrictions. |