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| author | Kevin O'Connor <kevin@koconnor.net> | 2019-07-28 22:42:41 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2019-07-28 22:55:48 -0400 |
| commit | e6ffef9a9ff4804aad5a7d9ae709ceebd4b93c92 (patch) | |
| tree | a1f19a1c78ca9e8d17a16e816b83d603985fd1f1 | |
| parent | 9bc3a29ee4ce2816c00564c7f432a9bef94fbee2 (diff) | |
| download | kutter-e6ffef9a9ff4804aad5a7d9ae709ceebd4b93c92.tar.gz kutter-e6ffef9a9ff4804aad5a7d9ae709ceebd4b93c92.tar.xz kutter-e6ffef9a9ff4804aad5a7d9ae709ceebd4b93c92.zip | |
stm32f4: Make using the internal clock source a low level option
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/stm32f4/Kconfig | 10 | ||||
| -rw-r--r-- | src/stm32f4/clock.c | 8 |
2 files changed, 11 insertions, 7 deletions
diff --git a/src/stm32f4/Kconfig b/src/stm32f4/Kconfig index 1a019be4..dc27dae3 100644 --- a/src/stm32f4/Kconfig +++ b/src/stm32f4/Kconfig @@ -50,12 +50,16 @@ config STACK_SIZE default 512 choice - prompt "Clock Reference" - config STM32F4_CLOCK_REF_8M + prompt "Clock Reference" if LOW_LEVEL_OPTIONS + config STM32_CLOCK_REF_8M bool "8Mhz crystal" - config STM32F4_CLOCK_REF_INTERNAL + config STM32_CLOCK_REF_INTERNAL bool "Internal clock" endchoice +config CLOCK_REF_8M + bool + default n if STM32_CLOCK_REF_INTERNAL + default y config SERIAL bool diff --git a/src/stm32f4/clock.c b/src/stm32f4/clock.c index e61fee53..d0a2f249 100644 --- a/src/stm32f4/clock.c +++ b/src/stm32f4/clock.c @@ -4,7 +4,7 @@ // // This file may be distributed under the terms of the GNU GPLv3 license. -#include "autoconf.h" // CONFIG_STM32F4_CLOCK_REF_8M +#include "autoconf.h" // CONFIG_CLOCK_REF_8M #include "command.h" // DECL_CONSTANT_STR #include "internal.h" // enable_pclock @@ -76,7 +76,7 @@ gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (0x02 << m_shift); } -#if CONFIG_STM32F4_CLOCK_REF_8M +#if CONFIG_CLOCK_REF_8M DECL_CONSTANT_STR("RESERVE_PINS_crystal", "PH0,PH1"); #endif @@ -85,7 +85,7 @@ static void enable_clock_stm32f40x(void) { #if CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407 - if (CONFIG_STM32F4_CLOCK_REF_8M) { + if (CONFIG_CLOCK_REF_8M) { // Configure 168Mhz PLL from external 8Mhz crystal (HSE) RCC->CR |= RCC_CR_HSEON; RCC->PLLCFGR = ( @@ -107,7 +107,7 @@ static void enable_clock_stm32f446(void) { #if CONFIG_MACH_STM32F446 - if (CONFIG_STM32F4_CLOCK_REF_8M) { + if (CONFIG_CLOCK_REF_8M) { // Configure 180Mhz PLL from external 8Mhz crystal (HSE) RCC->CR |= RCC_CR_HSEON; RCC->PLLCFGR = ( |