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author | Kevin O'Connor <kevin@koconnor.net> | 2022-02-10 17:20:49 -0500 |
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committer | Kevin O'Connor <kevin@koconnor.net> | 2022-02-10 18:12:01 -0500 |
commit | e3cbe7ea3663a8cd10207a9aecc4e5458aeb1f1f (patch) | |
tree | 7a0e0ce17b7cdea424102ac15edf0335d9e29f7c | |
parent | 99d55185a21703611b862f6ce4b80bba70a9c4b5 (diff) | |
download | kutter-e3cbe7ea3663a8cd10207a9aecc4e5458aeb1f1f.tar.gz kutter-e3cbe7ea3663a8cd10207a9aecc4e5458aeb1f1f.tar.xz kutter-e3cbe7ea3663a8cd10207a9aecc4e5458aeb1f1f.zip |
stm32: Clear SPE flag on a change to SPI CR1 register
The stm32 specs indicate that the SPE bit must be cleared before
changing the CPHA or CPOL bits.
Reported by @cbc02009 and @bigtreetech.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
-rw-r--r-- | src/stm32/spi.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/stm32/spi.c b/src/stm32/spi.c index f1ba33cf..3afe342a 100644 --- a/src/stm32/spi.c +++ b/src/stm32/spi.c @@ -100,6 +100,12 @@ void spi_prepare(struct spi_config config) { SPI_TypeDef *spi = config.spi; + uint32_t cr1 = spi->CR1; + if (cr1 == config.spi_cr1) + return; + // The SPE bit must be disabled before changing CPOL/CPHA bits + spi->CR1 = cr1 & ~SPI_CR1_SPE; + spi->CR1; // Force flush of previous write spi->CR1 = config.spi_cr1; } |