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| author | Kevin O'Connor <kevin@koconnor.net> | 2022-03-11 14:12:11 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2022-03-11 14:12:11 -0500 |
| commit | e3beafbdb4f2ac3f889f81aec0cad5ec473c8612 (patch) | |
| tree | 2945afbfb5aae44c2d126c13c6ea34681a8be851 | |
| parent | 24e7bbf0df9cbc220991f3be3a09a847cd818ba2 (diff) | |
| download | kutter-e3beafbdb4f2ac3f889f81aec0cad5ec473c8612.tar.gz kutter-e3beafbdb4f2ac3f889f81aec0cad5ec473c8612.tar.xz kutter-e3beafbdb4f2ac3f889f81aec0cad5ec473c8612.zip | |
stm32: Clarify CCIPR2 setting in stm32g0.c
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/stm32/stm32g0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/stm32/stm32g0.c b/src/stm32/stm32g0.c index d3815328..6cb7c54c 100644 --- a/src/stm32/stm32g0.c +++ b/src/stm32/stm32g0.c @@ -95,7 +95,7 @@ clock_setup(void) ; // Use PLLQCLK for USB (setting USBSEL=2 works in practice) - RCC->CCIPR2 = RCC_CCIPR2_USBSEL_1; + RCC->CCIPR2 = 2 << RCC_CCIPR2_USBSEL_Pos; } |