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| author | Kevin O'Connor <kevin@koconnor.net> | 2025-05-28 14:55:21 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2025-05-30 15:15:13 -0400 |
| commit | de182b1d144accfbb43c46bcda38a761f13f0f96 (patch) | |
| tree | 741b8175bb03c6080d5f971898c73636e0f8eb9c | |
| parent | f5956b539557a9937115c3bed1ad7dc8769db3d4 (diff) | |
| download | kutter-de182b1d144accfbb43c46bcda38a761f13f0f96.tar.gz kutter-de182b1d144accfbb43c46bcda38a761f13f0f96.tar.xz kutter-de182b1d144accfbb43c46bcda38a761f13f0f96.zip | |
stm32: Support using CANBUS on PB5/PB6 on stm32h7 chips
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/stm32/Kconfig | 4 | ||||
| -rw-r--r-- | src/stm32/stm32h7.c | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/src/stm32/Kconfig b/src/stm32/Kconfig index e78fda5e..0c240bb2 100644 --- a/src/stm32/Kconfig +++ b/src/stm32/Kconfig @@ -463,7 +463,7 @@ choice select CANSERIAL config STM32_MMENU_CANBUS_PB5_PB6 bool "CAN bus (on PB5/PB6)" if LOW_LEVEL_OPTIONS - depends on (MACH_STM32F4 && HAVE_STM32_CANBUS) + depends on (MACH_STM32F4 && HAVE_STM32_CANBUS) || MACH_STM32H7 select CANSERIAL config STM32_MMENU_CANBUS_PB12_PB13 bool "CAN bus (on PB12/PB13)" if LOW_LEVEL_OPTIONS @@ -503,7 +503,7 @@ choice depends on (MACH_STM32F4 && HAVE_STM32_CANBUS) config STM32_CMENU_CANBUS_PB5_PB6 bool "CAN bus (on PB5/PB6)" - depends on (MACH_STM32F4 && HAVE_STM32_CANBUS) || MACH_STM32G0B1 + depends on (MACH_STM32F4 && HAVE_STM32_CANBUS) || MACH_STM32H7 || MACH_STM32G0B1 config STM32_CMENU_CANBUS_PB12_PB13 bool "CAN bus (on PB12/PB13)" depends on (MACH_STM32F4 && HAVE_STM32_CANBUS) || HAVE_STM32_FDCANBUS diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index 74732624..f65eeed7 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -49,6 +49,10 @@ lookup_clock_line(uint32_t periph_base) uint32_t bit = 1 << ((periph_base - D2_APB2PERIPH_BASE) / 0x400); return (struct cline){.en=&RCC->APB2ENR, .rst=&RCC->APB2RSTR, .bit=bit}; } else { + if (periph_base == FDCAN2_BASE) + // FDCAN1 and FDCAN2 share same clock enable + return (struct cline){.en=&RCC->APB1HENR, .rst=&RCC->APB1HRSTR, + .bit = RCC_APB1HENR_FDCANEN}; uint32_t offset = ((periph_base - D2_APB1PERIPH_BASE) / 0x400); if (offset < 32) { uint32_t bit = 1 << offset; |