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| author | Arkadiusz Raj <arek@raj.priv.pl> | 2021-02-19 16:32:28 +0000 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2021-02-19 12:14:55 -0500 |
| commit | a6e28f7d6aec3299f124605849cee4766da8217c (patch) | |
| tree | 476c6b4c69ad09818ebe4c6a9ededd86fffd93df | |
| parent | 7f63efdcea701478a845aad51fdca5fcf4fa8d9e (diff) | |
| download | kutter-a6e28f7d6aec3299f124605849cee4766da8217c.tar.gz kutter-a6e28f7d6aec3299f124605849cee4766da8217c.tar.xz kutter-a6e28f7d6aec3299f124605849cee4766da8217c.zip | |
stm32: Fix missing STM32F429 clock initialization
Signed-off-by: Arkadiusz Raj <arek.raj@gmail.com>
| -rw-r--r-- | src/stm32/stm32f4.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/stm32/stm32f4.c b/src/stm32/stm32f4.c index fee715c7..8656495b 100644 --- a/src/stm32/stm32f4.c +++ b/src/stm32/stm32f4.c @@ -143,7 +143,8 @@ enable_clock_stm32f20x(void) static void enable_clock_stm32f40x(void) { -#if CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407 || CONFIG_MACH_STM32F401 +#if CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407 \ + || CONFIG_MACH_STM32F401 || CONFIG_MACH_STM32F429 uint32_t pll_base = 2000000, pll_freq = CONFIG_CLOCK_FREQ * 2, pllcfgr; if (!CONFIG_STM32_CLOCK_REF_INTERNAL) { // Configure 168Mhz PLL from external crystal (HSE) @@ -219,7 +220,7 @@ clock_setup(void) if (CONFIG_MACH_STM32F207) enable_clock_stm32f20x(); else if (CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407 - || CONFIG_MACH_STM32F401) + || CONFIG_MACH_STM32F401 || CONFIG_MACH_STM32F429) enable_clock_stm32f40x(); else enable_clock_stm32f446(); |