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| author | Kevin O'Connor <kevin@koconnor.net> | 2022-12-13 00:00:33 -0500 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2023-01-17 18:22:21 -0500 |
| commit | 9b7dcfa3337b4874c92e9009b323f828a06ff5a4 (patch) | |
| tree | c34c6f608e1c2b8e530b401adcf0ebbd8bb68089 | |
| parent | e631840ad6e7e186a3a568c9e1366f419b8dc778 (diff) | |
| download | kutter-9b7dcfa3337b4874c92e9009b323f828a06ff5a4.tar.gz kutter-9b7dcfa3337b4874c92e9009b323f828a06ff5a4.tar.xz kutter-9b7dcfa3337b4874c92e9009b323f828a06ff5a4.zip | |
stm32: No need for LDORDY check in stm32h7_adc.c
Not all chips have the LDORDY flag, while all chips will stabilize in
10us. There is no need for two different implementations as it is
safe to wait 20us on all chips.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/stm32/stm32h7_adc.c | 21 |
1 files changed, 4 insertions, 17 deletions
diff --git a/src/stm32/stm32h7_adc.c b/src/stm32/stm32h7_adc.c index a42ff587..1d15cc85 100644 --- a/src/stm32/stm32h7_adc.c +++ b/src/stm32/stm32h7_adc.c @@ -29,11 +29,6 @@ #define OVERSAMPLES_EXPONENT 3 #define OVERSAMPLES (1 << OVERSAMPLES_EXPONENT) - // LDORDY registers are missing from CMSIS (only available on revision V!) - #define ADC_ISR_LDORDY_Pos (12U) - #define ADC_ISR_LDORDY_Msk (0x1UL << ADC_ISR_LDORDY_Pos) - #define ADC_ISR_LDORDY ADC_ISR_LDORDY_Msk - #elif CONFIG_MACH_STM32L4 #define ADCIN_BANK_SIZE (19) #define RCC_AHBENR_ADC (RCC->AHB2ENR) @@ -258,18 +253,10 @@ gpio_adc_setup(uint32_t pin) MODIFY_REG(adc->CR, ADC_CR_DEEPPWD_Msk, 0); // Switch on voltage regulator adc->CR |= ADC_CR_ADVREGEN; -#ifdef ADC_ISR_LDORDY - if (is_stm32h723_adc3 == 0) { - while(!(adc->ISR & ADC_ISR_LDORDY)) - ; - } else -#endif - { - // stm32h723 ADC3 & stm32l4 lacks ldordy, delay to spec instead - uint32_t end = timer_read_time() + timer_from_us(20); - while (timer_is_before(timer_read_time(), end)) - ; - } + // Wait for voltage regulator to stabilize + uint32_t end = timer_read_time() + timer_from_us(20); + while (timer_is_before(timer_read_time(), end)) + ; // Set Boost mode for 25Mhz < ADC clock <= 50Mhz #ifdef ADC_CR_BOOST |