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| author | Kevin O'Connor <kevin@koconnor.net> | 2025-04-22 00:13:32 -0400 |
|---|---|---|
| committer | Kevin O'Connor <kevin@koconnor.net> | 2025-04-28 19:36:55 -0400 |
| commit | 7f4f696f104d073eeacb749e3238d5f8516fd591 (patch) | |
| tree | f7d3648dd6d222a3a8adbfe50a9751bad4e1c178 | |
| parent | 9c37a918db03eb456dd0a6c4c072f2b544d8f569 (diff) | |
| download | kutter-7f4f696f104d073eeacb749e3238d5f8516fd591.tar.gz kutter-7f4f696f104d073eeacb749e3238d5f8516fd591.tar.xz kutter-7f4f696f104d073eeacb749e3238d5f8516fd591.zip | |
stm32: Don't try to set incorrect PWR->CR3 register on stm32h7
It's not valid to set BYPASS and LDOEN at the same time.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
| -rw-r--r-- | src/stm32/stm32h7.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index 79d4ab99..bac39c96 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -128,17 +128,15 @@ clock_setup(void) while (!(PWR->D3CR & PWR_D3CR_VOSRDY)) ; - // Enable VOS0 (overdrive) + // Enable VOS0 (overdrive) on stm32h743/stm32h750 +#if !CONFIG_MACH_STM32H723 if (CONFIG_CLOCK_FREQ > 400000000) { enable_pclock((uint32_t)SYSCFG); -#if !CONFIG_MACH_STM32H723 SYSCFG->PWRCR |= SYSCFG_PWRCR_ODEN; -#else - PWR->CR3 |= PWR_CR3_BYPASS; -#endif while (!(PWR->D3CR & PWR_D3CR_VOSRDY)) ; } +#endif SCB_EnableICache(); SCB_EnableDCache(); |