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authorKevin O'Connor <kevin@koconnor.net>2025-04-28 20:05:59 -0400
committerKevin O'Connor <kevin@koconnor.net>2025-05-02 11:44:31 -0400
commit7b697105b32cf48dfe677e047935d413f3324775 (patch)
treec723ce2cf759586c521edf1d1867260426b71431
parent3cf8899a5aee9da0bfe9717b210e7162624a7cd8 (diff)
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stm32: Use 12Mhz nominal internal clock in stm32f0_i2c.c
Increase the internal nominal clock from 8Mhz to 12Mhz - this improves support for higher chip frequencies. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
-rw-r--r--src/stm32/stm32f0_i2c.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/stm32/stm32f0_i2c.c b/src/stm32/stm32f0_i2c.c
index ef12145f..9f4bbcc6 100644
--- a/src/stm32/stm32f0_i2c.c
+++ b/src/stm32/stm32f0_i2c.c
@@ -149,17 +149,17 @@ i2c_setup(uint32_t bus, uint32_t rate, uint8_t addr)
gpio_peripheral(ii->sda_pin, ii->function | GPIO_OPEN_DRAIN, 1);
// Set 100Khz frequency and enable
- uint32_t nom_i2c_clock = 8000000; // 8mhz internal clock = 125ns ticks
- uint32_t scll = 40; // 40 * 125ns = 5us
- uint32_t sclh = 32; // 32 * 125ns = 4us
- uint32_t sdadel = 4; // 4 * 125ns = 500ns
- uint32_t scldel = 10; // 10 * 125ns = 1250ns
+ uint32_t nom_i2c_clock = 12000000; // 12mhz internal clock (83.3ns tick)
+ uint32_t scll = 60; // 60 * 83.3ns = 5us
+ uint32_t sclh = 48; // 48 * 83.3ns = 4us
+ uint32_t sdadel = 6; // 6 * 83.3ns = 500ns
+ uint32_t scldel = 15; // 15 * 83.3ns = 1250ns
// Clamp the rate to 400Khz
if (rate >= 400000) {
- scll = 10; // 10 * 125ns = 1250ns
- sclh = 4; // 4 * 125 = 500ns
- sdadel = 3; // 3 * 125 = 375ns
- scldel = 4; // 4 * 125 = 500ns
+ scll = 15; // 15 * 83.3ns = 1250ns
+ sclh = 6; // 6 * 83.3 = 500ns
+ sdadel = 4; // 4 * 83.3 = 333ns
+ scldel = 6; // 6 * 83.3 = 500ns
}
uint32_t pclk = get_pclock_frequency((uint32_t)i2c);