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/*
 * vectors.s -- fmk interrupt vector table
 *
 * Copyright (C) 2016-2017 Tomasz Kramkowski <tk@the-tk.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
.syntax unified

.section ".vectors"
// ARM Core System Handler Vectors
.long _estack //   0 ARM: Initial Stack Pointer
.long _start  //   1 ARM: Initial Program Counter
.long _halt   //   2 ARM: Non-maskable Interrupt (NMI)
.long _halt   //   3 ARM: Hard Fault
.long _halt   //   4 ARM: MemManage Fault
.long _halt   //   5 ARM: Bus Fault
.long _halt   //   6 ARM: Usage Fault
.fill 4,4,0   //   7..10
.long 0       //  11 ARM: Supervisor call (SVCall)
.long 0       //  12 ARM: Debug Monitor
.long 0       //  13 -
.long 0       //  14 ARM: Pendable request for system service (PendableSrvReq)
.long 0       //  15 ARM: System tick timer (SysTick)

// Non-Core Vectors
.long 0       //  16 DMA: DMA channel 0 transfer complete
.long 0       //  17 DMA: DMA channel 1 transfer complete
.long 0       //  18 DMA: DMA channel 2 transfer complete
.long 0       //  19 DMA: DMA channel 3 transfer complete
.long 0       //  20 DMA: DMA channel 4 transfer complete
.long 0       //  21 DMA: DMA channel 5 transfer complete
.long 0       //  22 DMA: DMA channel 6 transfer complete
.long 0       //  23 DMA: DMA channel 7 transfer complete
.long 0       //  24 DMA: DMA channel 8 transfer complete
.long 0       //  25 DMA: DMA channel 9 transfer complete
.long 0       //  26 DMA: DMA channel 10 transfer complete
.long 0       //  27 DMA: DMA channel 11 transfer complete
.long 0       //  28 DMA: DMA channel 12 transfer complete
.long 0       //  29 DMA: DMA channel 13 transfer complete
.long 0       //  30 DMA: DMA channel 14 transfer complete
.long 0       //  31 DMA: DMA channel 15 transfer complete
.long 0       //  32 DMA: DMA error interrupt channels 0-15
.long 0       //  33 -
.long 0       //  34 Flash_memory: Command complete
.long 0       //  35 Flash_memory: Read collision
.long 0       //  36 Mode_Controller: Low-voltage detect, low-voltage warning
.long 0       //  37 LLWU: Low Leakage Wakeup
.long 0       //  38 WDOG or EWM: Both watchdog modules share this interrupt.
.long 0       //  39 -
.long 0       //  40 I2C0: -
.long 0       //  41 I2C1: -
.long 0       //  42 SPI0: Single interrupt vector for all sources
.long 0       //  43 SPI1: Single interrupt vector for all sources
.long 0       //  44 -
.long 0       //  45 CAN0: OR'ed Message buffer (0-15)
.long 0       //  46 CAN0: Bus Off
.long 0       //  47 CAN0: Error
.long 0       //  48 CAN0: Transmit Warning
.long 0       //  49 CAN0: Receive Warning
.long 0       //  50 CAN0: Wake Up Transmit
.long 0       //  51 I2S0: Transmit
.long 0       //  52 I2S0: Receive
.fill 7,4,0   //  53..59 -
.long 0       //  60 UART0: Single interrupt vector for UART LON sources
.long uart0_isr //  61 UART0: Single interrupt vector for UART status sources
.long 0       //  62 UART0: Single interrupt vector for UART error sources
.long 0       //  63 UART1: Single interrupt vector for UART status sources
.long 0       //  64 UART1: Single interrupt vector for UART error sources
.long 0       //  65 UART2: Single interrupt vector for UART status sources
.long 0       //  66 UART2: Single interrupt vector for UART error sources
.fill 6,4,0   //  67..72 -
.long 0       //  73 ADC0: -
.long 0       //  74 ADC1: -
.long 0       //  75 CMP0: -
.long 0       //  76 CMP1: -
.long 0       //  77 CMP2: -
.long 0       //  78 FTM0: Single interrupt vector for all sources
.long 0       //  79 FTM1: Single interrupt vector for all sources
.long 0       //  80 FTM2: Single interrupt vector for all sources
.long 0       //  81 CMT: -
.long 0       //  82 RTC: Alarm interrupt
.long 0       //  83 RTC: Seconds interrupt
.long pit0_isr//  84 PIT: Channel 0
.long 0       //  85 PIT: Channel 1
.long 0       //  86 PIT: Channel 2
.long 0       //  87 PIT: Channel 3
.long 0       //  88 PDB: -
.long usb_isr //  89 USBOTG: -
.long 0       //  90 USB_Charger_Detect: -
.fill 6,4,0   //  91..96
.long 0       //  97 DAC0: -
.long 0       //  98 -
.long 0       //  99 TSI: Single interrupt vector for all sources
.long 0       //  100 MCG: -
.long 0       //  101 LPT: -
.long 0       //  102 -
.long 0       //  103 Port_control_module: Pin detect (Port A)
.long 0       //  104 Port_control_module: Pin detect (Port B)
.long 0       //  105 Port_control_module: Pin detect (Port C)
.long 0       //  106 Port_control_module: Pin detect (Port D)
.long 0       //  107 Port_control_module: Pin detect (Port E)
.long 0       //  108 -
.long 0       //  109 -
.long 0       //  110 Software: Software interrupt 4