summaryrefslogtreecommitdiffstats
path: root/lib/reg/port.h
diff options
context:
space:
mode:
Diffstat (limited to 'lib/reg/port.h')
-rw-r--r--lib/reg/port.h42
1 files changed, 42 insertions, 0 deletions
diff --git a/lib/reg/port.h b/lib/reg/port.h
new file mode 100644
index 0000000..76b8d9c
--- /dev/null
+++ b/lib/reg/port.h
@@ -0,0 +1,42 @@
+#ifndef LIB_REG_PORT_H
+#define LIB_REG_PORT_H
+
+#include <reg/regdefs.h>
+
+#define PORTA_PCR(n) REG_32(0x40049000 + 4 * (n)) /* Pin Control Register n */
+#define PORTB_PCR(n) REG_32(0x4004A000 + 4 * (n)) /* Pin Control Register n */
+#define PORTC_PCR(n) REG_32(0x4004B000 + 4 * (n)) /* Pin Control Register n */
+#define PORTD_PCR(n) REG_32(0x4004C000 + 4 * (n)) /* Pin Control Register n */
+#define PORTE_PCR(n) REG_32(0x4004D000 + 4 * (n)) /* Pin Control Register n */
+#define PCR_ISF 24 /* Interrupt Status Flag */
+#define PCR_IRQC 16 /* Interrupt Configuration */
+#define PCR_IRQC_M (uint32_t)(BITS(4) << PCR_IRQC)
+#define PCR_LK 15 /* Lock Register */
+#define PCR_MUX 8 /* Pin Mux Control */
+#define PCR_MUX_M (uint32_t)(BITS(3) << PCR_MUX)
+#define PCR_DSE 6 /* Drive Strength Enable */
+#define PCR_ODE 5 /* Open Drain Enable */
+#define PCR_PFE 4 /* Passive Filter Enable */
+#define PCR_SRE 2 /* Slew Rate Enable */
+#define PCR_PE 1 /* Pull Enable */
+#define PCR_PS 0 /* Pull Select */
+
+#define PORTA_GPCLR REG_32(0x40049080) /* Global Pin Control Low Register */
+#define PORTB_GPCLR REG_32(0x4004A080) /* Global Pin Control Low Register */
+#define PORTC_GPCLR REG_32(0x4004B080) /* Global Pin Control Low Register */
+#define PORTD_GPCLR REG_32(0x4004C080) /* Global Pin Control Low Register */
+#define PORTE_GPCLR REG_32(0x4004D080) /* Global Pin Control Low Register */
+
+#define PORTA_GPCHR REG_32(0x40049084) /* Global Pin Control High Register */
+#define PORTB_GPCHR REG_32(0x4004A084) /* Global Pin Control High Register */
+#define PORTC_GPCHR REG_32(0x4004B084) /* Global Pin Control High Register */
+#define PORTD_GPCHR REG_32(0x4004C084) /* Global Pin Control High Register */
+#define PORTE_GPCHR REG_32(0x4004D084) /* Global Pin Control High Register */
+
+#define PORTA_ISFR REG_32(0x400490A0) /* Interrupt Status Flag Register */
+#define PORTB_ISFR REG_32(0x4004A0A0) /* Interrupt Status Flag Register */
+#define PORTC_ISFR REG_32(0x4004B0A0) /* Interrupt Status Flag Register */
+#define PORTD_ISFR REG_32(0x4004C0A0) /* Interrupt Status Flag Register */
+#define PORTE_ISFR REG_32(0x4004D0A0) /* Interrupt Status Flag Register */
+
+#endif /* LIB_REG_PORT_H */