From 07cce2f4e910bba661c4d60542a2333cae9cbfda Mon Sep 17 00:00:00 2001 From: Tomasz Kramkowski Date: Fri, 19 May 2017 21:29:39 +0100 Subject: cleanup --- reg/wdog.h | 70 ++++++++++++++++++++++++++++++++++++++------------------------ 1 file changed, 43 insertions(+), 27 deletions(-) (limited to 'reg/wdog.h') diff --git a/reg/wdog.h b/reg/wdog.h index 5d9d5eb..e4db084 100644 --- a/reg/wdog.h +++ b/reg/wdog.h @@ -3,35 +3,51 @@ #include -#define WDOG_STCTRLH REG_16(0x40052000) /* Watchdog Status and Control Register High */ -#define STCTRLH_DISTESTWDOG 14 /* Functional test mode disable */ -#define STCTRLH_BYTESEL 12 /* Byte test mode byte selector */ -#define STCTRLH_BYTESEL_M REG_16_M(STCTRLH_BYTESEL, 2) -#define STCTRLH_TESTSEL 11 /* Functional test mode test selector */ -#define STCTRLH_TESTWDOG 10 /* Functional test mode enable */ -#define STCTRLH_WAITEN 7 /* Wait mode WDOG enable */ -#define STCTRLH_STOPEN 6 /* Stop mode WDOG enable */ -#define STCTRLH_DBGEN 5 /* Debug mode WDOG enable */ -#define STCTRLH_ALLOWUPDATE 4 /* Allow further updates to write-once registers */ -#define STCTRLH_WINEN 3 /* Windowing mode enable */ -#define STCTRLH_IRQRSTEN 2 /* Debug breadcrumbs feature enable */ -#define STCTRLH_CLKSRC 1 /* Clock source selector */ -#define STCTRLH_WDOGEN 0 /* WDOG enable */ +// Watchdog Status and Control Register High +#define WDOG_STCTRLH REG_16(0x40052000) +enum { + STCTRLH_DISTESTWDOG = 14, // Functional test mode disable + STCTRLH_BYTESEL = 12, // Byte test mode byte selector + STCTRLH_BYTESEL_M = REG_16_M(STCTRLH_BYTESEL, 2), + STCTRLH_TESTSEL = 11, // Functional test mode test selector + STCTRLH_TESTWDOG = 10, // Functional test mode enable + STCTRLH_WAITEN = 7, // Wait mode WDOG enable + STCTRLH_STOPEN = 6, // Stop mode WDOG enable + STCTRLH_DBGEN = 5, // Debug mode WDOG enable + STCTRLH_ALLOWUPDATE = 4, // Allow further updates to write-once registers + STCTRLH_WINEN = 3, // Windowing mode enable + STCTRLH_IRQRSTEN = 2, // Debug breadcrumbs feature enable + STCTRLH_CLKSRC = 1, // Clock source selector + STCTRLH_WDOGEN = 0, // WDOG enable +}; -#define WDOG_STCTRLL REG_16(0x40052002) /* Watchdog Status and Control Register Low */ -#define WDOG_TOVALH REG_16(0x40052004) /* Watchdog Time-out Value Register High */ -#define WDOG_TOVALL REG_16(0x40052006) /* Watchdog Time-out Value Register Low */ -#define WDOG_WINH REG_16(0x40052008) /* Watchdog Window Register High */ -#define WDOG_WINL REG_16(0x4005200A) /* Watchdog Window Register Low */ -#define WDOG_REFRESH REG_16(0x4005200C) /* Watchdog Refresh register */ +// Watchdog Status and Control Register Low +#define WDOG_STCTRLL REG_16(0x40052002) +// Watchdog Time-out Value Register High +#define WDOG_TOVALH REG_16(0x40052004) +// Watchdog Time-out Value Register Low +#define WDOG_TOVALL REG_16(0x40052006) +// Watchdog Window Register High +#define WDOG_WINH REG_16(0x40052008) +// Watchdog Window Register Low +#define WDOG_WINL REG_16(0x4005200A) +// Watchdog Refresh register +#define WDOG_REFRESH REG_16(0x4005200C) -#define WDOG_UNLOCK REG_16(0x4005200E) /* Watchdog Unlock Register */ -#define WDOG_UNLOCK_S1 0xC520 /* Unlock Sequence 1/2 */ -#define WDOG_UNLOCK_S2 0xD928 /* Unlock Sequence 2/2 */ +// Watchdog Unlock Register +#define WDOG_UNLOCK REG_16(0x4005200E) +enum { + WDOG_UNLOCK_S1 = 0xC520, // Unlock Sequence 1/2 + WDOG_UNLOCK_S2 = 0xD928, // Unlock Sequence 2/2 +}; -#define WDOG_TMROUTH REG_16(0x40052010) /* Watchdog Timer Output Register High */ -#define WDOG_TMROUTL REG_16(0x40052012) /* Watchdog Timer Output Register Low */ -#define WDOG_RSTCNT REG_16(0x40052014) /* Watchdog Reset Count register */ -#define WDOG_PRESC REG_16(0x40052016) /* Watchdog Prescaler register */ +// Watchdog Timer Output Register High +#define WDOG_TMROUTH REG_16(0x40052010) +// Watchdog Timer Output Register Low +#define WDOG_TMROUTL REG_16(0x40052012) +// Watchdog Reset Count register +#define WDOG_RSTCNT REG_16(0x40052014) +// Watchdog Prescaler register +#define WDOG_PRESC REG_16(0x40052016) #endif /* MK20DX256_REG_WDOG_H */ -- cgit v1.2.3-54-g00ecf