From 45f0ea29a6f79d500a902d8f73da65d1d230f902 Mon Sep 17 00:00:00 2001
From: Eugene Krashtan <Eugene.Krashtan@opensynergy.com>
Date: Wed, 13 Mar 2019 17:39:46 +0200
Subject: stm32f0: SPI and i2c interfaces added

Signed-off-by: Eugene Krashtan <eug.krashtan@gmail.com>
---
 src/stm32f0/spi.c | 106 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 106 insertions(+)
 create mode 100644 src/stm32f0/spi.c

(limited to 'src/stm32f0/spi.c')

diff --git a/src/stm32f0/spi.c b/src/stm32f0/spi.c
new file mode 100644
index 00000000..683645e4
--- /dev/null
+++ b/src/stm32f0/spi.c
@@ -0,0 +1,106 @@
+/*
+ *  SPI support on STM32F0 - without HAL for space saving
+ *
+ *  Copyright (C) 2019 Eug Krashtan <eug.krashtan@gmail.com>
+ *  This file may be distributed under the terms of the GNU GPLv3 license.
+ *
+ */
+
+#include <string.h> // memcpy
+#include "stm32f0xx_hal.h"
+#include "command.h" // shutdown
+#include "board/gpio.h" // spi_setup
+#include "sched.h" // sched_shutdown
+#include "log.h"
+
+//static SPI_HandleTypeDef hspi1;
+
+void spi_hw_setup(uint32_t rate)
+{
+    GPIO_InitTypeDef GPIO_InitStruct = {0};
+
+    /* SPI1 init - no HAL */
+    __HAL_RCC_SPI1_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+
+    /**SPI1 GPIO Configuration
+    PA5     ------> SPI1_SCK
+    PA6     ------> SPI1_MISO
+    PA7     ------> SPI1_MOSI
+    */
+    gpio_check_busy(0x05); //PA5
+    gpio_check_busy(0x06); //PA6
+    gpio_check_busy(0x07); //PA7
+    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF0_SPI1;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    if (rate > 800000) {
+        SPI1->CR1 = SPI_BAUDRATEPRESCALER_64;
+    } else {
+        SPI1->CR1 = SPI_BAUDRATEPRESCALER_256;
+    }
+
+    SPI1->CR1 |= SPI_MODE_MASTER | SPI_DIRECTION_2LINES | SPI_CR1_SSM |
+            SPI_POLARITY_LOW | SPI_PHASE_1EDGE |
+            SPI_FIRSTBIT_MSB | SPI_CRCCALCULATION_DISABLE;
+
+    SPI1->CR2 =  SPI_NSS_PULSE_DISABLE | SPI_DATASIZE_8BIT |
+            SPI_RXFIFO_THRESHOLD_QF;
+
+    SPI1->CR1 |= SPI_CR1_SPE; // Enable
+
+    //hspi1.Instance = SPI1;
+    //hspi1.Init.Mode = SPI_MODE_MASTER;
+    //hspi1.Init.Direction = SPI_DIRECTION_2LINES;
+    //hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
+    //hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
+    //hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
+    //hspi1.Init.NSS = SPI_NSS_SOFT;
+    //hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
+    //hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
+    //hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
+    //hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+    //hspi1.Init.CRCPolynomial = 7;
+    //hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
+    //hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
+    //HAL_SPI_Init(&hspi1);
+}
+
+struct spi_config
+spi_setup(uint32_t bus, uint8_t mode, uint32_t rate)
+{
+    if (bus > 0 || !rate)
+        shutdown("Invalid spi_setup parameters");
+
+    spi_hw_setup(rate);
+    return (struct spi_config){ .cfg = SPI1->CR1 };
+}
+
+void
+spi_prepare(struct spi_config config)
+{
+    SPI1->CR1 = config.cfg;
+}
+
+void
+spi_transfer(struct spi_config config, uint8_t receive_data,
+             uint8_t len, uint8_t *data)
+{
+    uint8_t rxptr = 0;
+    while (rxptr<len) {
+        while(!(SPI1->SR & SPI_SR_TXE));
+        __DMB();
+        *((uint8_t*)&(SPI1->DR)) = data[rxptr]; // Hack with pointers
+        // to write/read only 8 bits from 16-bit DR (see errata)
+        while(!(SPI1->SR & SPI_SR_RXNE));
+        __DMB();
+        if(receive_data) {
+            data[rxptr] = *((uint8_t*)&(SPI1->DR));
+        }
+        rxptr ++;
+    }
+}
-- 
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