From b70416167b9abdcafacea81e9ef92c509360f735 Mon Sep 17 00:00:00 2001 From: Eug Krashtan Date: Sat, 28 Dec 2019 13:29:10 +0200 Subject: stm32f0: Remove hal based stm32f0 implementation Signed-off-by: Eug Krashtan Signed-off-by: Kevin O'Connor --- src/stm32f0/gpio.c | 141 ----------------------------------------------------- 1 file changed, 141 deletions(-) delete mode 100644 src/stm32f0/gpio.c (limited to 'src/stm32f0/gpio.c') diff --git a/src/stm32f0/gpio.c b/src/stm32f0/gpio.c deleted file mode 100644 index a7849484..00000000 --- a/src/stm32f0/gpio.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * GPIO functions on STM32F042 boards. - * - * Copyright (C) 2019 Eug Krashtan - * This file may be distributed under the terms of the GNU GPLv3 license. - * - */ - -#include "board/gpio.h" // gpio_out_setup -#include "stm32f0xx_hal.h" -#include "internal.h" // GPIO -#include "board/irq.h" // irq_save -#include "compiler.h" // ARRAY_SIZE -#include "sched.h" // sched_shutdown -#include "command.h" // shutdown - -DECL_ENUMERATION_RANGE("pin", "PA0", GPIO('A', 0), 11); -DECL_ENUMERATION_RANGE("pin", "PB0", GPIO('B', 0), 9); -DECL_ENUMERATION_RANGE("pin", "PF0", GPIO('F', 0), 2); - -GPIO_TypeDef *const digital_regs[] = { - GPIOA, GPIOB, GPIOC, 0, 0, GPIOF -}; - -// -uint8_t const avail_pins[] = { - 0x0 + 0x0, //PA0 - 0x0 + 0x1, //PA1 -#if !(CONFIG_SERIAL) - 0x0 + 0x2, //PA2 - USART pins - 0x0 + 0x3, //PA3 -#endif - 0x0 + 0x4, //PA4 - 0x0 + 0x5, //PA5 - 0x0 + 0x6, //PA6 - 0x0 + 0x7, //PA7 -#if !(CONFIG_CANSERIAL) - 0x0 + 0x9, //PA9 - but remapped in CAN mode to PA11,PA12 - 0x0 + 0xa, //PA10 -#endif - 0x10 + 0x1, //PB1 - 0x10 + 0x8, //PB8 - 0x50 + 0x0, //PF0 - 0x50 + 0x1, //PF1 -}; - -/**************************************************************** - * General Purpose Input Output (GPIO) pins - ****************************************************************/ - -static uint8_t -gpio_check_pin(uint8_t pin) -{ - int i; - for(i=0; i