From c5d56f4438de4fd9b9a06948415eb5c8f3ecdbd7 Mon Sep 17 00:00:00 2001 From: Matt Baker Date: Wed, 21 Sep 2022 21:45:51 -0700 Subject: stm32g4: implement build,usb,can,i2c,spi,serial,adc. Signed-off-by: Matt Baker --- src/stm32/stm32f0_serial.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) (limited to 'src/stm32/stm32f0_serial.c') diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c index f7f17dfc..bb4ec69a 100644 --- a/src/stm32/stm32f0_serial.c +++ b/src/stm32/stm32f0_serial.c @@ -16,28 +16,38 @@ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9"); #define GPIO_Rx GPIO('A', 10) #define GPIO_Tx GPIO('A', 9) - #define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 1) + #define USARTx_FUNCTION GPIO_FUNCTION( \ + (CONFIG_MACH_STM32H7 | CONFIG_MACH_STM32G4) ? 7 : 1) #define USARTx USART1 #define USARTx_IRQn USART1_IRQn #elif CONFIG_STM32_SERIAL_USART1_ALT_PB7_PB6 DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6"); #define GPIO_Rx GPIO('B', 7) #define GPIO_Tx GPIO('B', 6) - #define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 0) + #define USARTx_FUNCTION GPIO_FUNCTION( \ + (CONFIG_MACH_STM32H7 | CONFIG_MACH_STM32G4) ? 7 : 0) #define USARTx USART1 #define USARTx_IRQn USART1_IRQn #elif CONFIG_STM32_SERIAL_USART2 DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2"); #define GPIO_Rx GPIO('A', 3) #define GPIO_Tx GPIO('A', 2) - #define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 1) + #define USARTx_FUNCTION GPIO_FUNCTION( \ + (CONFIG_MACH_STM32H7 | CONFIG_MACH_STM32G4) ? 7 : 1) #define USARTx USART2 #define USARTx_IRQn USART2_IRQn #elif CONFIG_STM32_SERIAL_USART2_ALT_PA15_PA14 DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14"); #define GPIO_Rx GPIO('A', 15) #define GPIO_Tx GPIO('A', 14) - #define USARTx_FUNCTION GPIO_FUNCTION(1) + #define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32G4 ? 7 : 1) + #define USARTx USART2 + #define USARTx_IRQn USART2_IRQn +#elif CONFIG_STM32_SERIAL_USART2_ALT_PB4_PB3 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB4,PB3"); + #define GPIO_Rx GPIO('B', 4) + #define GPIO_Tx GPIO('B', 3) + #define USARTx_FUNCTION GPIO_FUNCTION(7) #define USARTx USART2 #define USARTx_IRQn USART2_IRQn #elif CONFIG_STM32_SERIAL_USART2_ALT_PD6_PD5 @@ -85,6 +95,9 @@ #define USART_ISR_TXE USART_ISR_TXE_TXFNF #define USART_BRR_DIV_MANTISSA_Pos 4 #define USART_BRR_DIV_FRACTION_Pos 0 +#elif CONFIG_MACH_STM32G4 + #define USART_BRR_DIV_MANTISSA_Pos 4 + #define USART_BRR_DIV_FRACTION_Pos 0 #elif CONFIG_MACH_STM32H7 // The stm32h7 has slightly different register names #define USART_ISR_RXNE USART_ISR_RXNE_RXFNE -- cgit v1.2.3-70-g09d2