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* armcm_boot: Additional code for broken bootloadersclearchris2020-03-041-0/+9
| | | | | | | | Explicitly disable the SysTick interrupt and explicitly set the stack pointer, as some bootloaders aren't handling this correctly. Signed-off-by: Chris Lombardi <clearchris@hotmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for a bootloader on stm32f0Kevin O'Connor2020-03-043-2/+36
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Revert "stm32: performance improvement for spi on stm32f0"Kevin O'Connor2020-03-041-8/+4
| | | | | | | | | | | This reverts commit a2c309a2b02d16ec15fee5702463621239261266. The above commit is causing crashes on the stm32f103xb chip when spi is in use. It's unclear what the cause of the regression is, but the optimization isn't required so revert it until the root cause can be determined. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stepper: Add some comments on s->position trackingKevin O'Connor2020-03-041-0/+5
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix broken clock setup on stm32f1Kevin O'Connor2020-02-291-2/+2
| | | | | | | | | Commit bd6c25c9 introduced a typo that caused the clock divisors to not be set correctly on stm32f1. Reported by @brianrjones69. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* basecmd: No need for finalize_config command to send "config" responseKevin O'Connor2020-02-201-2/+1
| | | | | | | | The host code always issues a get_config command immediately after finalize_config, so there is no need to send the two config response messages. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: The stm32f1 can only reach 64Mhz when using an internal clockKevin O'Connor2020-02-141-0/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix typo that broke selection of alternate serial port pinKevin O'Connor2020-02-092-2/+2
| | | | | | Fix a typo in commit aea15250. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Reset adc calibration prior to starting calibrationKevin O'Connor2020-01-251-8/+17
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Increase adc sample timeKevin O'Connor2020-01-251-4/+4
| | | | | | | Increase the sample time register from 3 to 4 (which adds about ~1.5us to each adc sample). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Only declare alternate usart2 on stm32f0Kevin O'Connor2020-01-233-49/+41
| | | | | | | Also, try to improve the structure of the #if/#else/#endif layout in serial.c. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Don't export spi1a/spi2a on stm32f1Kevin O'Connor2020-01-231-4/+6
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: add alternate pinout for USART2Arne Jansen2020-01-233-1/+16
| | | | | | Added to both generic stm32 and stm32f0 Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: add alternate pinouts for spi1/2Arne Jansen2020-01-231-3/+9
| | | | | | | In addition to spi3, spi1 and spi2 also have alternate pins. Add them as spi1a and spi2a, similar to spi3. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: performance improvement for spi on stm32f0Arne Jansen2020-01-231-4/+8
| | | | | | | | | | The stm32 has a small queue for spi tx/rx. The current code only uses the spi with a single byte buffer, effectively waiting for each byte to complete before starting the next transfer. This patch changes the structure of spi_transfer() to make use of the queue and achieve back-to-back transfer of bytes on spi. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* stm32: fix spi_transfer for stm32f0Arne Jansen2020-01-231-2/+8
| | | | | | | | | | The current code accesses the DR as 32 bit. This enabled data packing mode, effectively adding a 00 byte between each sent byte. The receive side had similar problems. To prevent this, all accesses are 8 bit now, even though this is not necessary on stmf[14]. Signed-off-by: Arne Jansen <arne@die-jansens.de>
* lpc176x: Add support for ssp1 (#2393)akatik2020-01-143-22/+39
| | | Signed-off-by: Andrey Kovalev <aka@pxe.ru>
* stm32f0: Remove hal based stm32f0 implementationEug Krashtan2020-01-1418-1827/+0
| | | | | Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: STM32F0 CAN featureEug Krashtan2020-01-144-0/+290
| | | | | Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: HSI selection fix; Pin swap rename; Add CAN selectionEug Krashtan2020-01-142-7/+11
| | | | | Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* linux: implement i2cArksine2020-01-134-1/+112
| | | | Signed-off-by: Eric Callahan <arksine.code@gmail.com>
* avr: implement i2c_readArksine2020-01-132-2/+19
| | | | Signed-off-by: Eric Callahan <arksine.code@gmail.com>
* config: Fysetc S6 generic configuration (#2220)Tobias Weiß2019-12-182-5/+5
| | | Signed-off-by: Tobias Weiß <t.weiss@bk.ru>
* atsam: Fix typo causing chipid to not be fully readKevin O'Connor2019-11-271-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix typo in setting of SMPR1 register on stm32f103Kevin O'Connor2019-11-271-1/+2
| | | | | | Only the stm32f4 has a SMP18 field; it's not present on the stm32f103. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Fix typo in adc startup delayKevin O'Connor2019-11-271-1/+6
| | | | | | Fix (harmless) typo and add comments on adc timing. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lcd_hd44780: Minor change to timing delaysKevin O'Connor2019-11-261-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lcd_hd44780: Add proper timing delays around gpio updatesKevin O'Connor2019-11-261-0/+20
| | | | | | | A fast micro-controller may update the gpio pins faster than the hd44780 chip can handle. Add in the appropriate delays. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lpc176x: Move chip id code from usbserial.c to new file chipid.cKevin O'Connor2019-11-263-38/+48
| | | | | | | Add a chipid.c file - this makes the code layout more similar to the other arm boards. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* usb_cdc: Report MCU type on all boardsKevin O'Connor2019-11-261-4/+0
| | | | | | | Always report the "product id" as the MCU type (instead of as "Klipper firmware"). Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Enable chipid as usb serial numberKevin O'Connor2019-11-263-1/+76
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsamd: Enable chipid as usb serial numberKevin O'Connor2019-11-253-1/+47
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Enable chipid as usb serial numberKevin O'Connor2019-11-253-1/+35
| | | | | Signed-off-by: Matt Baker <baker.matt.j@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* usb_cdc: Add a usb_fill_serial() helper functionKevin O'Connor2019-11-253-23/+32
| | | | | | | Add a helper function to fill the usb serial string descriptor. Use it in the lpc176x code. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Allow external crystal speed to be customized in KconfigKevin O'Connor2019-11-254-55/+60
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* usb_cdc: Report the MCU name instead of "Klipper firmware"Kevin O'Connor2019-11-211-0/+4
| | | | | | | | Change the "product id" from the redundant "Klipper firmware" to the CONFIG_MCU value. For now, only make this change on boards that have CONFIG_HAVE_CHIPID set. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lpc176x: Minor rework of HAVE_CHIPID kconfigKevin O'Connor2019-11-212-13/+9
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* lpc176x: read chip id and use as usb serial. (#2184)Matt Baker2019-11-215-10/+82
| | | Signed-off-by: Matt Baker <baker.matt.j@gmail.com>
* atsamd: Add support for SAMD51 overclockingLars R. Hansen2019-11-182-6/+22
| | | | | Signed-off-by: Lars R. Hansen <popshansen@hotmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32f0: Initial support for i2c on stm32f0Kevin O'Connor2019-11-144-6/+100
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: adc for new stm32f0 common code (#2120)clearchris2019-11-054-3/+144
| | | | | | | Derived from stm32/adc.c and stm32f0/adc.c with additional changes. Tested on Monoprice Mini Delta (malyan) stm32f070xb board. Signed-off-by: Chris Lombardi <clearchris@hotmail.com>
* stm32: Define PGx pins on stm32f103Kevin O'Connor2019-11-021-2/+7
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* flash_usb: Pass -t $CONFIG_MCU to flash_usb on all targetsKevin O'Connor2019-10-264-11/+4
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* flash_usb: Use "-s" option to specify flash offset on atsamdKevin O'Connor2019-10-261-1/+1
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Add support for flashing over usb on stm32f042Kevin O'Connor2019-10-262-0/+16
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: stm32f4 usb boot check only needed when CONFIG_USBSERIALKevin O'Connor2019-10-261-2/+2
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32f4: Add support for flashing over USBKevin O'Connor2019-10-262-1/+15
| | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: sysio support is only available on sam4sKevin O'Connor2019-10-241-0/+2
| | | | | | Fix sam4e build error introduced in commit f723a314. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* atsam: Allow PB4-PB7,PB10-PB12 to be used as gpio on sam4Kevin O'Connor2019-10-241-0/+3
| | | | | | | A separate "sysio" register must be set in order to use some port B pins on the sam4 mcu. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
* stm32: Implement armcm_main() in arch specific codeKevin O'Connor2019-10-246-30/+40
| | | | | | | Move armcm_main() to stm32f0.c, stm32f1.c, and stm32f4.c. This gives the arch specific code more control on the early boot setup. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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