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-rw-r--r--src/stm32/stm32f7.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/stm32/stm32f7.c b/src/stm32/stm32f7.c
index f6f27618..c86bca3d 100644
--- a/src/stm32/stm32f7.c
+++ b/src/stm32/stm32f7.c
@@ -57,6 +57,8 @@ gpio_clock_enable(GPIO_TypeDef *regs)
RCC->AHB1ENR;
}
+// PLL (f765) input: 0.95 to 2.1Mhz, vco: 100 to 432Mhz, output: 24 to 216Mhz
+
#if !CONFIG_STM32_CLOCK_REF_INTERNAL
DECL_CONSTANT_STR("RESERVE_PINS_crystal", "PH0,PH1");
#endif