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Diffstat (limited to 'src/stm32/stm32f4.c')
-rw-r--r--src/stm32/stm32f4.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/stm32/stm32f4.c b/src/stm32/stm32f4.c
index a2060d76..fd3eb0ba 100644
--- a/src/stm32/stm32f4.c
+++ b/src/stm32/stm32f4.c
@@ -138,8 +138,8 @@ enable_clock_stm32f446(void)
while (!(PWR->CSR & PWR_CSR_ODSWRDY))
;
- // Enable 48Mhz USB clock
- if (CONFIG_USB) {
+ // Enable 48Mhz USB clock for USB or for SDIO
+ if (CONFIG_USB || CONFIG_HAVE_GPIO_SDIO) {
uint32_t ref = (CONFIG_STM32_CLOCK_REF_INTERNAL
? 16000000 : CONFIG_CLOCK_REF_FREQ);
uint32_t plls_base = 2000000, plls_freq = FREQ_USB * 4;
@@ -153,6 +153,14 @@ enable_clock_stm32f446(void)
;
RCC->DCKCFGR2 = RCC_DCKCFGR2_CK48MSEL;
+ } else {
+ // Reset value just in case the booloader modified the default value
+ RCC->DCKCFGR2 = 0;
+ }
+
+ // Set SDIO clk to PLL48CLK
+ if (CONFIG_HAVE_GPIO_SDIO) {
+ MODIFY_REG(RCC->DCKCFGR2, RCC_DCKCFGR2_SDIOSEL, 0);
}
#endif
}