diff options
Diffstat (limited to 'src/stm32/stm32f0.c')
| -rw-r--r-- | src/stm32/stm32f0.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/stm32/stm32f0.c b/src/stm32/stm32f0.c index 98933b9d..e63f1b5b 100644 --- a/src/stm32/stm32f0.c +++ b/src/stm32/stm32f0.c @@ -86,7 +86,7 @@ pll_setup(void) // Setup CFGR3 register uint32_t cfgr3 = RCC_CFGR3_I2C1SW; -#if CONFIG_USBSERIAL +#if CONFIG_USB // Select PLL as source for USB clock cfgr3 |= RCC_CFGR3_USBSW; #endif @@ -109,7 +109,7 @@ hsi48_setup(void) ; // Enable USB clock recovery - if (CONFIG_USBSERIAL) { + if (CONFIG_USB) { enable_pclock(CRS_BASE); CRS->CR |= CRS_CR_AUTOTRIMEN | CRS_CR_CEN; } @@ -150,7 +150,7 @@ usb_reboot_for_dfu_bootloader(void) static void check_usb_dfu_bootloader(void) { - if (!CONFIG_USBSERIAL || !CONFIG_MACH_STM32F0x2 + if (!CONFIG_USB || !CONFIG_MACH_STM32F0x2 || *(uint64_t*)USB_BOOT_FLAG_ADDR != USB_BOOT_FLAG) return; *(uint64_t*)USB_BOOT_FLAG_ADDR = 0; @@ -204,8 +204,7 @@ armcm_main(void) FLASH->ACR = (1 << FLASH_ACR_LATENCY_Pos) | FLASH_ACR_PRFTBE; // Configure main clock - if (CONFIG_MACH_STM32F0x2 && CONFIG_STM32_CLOCK_REF_INTERNAL - && CONFIG_USBSERIAL) + if (CONFIG_MACH_STM32F0x2 && CONFIG_STM32_CLOCK_REF_INTERNAL && CONFIG_USB) hsi48_setup(); else pll_setup(); |