1 files changed, 1 insertions, 43 deletions
diff --git a/src/pru/pru0.c b/src/pru/pru0.c
index ae33ad6b..3a8fd421 100644
--- a/src/pru/pru0.c
+++ b/src/pru/pru0.c
@@ -9,7 +9,6 @@
 #include <string.h> // memset
 #include <pru/io.h> // write_r31
 #include <pru_cfg.h> // CT_CFG
-#include <pru_iep.h> // CT_IEP
 #include <pru_intc.h> // CT_INTC
 #include <pru_rpmsg.h> // pru_rpmsg_send
 #include <pru_virtio_ids.h> // VIRTIO_ID_RPMSG
@@ -188,43 +187,6 @@ console_sendf(const struct command_encoder *ce, va_list args)
 
 
 /****************************************************************
- * Peripheral reset
- ****************************************************************/
-
-static void
-timer_reset(void)
-{
-    CT_IEP.TMR_CMP_CFG = 0x01 << 1;
-    CT_IEP.TMR_GLB_CFG = 0x11;
-}
-
-static void
-adc_reset(void)
-{
-    // Disable ADC
-    ADC->ctrl = (1<<2);
-    barrier();
-    // Clear registers
-    ADC->irqstatus = 0xffffffff;
-    ADC->irqenable_clr = 0xffffffff;
-    ADC->dmaenable_clr = 0xffffffff;
-    ADC->adc_clkdiv = 0;
-    ADC->stepenable = 0;
-    ADC->idleconfig = 0;
-    int i;
-    for (i=0; i<8; i++) {
-        ADC->step[i].config = i<<19;
-        ADC->step[i].delay = 0;
-    }
-    // Enable ADC
-    writel(&ADC->ctrl, 0x07);
-    // Drain fifo
-    while (readl(&ADC->fifo0count))
-        readl(&ADC->fifo0data);
-}
-
-
-/****************************************************************
  * Resource table
  ****************************************************************/
 
@@ -365,12 +327,8 @@ main(void)
                              , CHAN_DESC, CHAN_PORT) != PRU_RPMSG_SUCCESS)
         ;
 
-    // Reset peripherals
-    memset(SHARED_MEM, 0, sizeof(*SHARED_MEM));
-    timer_reset();
-    adc_reset();
-
     // Wait for PRU1 to be ready
+    memset(SHARED_MEM, 0, sizeof(*SHARED_MEM));
     writel(&SHARED_MEM->signal, SIGNAL_PRU0_WAITING);
     while (readl(&SHARED_MEM->signal) != SIGNAL_PRU1_READY)
         ;