diff options
| -rw-r--r-- | src/stm32/Makefile | 2 | ||||
| -rw-r--r-- | src/stm32/internal.h | 1 | ||||
| -rw-r--r-- | src/stm32/main.c | 18 | ||||
| -rw-r--r-- | src/stm32/stm32f0.c | 10 | ||||
| -rw-r--r-- | src/stm32/stm32f1.c | 20 | ||||
| -rw-r--r-- | src/stm32/stm32f4.c | 19 |
6 files changed, 40 insertions, 30 deletions
diff --git a/src/stm32/Makefile b/src/stm32/Makefile index ac57df28..c607328b 100644 --- a/src/stm32/Makefile +++ b/src/stm32/Makefile @@ -22,7 +22,7 @@ CFLAGS_klipper.elf += -T $(OUT)src/generic/armcm_link.ld $(OUT)klipper.elf: $(OUT)src/generic/armcm_link.ld # Add source files -src-y += stm32/main.c stm32/watchdog.c stm32/gpio.c generic/crc16_ccitt.c +src-y += stm32/watchdog.c stm32/gpio.c generic/crc16_ccitt.c src-y += generic/armcm_boot.c generic/armcm_irq.c generic/armcm_reset.c src-$(CONFIG_MACH_STM32F0) += ../lib/stm32f0/system_stm32f0xx.c src-$(CONFIG_MACH_STM32F0) += generic/timer_irq.c stm32/stm32f0_timer.c diff --git a/src/stm32/internal.h b/src/stm32/internal.h index f9f545df..abe879c1 100644 --- a/src/stm32/internal.h +++ b/src/stm32/internal.h @@ -27,7 +27,6 @@ extern GPIO_TypeDef * const digital_regs[]; void enable_pclock(uint32_t periph_base); int is_enabled_pclock(uint32_t periph_base); uint32_t get_pclock_frequency(uint32_t periph_base); -void clock_setup(void); void gpio_clock_enable(GPIO_TypeDef *regs); void gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup); diff --git a/src/stm32/main.c b/src/stm32/main.c deleted file mode 100644 index 5cf7dfd1..00000000 --- a/src/stm32/main.c +++ /dev/null @@ -1,18 +0,0 @@ -// Main starting point for STM32 boards. -// -// Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net> -// -// This file may be distributed under the terms of the GNU GPLv3 license. - -#include "board/armcm_boot.h" // armcm_main -#include "internal.h" // clock_setup -#include "sched.h" // sched_main - -// Main entry point - called from armcm_boot.c:ResetHandler() -void -armcm_main(void) -{ - SystemInit(); - clock_setup(); - sched_main(); -} diff --git a/src/stm32/stm32f0.c b/src/stm32/stm32f0.c index 2c6958a9..8f1361a3 100644 --- a/src/stm32/stm32f0.c +++ b/src/stm32/stm32f0.c @@ -5,8 +5,10 @@ // This file may be distributed under the terms of the GNU GPLv3 license. #include "autoconf.h" // CONFIG_CLOCK_REF_8M +#include "board/armcm_boot.h" // armcm_main #include "command.h" // DECL_CONSTANT_STR #include "internal.h" // enable_pclock +#include "sched.h" // sched_main #define FREQ_PERIPH 48000000 @@ -147,10 +149,12 @@ hsi48_setup(void) #endif } -// Main clock setup called at chip startup +// Main entry point - called from armcm_boot.c:ResetHandler() void -clock_setup(void) +armcm_main(void) { + SystemInit(); + // Set flash latency FLASH->ACR = (1 << FLASH_ACR_LATENCY_Pos) | FLASH_ACR_PRFTBE; @@ -167,4 +171,6 @@ clock_setup(void) SYSCFG->CFGR1 |= SYSCFG_CFGR1_PA11_PA12_RMP; } #endif + + sched_main(); } diff --git a/src/stm32/stm32f1.c b/src/stm32/stm32f1.c index 8723c6d1..33509ab7 100644 --- a/src/stm32/stm32f1.c +++ b/src/stm32/stm32f1.c @@ -9,6 +9,7 @@ #include "board/irq.h" // irq_disable #include "board/usb_cdc.h" // usb_request_bootloader #include "internal.h" // enable_pclock +#include "sched.h" // sched_main #define FREQ_PERIPH (CONFIG_CLOCK_FREQ / 2) @@ -123,12 +124,9 @@ usb_request_bootloader(void) } // Main clock setup called at chip startup -void +static void clock_setup(void) { - // The SystemInit() code alters VTOR - restore it - SCB->VTOR = (uint32_t)VectorTable; - // Configure and enable PLL uint32_t cfgr; if (CONFIG_CLOCK_REF_8M) { @@ -157,8 +155,22 @@ clock_setup(void) RCC->CFGR = cfgr | RCC_CFGR_SW_PLL; while ((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_PLL) ; +} + +// Main entry point - called from armcm_boot.c:ResetHandler() +void +armcm_main(void) +{ + // Run SystemInit() and then restore VTOR + SystemInit(); + SCB->VTOR = (uint32_t)VectorTable; + + // Setup clocks + clock_setup(); // Disable JTAG to free PA15, PB3, PB4 enable_pclock(AFIO_BASE); AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE; + + sched_main(); } diff --git a/src/stm32/stm32f4.c b/src/stm32/stm32f4.c index 6dfa2f68..e1f22b2f 100644 --- a/src/stm32/stm32f4.c +++ b/src/stm32/stm32f4.c @@ -9,6 +9,7 @@ #include "board/usb_cdc.h" // usb_request_bootloader #include "command.h" // DECL_CONSTANT_STR #include "internal.h" // enable_pclock +#include "sched.h" // sched_main #define FREQ_PERIPH (CONFIG_CLOCK_FREQ / 4) @@ -174,12 +175,9 @@ enable_clock_stm32f446(void) } // Main clock setup called at chip startup -void +static void clock_setup(void) { - // The SystemInit() code alters VTOR - restore it - SCB->VTOR = (uint32_t)VectorTable; - // Configure and enable PLL if (CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407) enable_clock_stm32f40x(); @@ -199,3 +197,16 @@ clock_setup(void) while ((RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_PLL) ; } + +// Main entry point - called from armcm_boot.c:ResetHandler() +void +armcm_main(void) +{ + // Run SystemInit() and then restore VTOR + SystemInit(); + SCB->VTOR = (uint32_t)VectorTable; + + clock_setup(); + + sched_main(); +} |