From 9d005392012213dc12527b913a9ea4f72b97368c Mon Sep 17 00:00:00 2001
From: Diego Barrios Romero <eldruin@gmail.com>
Date: Sat, 17 Nov 2018 07:51:12 +0100
Subject: Add support for setting the full-scale range (PGA)

---
 src/devices/features/tier2.rs | 24 ++++++++++++++++++++++--
 src/lib.rs                    | 26 +++++++++++++++++++++++++-
 2 files changed, 47 insertions(+), 3 deletions(-)

(limited to 'src')

diff --git a/src/devices/features/tier2.rs b/src/devices/features/tier2.rs
index 25b618a..067139a 100644
--- a/src/devices/features/tier2.rs
+++ b/src/devices/features/tier2.rs
@@ -2,8 +2,9 @@
 //!
 //! These are the features included only in ADS1x14, ADS1x15
 
-use { Ads1x1x, Error, interface, ic, ComparatorMode, ComparatorPolarity,
-      ComparatorLatching, ComparatorQueue, Register, BitFlags, conversion };
+use { Ads1x1x, Error, interface, ic, FullScaleRange, ComparatorMode,
+      ComparatorPolarity, ComparatorLatching, ComparatorQueue, Register,
+      BitFlags, conversion };
 
 impl<DI, IC, CONV, MODE, E> Ads1x1x<DI, IC, CONV, MODE>
 where
@@ -11,6 +12,25 @@ where
     IC: ic::Tier2Features,
     CONV: conversion::ConvertThreshold<E>
 {
+    /// Set the input voltage measurable range
+    ///
+    /// This configures the programmable gain amplifier and determines the measurable input voltage range.
+    pub fn set_full_scale_range(&mut self, range: FullScaleRange) -> Result<(), Error<E>> {
+        use BitFlags as BF;
+        let config;
+        match range {
+            FullScaleRange::Within6_144V => config = self.config.with_low( BF::PGA2).with_low( BF::PGA1).with_low( BF::PGA0),
+            FullScaleRange::Within4_096V => config = self.config.with_low( BF::PGA2).with_low( BF::PGA1).with_high(BF::PGA0),
+            FullScaleRange::Within2_048V => config = self.config.with_low( BF::PGA2).with_high(BF::PGA1).with_low( BF::PGA0),
+            FullScaleRange::Within1_024V => config = self.config.with_low( BF::PGA2).with_high(BF::PGA1).with_high(BF::PGA0),
+            FullScaleRange::Within0_512V => config = self.config.with_high(BF::PGA2).with_low( BF::PGA1).with_low( BF::PGA0),
+            FullScaleRange::Within0_256V => config = self.config.with_high(BF::PGA2).with_low( BF::PGA1).with_high(BF::PGA0),
+        }
+        self.iface.write_register(Register::CONFIG, config.bits)?;
+        self.config = config;
+        Ok(())
+    }
+
     /// Set comparator lower threshold
     pub fn set_low_threshold(&mut self, value: i16) -> Result<(), Error<E>> {
         let register_value = CONV::convert_threshold(value)?;
diff --git a/src/lib.rs b/src/lib.rs
index 035b0d4..00c7a79 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -292,6 +292,27 @@ pub enum ComparatorQueue {
     Four,
 }
 
+/// Full-scale range configuration for the programmable gain amplifier (PGA) (only for ADS1x14, ADS1x15)
+///
+/// This sets the input voltage measurable range.
+/// The FSR is fixed at ±2.048 V in the ADS1x13.
+#[derive(Clone, Copy, Debug)]
+#[allow(non_camel_case_types)]
+pub enum FullScaleRange {
+    /// The measurable range is ±6.144V.
+    Within6_144V,
+    /// The measurable range is ±4.096V.
+    Within4_096V,
+    /// The measurable range is ±2.048V. (default)
+    Within2_048V,
+    /// The measurable range is ±1.024V.
+    Within1_024V,
+    /// The measurable range is ±0.512V.
+    Within0_512V,
+    /// The measurable range is ±0.256V.
+    Within0_256V,
+}
+
 /// Possible slave addresses
 #[derive(Debug, Clone)]
 pub enum SlaveAddr {
@@ -330,11 +351,14 @@ impl Register {
 
 struct BitFlags;
 impl BitFlags {
-    const OP_MODE      : u16 = 0b0000_0001_0000_0000;
     const OS           : u16 = 0b1000_0000_0000_0000;
     const MUX2         : u16 = 0b0100_0000_0000_0000;
     const MUX1         : u16 = 0b0010_0000_0000_0000;
     const MUX0         : u16 = 0b0001_0000_0000_0000;
+    const PGA2         : u16 = 0b0000_1000_0000_0000;
+    const PGA1         : u16 = 0b0000_0100_0000_0000;
+    const PGA0         : u16 = 0b0000_0010_0000_0000;
+    const OP_MODE      : u16 = 0b0000_0001_0000_0000;
     const DR2          : u16 = 0b0000_0000_1000_0000;
     const DR1          : u16 = 0b0000_0000_0100_0000;
     const DR0          : u16 = 0b0000_0000_0010_0000;
-- 
cgit v1.2.3-54-g00ecf