diff options
| -rw-r--r-- | src/devices/features/tier2.rs | 24 | ||||
| -rw-r--r-- | src/lib.rs | 26 | ||||
| -rw-r--r-- | tests/common/mod.rs | 3 | ||||
| -rw-r--r-- | tests/tier2_i2c.rs | 13 |
4 files changed, 61 insertions, 5 deletions
diff --git a/src/devices/features/tier2.rs b/src/devices/features/tier2.rs index 25b618a..067139a 100644 --- a/src/devices/features/tier2.rs +++ b/src/devices/features/tier2.rs @@ -2,8 +2,9 @@ //! //! These are the features included only in ADS1x14, ADS1x15 -use { Ads1x1x, Error, interface, ic, ComparatorMode, ComparatorPolarity, - ComparatorLatching, ComparatorQueue, Register, BitFlags, conversion }; +use { Ads1x1x, Error, interface, ic, FullScaleRange, ComparatorMode, + ComparatorPolarity, ComparatorLatching, ComparatorQueue, Register, + BitFlags, conversion }; impl<DI, IC, CONV, MODE, E> Ads1x1x<DI, IC, CONV, MODE> where @@ -11,6 +12,25 @@ where IC: ic::Tier2Features, CONV: conversion::ConvertThreshold<E> { + /// Set the input voltage measurable range + /// + /// This configures the programmable gain amplifier and determines the measurable input voltage range. + pub fn set_full_scale_range(&mut self, range: FullScaleRange) -> Result<(), Error<E>> { + use BitFlags as BF; + let config; + match range { + FullScaleRange::Within6_144V => config = self.config.with_low( BF::PGA2).with_low( BF::PGA1).with_low( BF::PGA0), + FullScaleRange::Within4_096V => config = self.config.with_low( BF::PGA2).with_low( BF::PGA1).with_high(BF::PGA0), + FullScaleRange::Within2_048V => config = self.config.with_low( BF::PGA2).with_high(BF::PGA1).with_low( BF::PGA0), + FullScaleRange::Within1_024V => config = self.config.with_low( BF::PGA2).with_high(BF::PGA1).with_high(BF::PGA0), + FullScaleRange::Within0_512V => config = self.config.with_high(BF::PGA2).with_low( BF::PGA1).with_low( BF::PGA0), + FullScaleRange::Within0_256V => config = self.config.with_high(BF::PGA2).with_low( BF::PGA1).with_high(BF::PGA0), + } + self.iface.write_register(Register::CONFIG, config.bits)?; + self.config = config; + Ok(()) + } + /// Set comparator lower threshold pub fn set_low_threshold(&mut self, value: i16) -> Result<(), Error<E>> { let register_value = CONV::convert_threshold(value)?; @@ -292,6 +292,27 @@ pub enum ComparatorQueue { Four, } +/// Full-scale range configuration for the programmable gain amplifier (PGA) (only for ADS1x14, ADS1x15) +/// +/// This sets the input voltage measurable range. +/// The FSR is fixed at ±2.048 V in the ADS1x13. +#[derive(Clone, Copy, Debug)] +#[allow(non_camel_case_types)] +pub enum FullScaleRange { + /// The measurable range is ±6.144V. + Within6_144V, + /// The measurable range is ±4.096V. + Within4_096V, + /// The measurable range is ±2.048V. (default) + Within2_048V, + /// The measurable range is ±1.024V. + Within1_024V, + /// The measurable range is ±0.512V. + Within0_512V, + /// The measurable range is ±0.256V. + Within0_256V, +} + /// Possible slave addresses #[derive(Debug, Clone)] pub enum SlaveAddr { @@ -330,11 +351,14 @@ impl Register { struct BitFlags; impl BitFlags { - const OP_MODE : u16 = 0b0000_0001_0000_0000; const OS : u16 = 0b1000_0000_0000_0000; const MUX2 : u16 = 0b0100_0000_0000_0000; const MUX1 : u16 = 0b0010_0000_0000_0000; const MUX0 : u16 = 0b0001_0000_0000_0000; + const PGA2 : u16 = 0b0000_1000_0000_0000; + const PGA1 : u16 = 0b0000_0100_0000_0000; + const PGA0 : u16 = 0b0000_0010_0000_0000; + const OP_MODE : u16 = 0b0000_0001_0000_0000; const DR2 : u16 = 0b0000_0000_1000_0000; const DR1 : u16 = 0b0000_0000_0100_0000; const DR0 : u16 = 0b0000_0000_0010_0000; diff --git a/tests/common/mod.rs b/tests/common/mod.rs index ee78ffe..8714a36 100644 --- a/tests/common/mod.rs +++ b/tests/common/mod.rs @@ -20,6 +20,9 @@ impl BitFlags { pub const MUX2 : u16 = 0b0100_0000_0000_0000; pub const MUX1 : u16 = 0b0010_0000_0000_0000; pub const MUX0 : u16 = 0b0001_0000_0000_0000; + pub const PGA2 : u16 = 0b0000_1000_0000_0000; + pub const PGA1 : u16 = 0b0000_0100_0000_0000; + pub const PGA0 : u16 = 0b0000_0010_0000_0000; pub const OP_MODE : u16 = 0b0000_0001_0000_0000; pub const DR2 : u16 = 0b0000_0000_1000_0000; pub const DR1 : u16 = 0b0000_0000_0100_0000; diff --git a/tests/tier2_i2c.rs b/tests/tier2_i2c.rs index a4c4df3..a3e3590 100644 --- a/tests/tier2_i2c.rs +++ b/tests/tier2_i2c.rs @@ -1,8 +1,8 @@ extern crate embedded_hal_mock as hal; use hal::i2c::Transaction as I2cTrans; extern crate ads1x1x; -use ads1x1x::{ ComparatorMode, ComparatorPolarity, ComparatorLatching, - ComparatorQueue }; +use ads1x1x::{ FullScaleRange, ComparatorMode, ComparatorPolarity, + ComparatorLatching, ComparatorQueue}; #[macro_use] mod common; @@ -67,3 +67,12 @@ mod can_set_comparator_queue { config_test!(four, set_comparator_queue, ComparatorQueue::Four, Config::default().with_high(BitFlags::COMP_QUE1).with_low( BitFlags::COMP_QUE0)); } +mod can_set_full_scale_range { + use super::*; + config_test!(fsr6, set_full_scale_range, FullScaleRange::Within6_144V, Config::default().with_low( BitFlags::PGA2).with_low( BitFlags::PGA1).with_low( BitFlags::PGA0)); + config_test!(fsr4, set_full_scale_range, FullScaleRange::Within4_096V, Config::default().with_low( BitFlags::PGA2).with_low( BitFlags::PGA1).with_high(BitFlags::PGA0)); + config_test!(fsr2, set_full_scale_range, FullScaleRange::Within2_048V, Config::default().with_low( BitFlags::PGA2).with_high(BitFlags::PGA1).with_low( BitFlags::PGA0)); + config_test!(fsr1, set_full_scale_range, FullScaleRange::Within1_024V, Config::default().with_low( BitFlags::PGA2).with_high(BitFlags::PGA1).with_high(BitFlags::PGA0)); + config_test!(fsr0_5, set_full_scale_range, FullScaleRange::Within0_512V, Config::default().with_high(BitFlags::PGA2).with_low( BitFlags::PGA1).with_low( BitFlags::PGA0)); + config_test!(fsr0_2, set_full_scale_range, FullScaleRange::Within0_256V, Config::default().with_high(BitFlags::PGA2).with_low( BitFlags::PGA1).with_high(BitFlags::PGA0)); +} |