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authorDiego Barrios Romero <eldruin@gmail.com>2019-03-30 13:36:06 +0200
committerDiego Barrios Romero <eldruin@gmail.com>2019-03-31 13:41:26 +0200
commit50223ad02e2f487540107e320c8bef40a9849582 (patch)
tree58b4e44e2261940d07aba96b8d8e83457e641f53 /tests/mux.rs
parentab1221e175f2da577c7a3fb510b5ae5cf41b0697 (diff)
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Format code
Diffstat (limited to 'tests/mux.rs')
-rw-r--r--tests/mux.rs84
1 files changed, 64 insertions, 20 deletions
diff --git a/tests/mux.rs b/tests/mux.rs
index b961fc7..309656e 100644
--- a/tests/mux.rs
+++ b/tests/mux.rs
@@ -7,24 +7,35 @@ extern crate ads1x1x;
use ads1x1x::channel;
mod common;
-use common::{ new_ads1015 as new, destroy_ads1015 as destroy,
- DEVICE_ADDRESS as DEV_ADDR, Register, BitFlags as BF, Config };
-
+use common::{
+ destroy_ads1015 as destroy, new_ads1015 as new, BitFlags as BF, Config, Register,
+ DEVICE_ADDRESS as DEV_ADDR,
+};
macro_rules! mux_test {
($name:ident, $CS:ident, $config_bits:expr, $other_CS:ident, $other_config_bits:expr) => {
mod $name {
- use embedded_hal::adc::OneShot;
use super::*;
+ use embedded_hal::adc::OneShot;
#[test]
fn can_read() {
let default_config = Config::default();
let config = Config::default().with_high(BF::OS).with_high($config_bits);
- let transactions = [ I2cTrans::write_read(DEV_ADDR, vec![Register::CONFIG], vec![default_config.msb(), default_config.lsb()]),
- I2cTrans::write(DEV_ADDR, vec![Register::CONFIG, config.msb(), config.lsb()]),
- I2cTrans::write_read(DEV_ADDR, vec![Register::CONFIG], vec![config.msb(), config.lsb()]),
- I2cTrans::write_read(DEV_ADDR, vec![Register::CONVERSION], vec![0x80, 0x00] ) ];
+ let transactions = [
+ I2cTrans::write_read(
+ DEV_ADDR,
+ vec![Register::CONFIG],
+ vec![default_config.msb(), default_config.lsb()],
+ ),
+ I2cTrans::write(DEV_ADDR, vec![Register::CONFIG, config.msb(), config.lsb()]),
+ I2cTrans::write_read(
+ DEV_ADDR,
+ vec![Register::CONFIG],
+ vec![config.msb(), config.lsb()],
+ ),
+ I2cTrans::write_read(DEV_ADDR, vec![Register::CONVERSION], vec![0x80, 0x00]),
+ ];
let mut dev = new(&transactions);
let measurement = block!(dev.read(&mut channel::$CS)).unwrap();
assert_eq!(-2048, measurement);
@@ -36,12 +47,29 @@ macro_rules! mux_test {
let default_config = Config::default();
let config = Config::default().with_high(BF::OS).with_high($config_bits);
let other_config = Config::default().with_high($other_config_bits);
- let transactions = [ I2cTrans::write_read(DEV_ADDR, vec![Register::CONFIG], vec![default_config.msb(), default_config.lsb()]),
- I2cTrans::write(DEV_ADDR, vec![Register::CONFIG, config.msb(), config.lsb()]),
- I2cTrans::write_read(DEV_ADDR, vec![Register::CONFIG], vec![config.msb(), config.lsb()]),
- I2cTrans::write(DEV_ADDR, vec![Register::CONFIG, other_config.msb(), other_config.lsb()]),
- I2cTrans::write_read(DEV_ADDR, vec![Register::CONFIG], vec![other_config.msb(), other_config.lsb()]),
- I2cTrans::write_read(DEV_ADDR, vec![Register::CONVERSION], vec![0x80, 0x00] ) ];
+ let transactions = [
+ I2cTrans::write_read(
+ DEV_ADDR,
+ vec![Register::CONFIG],
+ vec![default_config.msb(), default_config.lsb()],
+ ),
+ I2cTrans::write(DEV_ADDR, vec![Register::CONFIG, config.msb(), config.lsb()]),
+ I2cTrans::write_read(
+ DEV_ADDR,
+ vec![Register::CONFIG],
+ vec![config.msb(), config.lsb()],
+ ),
+ I2cTrans::write(
+ DEV_ADDR,
+ vec![Register::CONFIG, other_config.msb(), other_config.lsb()],
+ ),
+ I2cTrans::write_read(
+ DEV_ADDR,
+ vec![Register::CONFIG],
+ vec![other_config.msb(), other_config.lsb()],
+ ),
+ I2cTrans::write_read(DEV_ADDR, vec![Register::CONVERSION], vec![0x80, 0x00]),
+ ];
let mut dev = new(&transactions);
assert_would_block!(dev.read(&mut channel::$CS));
let measurement = block!(dev.read(&mut channel::$other_CS)).unwrap();
@@ -54,10 +82,14 @@ macro_rules! mux_test {
let config1 = Config::default().with_low(BF::OP_MODE);
let config2 = config1.with_high($config_bits);
let transactions = [
- I2cTrans::write(DEV_ADDR,
- vec![Register::CONFIG, config1.msb(), config1.lsb()]),
- I2cTrans::write(DEV_ADDR,
- vec![Register::CONFIG, config2.msb(), config2.lsb()])
+ I2cTrans::write(
+ DEV_ADDR,
+ vec![Register::CONFIG, config1.msb(), config1.lsb()],
+ ),
+ I2cTrans::write(
+ DEV_ADDR,
+ vec![Register::CONFIG, config2.msb(), config2.lsb()],
+ ),
];
let dev = new(&transactions);
let mut dev = dev.into_continuous().ok().unwrap();
@@ -71,8 +103,20 @@ macro_rules! mux_test {
mux_test!(diffa0a1, DifferentialA0A1, 0, SingleA0, BF::MUX2);
mux_test!(diffa0a3, DifferentialA0A3, BF::MUX0, SingleA0, BF::MUX2);
mux_test!(diffa1a3, DifferentialA1A3, BF::MUX1, SingleA0, BF::MUX2);
-mux_test!(diffa2a3, DifferentialA2A3, BF::MUX1 | BF::MUX0, SingleA0, BF::MUX2);
+mux_test!(
+ diffa2a3,
+ DifferentialA2A3,
+ BF::MUX1 | BF::MUX0,
+ SingleA0,
+ BF::MUX2
+);
mux_test!(singlea0, SingleA0, BF::MUX2, DifferentialA0A1, 0);
mux_test!(singlea1, SingleA1, BF::MUX2 | BF::MUX0, SingleA0, BF::MUX2);
mux_test!(singlea2, SingleA2, BF::MUX2 | BF::MUX1, SingleA0, BF::MUX2);
-mux_test!(singlea3, SingleA3, BF::MUX2 | BF::MUX1 | BF::MUX0, SingleA0, BF::MUX2);
+mux_test!(
+ singlea3,
+ SingleA3,
+ BF::MUX2 | BF::MUX1 | BF::MUX0,
+ SingleA0,
+ BF::MUX2
+);